diff options
| -rw-r--r-- | target-ppc/cpu.h | 67 | ||||
| -rw-r--r-- | target-ppc/helper.c | 24 | ||||
| -rw-r--r-- | target-ppc/translate.c | 50 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 42 |
4 files changed, 122 insertions, 61 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 5824526beb..8a24d4d06f 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -347,40 +347,37 @@ union ppc_tlb_t { #define MSR_CM 31 /* Computation mode for BookE hflags */ #define MSR_ICM 30 /* Interrupt computation mode for BookE */ #define MSR_UCLE 26 /* User-mode cache lock enable for BookE */ -#define MSR_VR 25 /* altivec available hflags */ -#define MSR_SPE 25 /* SPE enable for BookE hflags */ +#define MSR_VR 25 /* altivec available x hflags */ +#define MSR_SPE 25 /* SPE enable for BookE x hflags */ #define MSR_AP 23 /* Access privilege state on 602 hflags */ #define MSR_SA 22 /* Supervisor access mode on 602 hflags */ #define MSR_KEY 19 /* key bit on 603e */ -#define MSR_POW 18 /* Power management */ -#define MSR_WE 18 /* Wait state enable on embedded PowerPC */ -#define MSR_TGPR 17 /* TGPR usage on 602/603 */ -#define MSR_TLB 17 /* TLB update on ? */ -#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC */ +#define MSR_POW 18 /* Power management x */ +#define MSR_WE 18 /* Wait state enable on embedded PowerPC x */ +#define MSR_TGPR 17 /* TGPR usage on 602/603 x */ +#define MSR_CE 17 /* Critical interrupt enable on embedded PowerPC x */ #define MSR_ILE 16 /* Interrupt little-endian mode */ #define MSR_EE 15 /* External interrupt enable */ #define MSR_PR 14 /* Problem state hflags */ #define MSR_FP 13 /* Floating point available hflags */ #define MSR_ME 12 /* Machine check interrupt enable */ #define MSR_FE0 11 /* Floating point exception mode 0 hflags */ -#define MSR_SE 10 /* Single-step trace enable hflags */ -#define MSR_DWE 10 /* Debug wait enable on 405 */ -#define MSR_UBLE 10 /* User BTB lock enable on e500 */ -#define MSR_BE 9 /* Branch trace enable hflags */ -#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC */ +#define MSR_SE 10 /* Single-step trace enable x hflags */ +#define MSR_DWE 10 /* Debug wait enable on 405 x */ +#define MSR_UBLE 10 /* User BTB lock enable on e500 x */ +#define MSR_BE 9 /* Branch trace enable x hflags */ +#define MSR_DE 9 /* Debug interrupts enable on embedded PowerPC x */ #define MSR_FE1 8 /* Floating point exception mode 1 hflags */ #define MSR_AL 7 /* AL bit on POWER */ #define MSR_IP 6 /* Interrupt prefix */ #define MSR_IR 5 /* Instruction relocate */ -#define MSR_IS 5 /* Instruction address space on embedded PowerPC */ #define MSR_DR 4 /* Data relocate */ -#define MSR_DS 4 /* Data address space on embedded PowerPC */ -#define MSR_PE 3 /* Protection enable on 403 */ -#define MSR_EP 3 /* Exception prefix on 601 */ -#define MSR_PX 2 /* Protection exclusive on 403 */ -#define MSR_PMM 2 /* Performance monitor mark on POWER */ -#define MSR_RI 1 /* Recoverable interrupt */ -#define MSR_LE 0 /* Little-endian mode hflags */ +#define MSR_PE 3 /* Protection enable on 403 x */ +#define MSR_EP 3 /* Exception prefix on 601 x */ +#define MSR_PX 2 /* Protection exclusive on 403 x */ +#define MSR_PMM 2 /* Performance monitor mark on POWER x */ +#define MSR_RI 1 /* Recoverable interrupt 1 */ +#define MSR_LE 0 /* Little-endian mode 1 hflags */ #define msr_sf env->msr[MSR_SF] #define msr_isf env->msr[MSR_ISF] #define msr_hv env->msr[MSR_HV] @@ -395,7 +392,6 @@ union ppc_tlb_t { #define msr_pow env->msr[MSR_POW] #define msr_we env->msr[MSR_WE] #define msr_tgpr env->msr[MSR_TGPR] -#define msr_tlb env->msr[MSR_TLB] #define msr_ce env->msr[MSR_CE] #define msr_ile env->msr[MSR_ILE] #define msr_ee env->msr[MSR_EE] @@ -412,9 +408,7 @@ union ppc_tlb_t { #define msr_al env->msr[MSR_AL] #define msr_ip env->msr[MSR_IP] #define msr_ir env->msr[MSR_IR] -#define msr_is env->msr[MSR_IS] #define msr_dr env->msr[MSR_DR] -#define msr_ds env->msr[MSR_DS] #define msr_pe env->msr[MSR_PE] #define msr_ep env->msr[MSR_EP] #define msr_px env->msr[MSR_PX] @@ -422,6 +416,33 @@ union ppc_tlb_t { #define msr_ri env->msr[MSR_RI] #define msr_le env->msr[MSR_LE] +enum { + /* Beware that MSR bits are given using IBM standard (ie MSB is 0 !) */ + POWERPC_FLAG_NONE = 0x00000000, + /* Flag for MSR bit 25 signification (VRE/SPE) */ + POWERPC_FLAG_SPE = 0x00000001, + POWERPC_FLAG_VRE = 0x00000002, + /* Flag for MSR bit 18 may not be needed... */ + POWERPC_FLAG_POW = 0x00000004, + POWERPC_FLAG_WE = 0x00000008, + /* Flag for MSR bit 17 signification (TGPR/CE) */ + POWERPC_FLAG_TGPR = 0x00000010, + POWERPC_FLAG_CE = 0x00000020, + /* Flag for MSR bit 10 signification (SE/DWE/UBLE) */ + POWERPC_FLAG_SE = 0x00000040, + POWERPC_FLAG_DWE = 0x00000080, + POWERPC_FLAG_UBLE = 0x00000100, + /* Flag for MSR bit 9 signification (BE/DE) */ + POWERPC_FLAG_BE = 0x00000200, + POWERPC_FLAG_DE = 0x00000400, + /* Flag for MSR bit 3 signification (PE/EP) */ + POWERPC_FLAG_PE = 0x00000800, + POWERPC_FLAG_EP = 0x00001000, + /* Flag for MSR but 2 signification (PX/PMM) */ + POWERPC_FLAG_PX = 0x00002000, + POWERPC_FLAG_PMM = 0x00004000, +}; + /*****************************************************************************/ /* The whole PowerPC CPU context */ struct CPUPPCState { diff --git a/target-ppc/helper.c b/target-ppc/helper.c index bb39fc05f3..f1fe6806c6 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -1183,7 +1183,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx, prot = (tlb->prot >> 4) & 0xF; /* Check the address space */ if (access_type == ACCESS_CODE) { - if (msr_is != (tlb->attr & 1)) + if (msr_ir != (tlb->attr & 1)) continue; ctx->prot = prot; if (prot & PAGE_EXEC) { @@ -1192,7 +1192,7 @@ int mmubooke_get_physical_address (CPUState *env, mmu_ctx_t *ctx, } ret = -3; } else { - if (msr_ds != (tlb->attr & 1)) + if (msr_dr != (tlb->attr & 1)) continue; ctx->prot = prot; if ((!rw && prot & PAGE_READ) || (rw && (prot & PAGE_WRITE))) { @@ -1964,7 +1964,7 @@ target_ulong do_load_msr (CPUPPCState *env) ((target_ulong)msr_sa << MSR_SA) | ((target_ulong)msr_key << MSR_KEY) | ((target_ulong)msr_pow << MSR_POW) | /* POW / WE */ - ((target_ulong)msr_tlb << MSR_TLB) | /* TLB / TGPE / CE */ + ((target_ulong)msr_tgpr << MSR_TGPR) | /* TGPR / CE */ ((target_ulong)msr_ile << MSR_ILE) | ((target_ulong)msr_ee << MSR_EE) | ((target_ulong)msr_pr << MSR_PR) | @@ -2000,18 +2000,10 @@ int do_store_msr (CPUPPCState *env, target_ulong value) fprintf(logfile, "%s: T0 %08lx\n", __func__, value); } #endif - switch (env->excp_model) { - case POWERPC_EXCP_602: - case POWERPC_EXCP_603: - case POWERPC_EXCP_603E: - case POWERPC_EXCP_G2: - if (((value >> MSR_TGPR) & 1) != msr_tgpr) { - /* Swap temporary saved registers with GPRs */ - swap_gpr_tgpr(env); - } - break; - default: - break; + if (unlikely((env->flags & POWERPC_FLAG_TGPR) && + ((value >> MSR_TGPR) & 1) != msr_tgpr)) { + /* Swap temporary saved registers with GPRs */ + swap_gpr_tgpr(env); } #if defined (TARGET_PPC64) msr_sf = (value >> MSR_SF) & 1; @@ -2024,7 +2016,7 @@ int do_store_msr (CPUPPCState *env, target_ulong value) msr_sa = (value >> MSR_SA) & 1; msr_key = (value >> MSR_KEY) & 1; msr_pow = (value >> MSR_POW) & 1; /* POW / WE */ - msr_tlb = (value >> MSR_TLB) & 1; /* TLB / TGPR / CE */ + msr_tgpr = (value >> MSR_TGPR) & 1; /* TGPR / CE */ msr_ile = (value >> MSR_ILE) & 1; msr_ee = (value >> MSR_EE) & 1; msr_pr = (value >> MSR_PR) & 1; diff --git a/target-ppc/translate.c b/target-ppc/translate.c index bc6336b0c9..f30cb411f1 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -6514,6 +6514,7 @@ static inline int gen_intermediate_code_internal (CPUState *env, target_ulong pc_start; uint16_t *gen_opc_end; int supervisor; + int single_step, branch_step; int j, lj = -1; pc_start = tb->pc; @@ -6545,9 +6546,20 @@ static inline int gen_intermediate_code_internal (CPUState *env, ctx.dcache_line_size = env->dcache_line_size; ctx.fpu_enabled = msr_fp; #if defined(TARGET_PPCEMB) - ctx.spe_enabled = msr_spe; + if (env->flags & POWERPC_FLAG_SPE) + ctx.spe_enabled = msr_spe; + else + ctx.spe_enabled = 0; #endif - ctx.singlestep_enabled = env->singlestep_enabled; + if ((env->flags & POWERPC_FLAG_SE) && msr_se) + single_step = 1; + else + single_step = 0; + if ((env->flags & POWERPC_FLAG_BE) && msr_be) + branch_step = 1; + else + branch_step = 0; + ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;; #if defined (DO_SINGLE_STEP) && 0 /* Single step trace mode */ msr_se = 1; @@ -6642,30 +6654,24 @@ static inline int gen_intermediate_code_internal (CPUState *env, handler->count++; #endif /* Check trace mode exceptions */ -#if 0 // XXX: buggy on embedded PowerPC - if (unlikely((msr_be && ctx.exception == POWERPC_EXCP_BRANCH) || - /* Check in single step trace mode - * we need to stop except if: - * - rfi, trap or syscall - * - first instruction of an exception handler - */ - (msr_se && (ctx.nip < 0x100 || - ctx.nip > 0xF00 || - (ctx.nip & 0xFC) != 0x04) && + if (unlikely(branch_step != 0 && + ctx.exception == POWERPC_EXCP_BRANCH)) { + GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0); + } else if (unlikely(single_step != 0 && + (ctx.nip <= 0x100 || ctx.nip > 0xF00 || + (ctx.nip & 0xFC) != 0x04) && #if defined(CONFIG_USER_ONLY) - ctx.exception != POWERPC_EXCP_SYSCALL_USER && + ctx.exception != POWERPC_EXCP_SYSCALL_USER && #else - ctx.exception != POWERPC_EXCP_SYSCALL && + ctx.exception != POWERPC_EXCP_SYSCALL && #endif - ctx.exception != POWERPC_EXCP_TRAP))) { + ctx.exception != POWERPC_EXCP_TRAP)) { GEN_EXCP(ctxp, POWERPC_EXCP_TRACE, 0); - } -#endif - /* if we reach a page boundary or are single stepping, stop - * generation - */ - if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) || - (env->singlestep_enabled))) { + } else if (unlikely(((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) || + (env->singlestep_enabled))) { + /* if we reach a page boundary or are single stepping, stop + * generation + */ break; } #if defined (DO_SINGLE_STEP) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 8bc6209dfc..296727e76e 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -39,6 +39,7 @@ struct ppc_def_t { uint8_t excp_model; uint8_t bus_model; uint8_t pad; + uint32_t flags; int bfd_mach; void (*init_proc)(CPUPPCState *env); }; @@ -2581,6 +2582,7 @@ static void init_excp_970 (CPUPPCState *env) #define POWERPC_EXCP_401 (POWERPC_EXCP_40x) #define POWERPC_INPUT_401 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_401 (bfd_mach_ppc_403) +#define POWERPC_FLAG_401 (POWERPC_FLAG_NONE) static void init_proc_401 (CPUPPCState *env) { @@ -2605,6 +2607,7 @@ static void init_proc_401 (CPUPPCState *env) #define POWERPC_EXCP_401x2 (POWERPC_EXCP_40x) #define POWERPC_INPUT_401x2 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_401x2 (bfd_mach_ppc_403) +#define POWERPC_FLAG_401x2 (POWERPC_FLAG_NONE) static void init_proc_401x2 (CPUPPCState *env) { @@ -2634,6 +2637,7 @@ static void init_proc_401x2 (CPUPPCState *env) #define POWERPC_EXCP_401x3 (POWERPC_EXCP_40x) #define POWERPC_INPUT_401x3 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_401x3 (bfd_mach_ppc_403) +#define POWERPC_FLAG_401x3 (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_401x3 (CPUPPCState *env) @@ -2661,6 +2665,7 @@ static void init_proc_401x3 (CPUPPCState *env) #define POWERPC_EXCP_IOP480 (POWERPC_EXCP_40x) #define POWERPC_INPUT_IOP480 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_IOP480 (bfd_mach_ppc_403) +#define POWERPC_FLAG_IOP480 (POWERPC_FLAG_NONE) static void init_proc_IOP480 (CPUPPCState *env) { @@ -2689,6 +2694,7 @@ static void init_proc_IOP480 (CPUPPCState *env) #define POWERPC_EXCP_403 (POWERPC_EXCP_40x) #define POWERPC_INPUT_403 (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_403 (bfd_mach_ppc_403) +#define POWERPC_FLAG_403 (POWERPC_FLAG_NONE) static void init_proc_403 (CPUPPCState *env) { @@ -2717,6 +2723,7 @@ static void init_proc_403 (CPUPPCState *env) #define POWERPC_EXCP_403GCX (POWERPC_EXCP_40x) #define POWERPC_INPUT_403GCX (PPC_FLAGS_INPUT_401) #define POWERPC_BFDM_403GCX (bfd_mach_ppc_403) +#define POWERPC_FLAG_403GCX (POWERPC_FLAG_NONE) static void init_proc_403GCX (CPUPPCState *env) { @@ -2758,6 +2765,7 @@ static void init_proc_403GCX (CPUPPCState *env) #define POWERPC_EXCP_405 (POWERPC_EXCP_40x) #define POWERPC_INPUT_405 (PPC_FLAGS_INPUT_405) #define POWERPC_BFDM_405 (bfd_mach_ppc_403) +#define POWERPC_FLAG_405 (POWERPC_FLAG_NONE) static void init_proc_405 (CPUPPCState *env) { @@ -2797,6 +2805,7 @@ static void init_proc_405 (CPUPPCState *env) #define POWERPC_EXCP_440EP (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_440EP (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_440EP (bfd_mach_ppc_403) +#define POWERPC_FLAG_440EP (POWERPC_FLAG_NONE) static void init_proc_440EP (CPUPPCState *env) { @@ -2842,6 +2851,7 @@ static void init_proc_440EP (CPUPPCState *env) #define POWERPC_EXCP_440GP (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_440GP (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_440GP (bfd_mach_ppc_403) +#define POWERPC_FLAG_440GP (POWERPC_FLAG_NONE) static void init_proc_440GP (CPUPPCState *env) { @@ -2869,6 +2879,7 @@ static void init_proc_440GP (CPUPPCState *env) #define POWERPC_EXCP_440x4 (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_440x4 (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_440x4 (bfd_mach_ppc_403) +#define POWERPC_FLAG_440x4 (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_440x4 (CPUPPCState *env) @@ -2897,6 +2908,7 @@ static void init_proc_440x4 (CPUPPCState *env) #define POWERPC_EXCP_440x5 (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_440x5 (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_440x5 (bfd_mach_ppc_403) +#define POWERPC_FLAG_440x5 (POWERPC_FLAG_NONE) static void init_proc_440x5 (CPUPPCState *env) { @@ -2942,6 +2954,7 @@ static void init_proc_440x5 (CPUPPCState *env) #define POWERPC_EXCP_460 (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_460 (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_460 (bfd_mach_ppc_403) +#define POWERPC_FLAG_460 (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_460 (CPUPPCState *env) @@ -2996,6 +3009,7 @@ static void init_proc_460 (CPUPPCState *env) #define POWERPC_EXCP_460F (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_460F (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_460F (bfd_mach_ppc_403) +#define POWERPC_FLAG_460F (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_460F (CPUPPCState *env) @@ -3050,6 +3064,7 @@ static void init_proc_460F (CPUPPCState *env) #define POWERPC_EXCP_BookE (POWERPC_EXCP_BOOKE) #define POWERPC_INPUT_BookE (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_BookE (bfd_mach_ppc_403) +#define POWERPC_FLAG_BookE (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_BookE (CPUPPCState *env) @@ -3072,6 +3087,7 @@ static void init_proc_BookE (CPUPPCState *env) #define POWERPC_EXCP_e500 (POWERPC_EXCP_40x) #define POWERPC_INPUT_e500 (PPC_FLAGS_INPUT_BookE) #define POWERPC_BFDM_e500 (bfd_mach_ppc_403) +#define POWERPC_FLAG_e500 (POWERPC_FLAG_SPE) __attribute__ (( unused )) static void init_proc_e500 (CPUPPCState *env) @@ -3118,6 +3134,7 @@ static void init_proc_e500 (CPUPPCState *env) //#define POWERPC_EXCP_601 (POWERPC_EXCP_601) #define POWERPC_INPUT_601 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_601 (bfd_mach_ppc_601) +#define POWERPC_FLAG_601 (POWERPC_FLAG_NONE) static void init_proc_601 (CPUPPCState *env) { @@ -3171,6 +3188,7 @@ static void init_proc_601 (CPUPPCState *env) //#define POWERPC_EXCP_602 (POWERPC_EXCP_602) #define POWERPC_INPUT_602 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_602 (bfd_mach_ppc_602) +#define POWERPC_FLAG_602 (POWERPC_FLAG_TGPR) static void init_proc_602 (CPUPPCState *env) { @@ -3206,6 +3224,7 @@ static void init_proc_602 (CPUPPCState *env) //#define POWERPC_EXCP_603 (POWERPC_EXCP_603) #define POWERPC_INPUT_603 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_603 (bfd_mach_ppc_603) +#define POWERPC_FLAG_603 (POWERPC_FLAG_TGPR) static void init_proc_603 (CPUPPCState *env) { @@ -3241,6 +3260,7 @@ static void init_proc_603 (CPUPPCState *env) //#define POWERPC_EXCP_603E (POWERPC_EXCP_603E) #define POWERPC_INPUT_603E (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_603E (bfd_mach_ppc_ec603e) +#define POWERPC_FLAG_603E (POWERPC_FLAG_TGPR) static void init_proc_603E (CPUPPCState *env) { @@ -3281,6 +3301,7 @@ static void init_proc_603E (CPUPPCState *env) //#define POWERPC_EXCP_G2 (POWERPC_EXCP_G2) #define POWERPC_INPUT_G2 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_G2 (bfd_mach_ppc_ec603e) +#define POWERPC_FLAG_G2 (POWERPC_FLAG_TGPR) static void init_proc_G2 (CPUPPCState *env) { @@ -3323,6 +3344,7 @@ static void init_proc_G2 (CPUPPCState *env) #define POWERPC_EXCP_G2LE (POWERPC_EXCP_G2) #define POWERPC_INPUT_G2LE (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_G2LE (bfd_mach_ppc_ec603e) +#define POWERPC_FLAG_G2LE (POWERPC_FLAG_TGPR) static void init_proc_G2LE (CPUPPCState *env) { @@ -3365,6 +3387,7 @@ static void init_proc_G2LE (CPUPPCState *env) //#define POWERPC_EXCP_604 (POWERPC_EXCP_604) #define POWERPC_INPUT_604 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_604 (bfd_mach_ppc_604) +#define POWERPC_FLAG_604 (POWERPC_FLAG_NONE) static void init_proc_604 (CPUPPCState *env) { @@ -3399,6 +3422,7 @@ static void init_proc_604 (CPUPPCState *env) //#define POWERPC_EXCP_7x0 (POWERPC_EXCP_7x0) #define POWERPC_INPUT_7x0 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7x0 (bfd_mach_ppc_750) +#define POWERPC_FLAG_7x0 (POWERPC_FLAG_NONE) static void init_proc_7x0 (CPUPPCState *env) { @@ -3435,6 +3459,7 @@ static void init_proc_7x0 (CPUPPCState *env) #define POWERPC_EXCP_750fx (POWERPC_EXCP_7x0) #define POWERPC_INPUT_750fx (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_750fx (bfd_mach_ppc_750) +#define POWERPC_FLAG_750fx (POWERPC_FLAG_NONE) static void init_proc_750fx (CPUPPCState *env) { @@ -3478,6 +3503,7 @@ static void init_proc_750fx (CPUPPCState *env) //#define POWERPC_EXCP_7x5 (POWERPC_EXCP_7x5) #define POWERPC_INPUT_7x5 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7x5 (bfd_mach_ppc_750) +#define POWERPC_FLAG_7x5 (POWERPC_FLAG_NONE) static void init_proc_7x5 (CPUPPCState *env) { @@ -3536,6 +3562,7 @@ static void init_proc_7x5 (CPUPPCState *env) #define POWERPC_EXCP_7400 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7400 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7400 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7400 (POWERPC_FLAG_VRE) static void init_proc_7400 (CPUPPCState *env) { @@ -3565,6 +3592,7 @@ static void init_proc_7400 (CPUPPCState *env) #define POWERPC_EXCP_7410 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7410 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7410 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7410 (POWERPC_FLAG_VRE) static void init_proc_7410 (CPUPPCState *env) { @@ -3606,6 +3634,7 @@ static void init_proc_7410 (CPUPPCState *env) #define POWERPC_EXCP_7440 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7440 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7440 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7440 (POWERPC_FLAG_VRE) __attribute__ (( unused )) static void init_proc_7440 (CPUPPCState *env) @@ -3674,6 +3703,7 @@ static void init_proc_7440 (CPUPPCState *env) #define POWERPC_EXCP_7450 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7450 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7450 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7450 (POWERPC_FLAG_VRE) __attribute__ (( unused )) static void init_proc_7450 (CPUPPCState *env) @@ -3744,6 +3774,7 @@ static void init_proc_7450 (CPUPPCState *env) #define POWERPC_EXCP_7445 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7445 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7445 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7445 (POWERPC_FLAG_VRE) __attribute__ (( unused )) static void init_proc_7445 (CPUPPCState *env) @@ -3846,6 +3877,7 @@ static void init_proc_7445 (CPUPPCState *env) #define POWERPC_EXCP_7455 (POWERPC_EXCP_74xx) #define POWERPC_INPUT_7455 (PPC_FLAGS_INPUT_6xx) #define POWERPC_BFDM_7455 (bfd_mach_ppc_7400) +#define POWERPC_FLAG_7455 (POWERPC_FLAG_VRE) __attribute__ (( unused )) static void init_proc_7455 (CPUPPCState *env) @@ -3955,6 +3987,7 @@ static void init_proc_7455 (CPUPPCState *env) //#define POWERPC_EXCP_970 (POWERPC_EXCP_970) #define POWERPC_INPUT_970 (PPC_FLAGS_INPUT_970) #define POWERPC_BFDM_970 (bfd_mach_ppc64) +#define POWERPC_FLAG_970 (POWERPC_FLAG_VRE) static void init_proc_970 (CPUPPCState *env) { @@ -4025,6 +4058,7 @@ static void init_proc_970 (CPUPPCState *env) #define POWERPC_EXCP_970FX (POWERPC_EXCP_970) #define POWERPC_INPUT_970FX (PPC_FLAGS_INPUT_970) #define POWERPC_BFDM_970FX (bfd_mach_ppc64) +#define POWERPC_FLAG_970FX (POWERPC_FLAG_VRE) static void init_proc_970FX (CPUPPCState *env) { @@ -4095,6 +4129,7 @@ static void init_proc_970FX (CPUPPCState *env) #define POWERPC_EXCP_970GX (POWERPC_EXCP_970) #define POWERPC_INPUT_970GX (PPC_FLAGS_INPUT_970) #define POWERPC_BFDM_970GX (bfd_mach_ppc64) +#define POWERPC_FLAG_970GX (POWERPC_FLAG_VRE) static void init_proc_970GX (CPUPPCState *env) { @@ -4164,6 +4199,7 @@ static void init_proc_970GX (CPUPPCState *env) #define POWERPC_EXCP_620 (POWERPC_EXCP_970) #define POWERPC_INPUT_620 (PPC_FLAGS_INPUT_970) #define POWERPC_BFDM_620 (bfd_mach_ppc64) +#define POWERPC_FLAG_620 (POWERPC_FLAG_NONE) __attribute__ (( unused )) static void init_proc_620 (CPUPPCState *env) @@ -4197,6 +4233,7 @@ static void init_proc_620 (CPUPPCState *env) #define POWERPC_INPUT_PPC32 POWERPC_INPUT_604 #define init_proc_PPC32 init_proc_604 #define POWERPC_BFDM_PPC32 POWERPC_BFDM_604 +#define POWERPC_FLAG_PPC32 POWERPC_FLAG_604 /* Default 64 bits PowerPC target will be 970 FX */ #define CPU_POWERPC_PPC64 CPU_POWERPC_970FX @@ -4207,6 +4244,7 @@ static void init_proc_620 (CPUPPCState *env) #define POWERPC_INPUT_PPC64 POWERPC_INPUT_970FX #define init_proc_PPC64 init_proc_970FX #define POWERPC_BFDM_PPC64 POWERPC_BFDM_970FX +#define POWERPC_FLAG_PPC64 POWERPC_FLAG_970FX /* Default PowerPC target will be PowerPC 32 */ #if defined (TARGET_PPC64) && 0 // XXX: TODO @@ -4218,6 +4256,7 @@ static void init_proc_620 (CPUPPCState *env) #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC64 #define init_proc_DEFAULT init_proc_PPC64 #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC64 +#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC64 #else #define CPU_POWERPC_DEFAULT CPU_POWERPC_PPC32 #define POWERPC_INSNS_DEFAULT POWERPC_INSNS_PPC32 @@ -4227,6 +4266,7 @@ static void init_proc_620 (CPUPPCState *env) #define POWERPC_INPUT_DEFAULT POWERPC_INPUT_PPC32 #define init_proc_DEFAULT init_proc_PPC32 #define POWERPC_BFDM_DEFAULT POWERPC_BFDM_PPC32 +#define POWERPC_FLAG_DEFAULT POWERPC_FLAG_PPC32 #endif /*****************************************************************************/ @@ -4724,6 +4764,7 @@ enum { .excp_model = glue(POWERPC_EXCP_,_type), \ .bus_model = glue(POWERPC_INPUT_,_type), \ .bfd_mach = glue(POWERPC_BFDM_,_type), \ + .flags = glue(POWERPC_FLAG_,_type), \ .init_proc = &glue(init_proc_,_type), \ } @@ -6016,6 +6057,7 @@ int cpu_ppc_register (CPUPPCState *env, ppc_def_t *def) env->mmu_model = def->mmu_model; env->excp_model = def->excp_model; env->bus_model = def->bus_model; + env->flags = def->flags; env->bfd_mach = def->bfd_mach; if (create_ppc_opcodes(env, def) < 0) return -1; |