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| -rw-r--r-- | qemu-tech.texi | 12 | ||||
| -rw-r--r-- | tcg/README | 5 |
2 files changed, 7 insertions, 10 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi index 2ab7cd4cc3..082b62c8e0 100644 --- a/qemu-tech.texi +++ b/qemu-tech.texi @@ -287,16 +287,8 @@ are very complicated and highly CPU dependent. QEMU uses some tricks which make it relatively easily portable and simple while achieving good performances. -After the release of version 0.9.1, QEMU switched to a new method of -generating code, Tiny Code Generator or TCG. TCG relaxes the -dependency on the exact version of the compiler used. The basic idea -is to split every target instruction into a couple of RISC-like TCG -ops (see @code{target-i386/translate.c}). Some optimizations can be -performed at this stage, including liveness analysis and trivial -constant expression evaluation. TCG ops are then implemented in the -host CPU back end, also known as TCG target (see -@code{tcg/i386/tcg-target.inc.c}). For more information, please take a -look at @code{tcg/README}. +QEMU's dynamic translation backend is called TCG, for "Tiny Code +Generator". For more information, please take a look at @code{tcg/README}. @node Condition code optimisations @section Condition code optimisations diff --git a/tcg/README b/tcg/README index 1d48aa963f..ae31388c59 100644 --- a/tcg/README +++ b/tcg/README @@ -8,6 +8,11 @@ in the QOP code generator written by Paul Brook. 2) Definitions +TCG receives RISC-like "TCG ops" and performs some optimizations on them, +including liveness analysis and trivial constant expression +evaluation. TCG ops are then implemented in the host CPU back end, +also known as the TCG "target". + The TCG "target" is the architecture for which we generate the code. It is of course not the same as the "target" of QEMU which is the emulated architecture. As TCG started as a generic C backend used |