diff options
| -rw-r--r-- | gdbstub.c | 23 |
1 files changed, 22 insertions, 1 deletions
@@ -620,7 +620,17 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int i) #elif defined (TARGET_PPC) +/* Old gdb always expects FP registers. Newer (xml-aware) gdb only + expects whatever the target description contains. Due to a + historical mishap the FP registers appear in between core integer + regs and PC, MSR, CR, and so forth. We hack round this by giving the + FP regs zero size when talking to a newer gdb. */ #define NUM_CORE_REGS 71 +#if defined (TARGET_PPC64) +#define GDB_CORE_XML "power64-core.xml" +#else +#define GDB_CORE_XML "power-core.xml" +#endif static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) { @@ -629,6 +639,8 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) GET_REGL(env->gpr[n]); } else if (n < 64) { /* fprs */ + if (gdb_has_xml) + return 0; stfq_p(mem_buf, env->fpr[n-32]); return 8; } else { @@ -646,7 +658,12 @@ static int cpu_gdb_read_register(CPUState *env, uint8_t *mem_buf, int n) case 67: GET_REGL(env->lr); case 68: GET_REGL(env->ctr); case 69: GET_REGL(env->xer); - case 70: GET_REG32(0); /* fpscr */ + case 70: + { + if (gdb_has_xml) + return 0; + GET_REG32(0); /* fpscr */ + } } } return 0; @@ -660,6 +677,8 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return sizeof(target_ulong); } else if (n < 64) { /* fprs */ + if (gdb_has_xml) + return 0; env->fpr[n-32] = ldfq_p(mem_buf); return 8; } else { @@ -689,6 +708,8 @@ static int cpu_gdb_write_register(CPUState *env, uint8_t *mem_buf, int n) return sizeof(target_ulong); case 70: /* fpscr */ + if (gdb_has_xml) + return 0; return 4; } } |