diff options
| -rw-r--r-- | exec.c | 8 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 5 |
2 files changed, 12 insertions, 1 deletions
@@ -1959,6 +1959,10 @@ static uint32_t unassigned_mem_readb(void *opaque, target_phys_addr_t addr) #ifdef DEBUG_UNASSIGNED printf("Unassigned mem read 0x%08x\n", (int)addr); #endif +#ifdef TARGET_SPARC + // Not enabled yet because of bugs in gdbstub etc. + //raise_exception(TT_DATA_ACCESS); +#endif return 0; } @@ -1967,6 +1971,10 @@ static void unassigned_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_ #ifdef DEBUG_UNASSIGNED printf("Unassigned mem write 0x%08x = 0x%x\n", (int)addr, val); #endif +#ifdef TARGET_SPARC + // Not enabled yet because of bugs in gdbstub etc. + //raise_exception(TT_DATA_ACCESS); +#endif } static CPUReadMemoryFunc *unassigned_mem_read[3] = { diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index f3f872ff72..91ed11fd05 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -40,6 +40,7 @@ #define TT_DFAULT 0x09 #define TT_TOVF 0x0a #define TT_EXTINT 0x10 +#define TT_DATA_ACCESS 0x29 #define TT_DIV_ZERO 0x2a #define TT_NCP_INSN 0x24 #define TT_TRAP 0x80 @@ -55,7 +56,8 @@ #define TT_DIV_ZERO 0x28 #define TT_DFAULT 0x30 #define TT_DMISS 0x31 -#define TT_DPROT 0x32 +#define TT_DATA_ACCESS 0x32 +#define TT_DPROT 0x33 #define TT_UNALIGNED 0x34 #define TT_PRIV_ACT 0x37 #define TT_EXTINT 0x40 @@ -287,6 +289,7 @@ void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); #endif int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); +void raise_exception(int tt); #include "cpu-all.h" |