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-rw-r--r--hw/ppc/ppc440_uc.c3
-rw-r--r--hw/ppc/sam460ex.c7
2 files changed, 5 insertions, 5 deletions
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 976ab2b5d8..e312fdba70 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -392,8 +392,7 @@ static uint32_t dcr_read_sdr(void *opaque, int dcrn)
case SDR0_CFGDATA:
switch (sdr->addr) {
case SDR0_STRP0:
- /* FIXME: Is this correct? This breaks timing in U-Boot */
- ret = 0; /*(0xb5 << 8) | (1 << 4) | 9 */
+ ret = (0xb5 << 8) | (1 << 4) | 9;
break;
case SDR0_STRP1:
ret = (5 << 29) | (2 << 26) | (1 << 24);
diff --git a/hw/ppc/sam460ex.c b/hw/ppc/sam460ex.c
index 70b8e76d9c..dfff262f96 100644
--- a/hw/ppc/sam460ex.c
+++ b/hw/ppc/sam460ex.c
@@ -67,6 +67,7 @@
IRQ12 = SM502_INT
*/
+#define CPU_FREQ 1150000000
#define SDRAM_NR_BANKS 4
/* FIXME: See u-boot.git 8ac41e, also fix in ppc440_uc.c */
@@ -253,8 +254,8 @@ static int sam460ex_load_device_tree(hwaddr addr,
char *filename;
int fdt_size;
void *fdt;
- uint32_t tb_freq = 50000000;
- uint32_t clock_freq = 50000000;
+ uint32_t tb_freq = CPU_FREQ;
+ uint32_t clock_freq = CPU_FREQ;
filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, BINARY_DEVICE_TREE_FILE);
if (!filename) {
@@ -416,7 +417,7 @@ static void sam460ex_init(MachineState *machine)
boot_info = g_malloc0(sizeof(*boot_info));
env->load_info = boot_info;
- ppc_booke_timers_init(cpu, 50000000, 0);
+ ppc_booke_timers_init(cpu, CPU_FREQ, 0);
ppc_dcr_init(env, NULL, NULL);
/* PLB arbitrer */