diff options
| -rw-r--r-- | hw/microblaze_boot.c | 16 | ||||
| -rw-r--r-- | hw/microblaze_boot.h | 4 | ||||
| -rw-r--r-- | hw/petalogix_ml605_mmu.c | 6 | ||||
| -rw-r--r-- | hw/petalogix_s3adsp1800_mmu.c | 6 |
4 files changed, 18 insertions, 14 deletions
diff --git a/hw/microblaze_boot.c b/hw/microblaze_boot.c index b4fbb10dd0..1030e9c8ed 100644 --- a/hw/microblaze_boot.c +++ b/hw/microblaze_boot.c @@ -35,7 +35,7 @@ static struct { - void (*machine_cpu_reset)(CPUMBState *); + void (*machine_cpu_reset)(MicroBlazeCPU *); uint32_t bootstrap_pc; uint32_t cmdline; uint32_t fdt; @@ -43,14 +43,15 @@ static struct static void main_cpu_reset(void *opaque) { - CPUMBState *env = opaque; + MicroBlazeCPU *cpu = opaque; + CPUMBState *env = &cpu->env; - cpu_state_reset(env); + cpu_reset(CPU(cpu)); env->regs[5] = boot_info.cmdline; env->regs[7] = boot_info.fdt; env->sregs[SR_PC] = boot_info.bootstrap_pc; if (boot_info.machine_cpu_reset) { - boot_info.machine_cpu_reset(env); + boot_info.machine_cpu_reset(cpu); } } @@ -99,11 +100,10 @@ static uint64_t translate_kernel_address(void *opaque, uint64_t addr) return addr - 0x30000000LL; } -void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base, +void microblaze_load_kernel(MicroBlazeCPU *cpu, target_phys_addr_t ddr_base, uint32_t ramsize, const char *dtb_filename, - void (*machine_cpu_reset)(CPUMBState *)) + void (*machine_cpu_reset)(MicroBlazeCPU *)) { - QemuOpts *machine_opts; const char *kernel_filename = NULL; const char *kernel_cmdline = NULL; @@ -122,7 +122,7 @@ void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base, } boot_info.machine_cpu_reset = machine_cpu_reset; - qemu_register_reset(main_cpu_reset, env); + qemu_register_reset(main_cpu_reset, cpu); if (kernel_filename) { int kernel_size; diff --git a/hw/microblaze_boot.h b/hw/microblaze_boot.h index bf9d136f12..c9a3064d27 100644 --- a/hw/microblaze_boot.h +++ b/hw/microblaze_boot.h @@ -3,8 +3,8 @@ #include "hw.h" -void microblaze_load_kernel(CPUMBState *env, target_phys_addr_t ddr_base, +void microblaze_load_kernel(MicroBlazeCPU *cpu, target_phys_addr_t ddr_base, uint32_t ramsize, const char *dtb_filename, - void (*machine_cpu_reset)(CPUMBState *)); + void (*machine_cpu_reset)(MicroBlazeCPU *)); #endif /* __MICROBLAZE_BOOT __ */ diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c index 681924199e..bff63e389a 100644 --- a/hw/petalogix_ml605_mmu.c +++ b/hw/petalogix_ml605_mmu.c @@ -54,8 +54,10 @@ #define AXIENET_BASEADDR 0x82780000 #define AXIDMA_BASEADDR 0x84600000 -static void machine_cpu_reset(CPUMBState *env) +static void machine_cpu_reset(MicroBlazeCPU *cpu) { + CPUMBState *env = &cpu->env; + env->pvr.regs[10] = 0x0e000000; /* virtex 6 */ /* setup pvr to match kernel setting */ env->pvr.regs[5] |= PVR5_DCACHE_WRITEBACK_MASK; @@ -133,7 +135,7 @@ petalogix_ml605_init(ram_addr_t ram_size, irq[1], irq[0], 100 * 1000000); } - microblaze_load_kernel(env, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE, + microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE, machine_cpu_reset); } diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c index 7ff3cd5432..f41c559e61 100644 --- a/hw/petalogix_s3adsp1800_mmu.c +++ b/hw/petalogix_s3adsp1800_mmu.c @@ -49,8 +49,10 @@ #define UARTLITE_BASEADDR 0x84000000 #define ETHLITE_BASEADDR 0x81000000 -static void machine_cpu_reset(CPUMBState *env) +static void machine_cpu_reset(MicroBlazeCPU *cpu) { + CPUMBState *env = &cpu->env; + env->pvr.regs[10] = 0x0c000000; /* spartan 3a dsp family. */ } @@ -107,7 +109,7 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size, xilinx_timer_create(TIMER_BASEADDR, irq[0], 2, 62 * 1000000); xilinx_ethlite_create(&nd_table[0], ETHLITE_BASEADDR, irq[1], 0, 0); - microblaze_load_kernel(env, ddr_base, ram_size, + microblaze_load_kernel(cpu, ddr_base, ram_size, BINARY_DEVICE_TREE_FILE, machine_cpu_reset); } |