diff options
-rw-r--r-- | target-xtensa/gdbstub.c | 8 | ||||
-rw-r--r-- | target-xtensa/helper.c | 4 | ||||
-rw-r--r-- | target-xtensa/op_helper.c | 20 | ||||
-rw-r--r-- | target-xtensa/translate.c | 28 | ||||
-rw-r--r-- | target-xtensa/xtensa-semi.c | 2 |
5 files changed, 31 insertions, 31 deletions
diff --git a/target-xtensa/gdbstub.c b/target-xtensa/gdbstub.c index bc2e1b55f6..dcf05ad88c 100644 --- a/target-xtensa/gdbstub.c +++ b/target-xtensa/gdbstub.c @@ -63,8 +63,8 @@ int xtensa_cpu_gdb_read_register(CPUState *cs, uint8_t *mem_buf, int n) return gdb_get_reg32(mem_buf, env->regs[reg->targno & 0x0f]); default: - qemu_log("%s from reg %d of unsupported type %d\n", - __func__, n, reg->type); + qemu_log_mask(LOG_UNIMP, "%s from reg %d of unsupported type %d\n", + __func__, n, reg->type); return 0; } } @@ -117,8 +117,8 @@ int xtensa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) break; default: - qemu_log("%s to reg %d of unsupported type %d\n", - __func__, n, reg->type); + qemu_log_mask(LOG_UNIMP, "%s to reg %d of unsupported type %d\n", + __func__, n, reg->type); return 0; } diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 2c3447ba6b..cf25bf8fbf 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -254,8 +254,8 @@ void xtensa_cpu_do_interrupt(CPUState *cs) env->config->exception_vector[cs->exception_index]); env->exception_taken = 1; } else { - qemu_log("%s(pc = %08x) bad exception_index: %d\n", - __func__, env->pc, cs->exception_index); + qemu_log_mask(CPU_LOG_INT, "%s(pc = %08x) bad exception_index: %d\n", + __func__, env->pc, cs->exception_index); } break; diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index 718e54e7b5..02100af442 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -245,8 +245,8 @@ void HELPER(entry)(CPUXtensaState *env, uint32_t pc, uint32_t s, uint32_t imm) { int callinc = (env->sregs[PS] & PS_CALLINC) >> PS_CALLINC_SHIFT; if (s > 3 || ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) { - qemu_log("Illegal entry instruction(pc = %08x), PS = %08x\n", - pc, env->sregs[PS]); + qemu_log_mask(LOG_GUEST_ERROR, "Illegal entry instruction(pc = %08x), PS = %08x\n", + pc, env->sregs[PS]); HELPER(exception_cause)(env, pc, ILLEGAL_INSTRUCTION_CAUSE); } else { uint32_t windowstart = xtensa_replicate_windowstart(env) >> @@ -307,9 +307,9 @@ uint32_t HELPER(retw)(CPUXtensaState *env, uint32_t pc) if (n == 0 || (m != 0 && m != n) || ((env->sregs[PS] & (PS_WOE | PS_EXCM)) ^ PS_WOE) != 0) { - qemu_log("Illegal retw instruction(pc = %08x), " - "PS = %08x, m = %d, n = %d\n", - pc, env->sregs[PS], m, n); + qemu_log_mask(LOG_GUEST_ERROR, "Illegal retw instruction(pc = %08x), " + "PS = %08x, m = %d, n = %d\n", + pc, env->sregs[PS], m, n); HELPER(exception_cause)(env, pc, ILLEGAL_INSTRUCTION_CAUSE); } else { int owb = windowbase; @@ -743,8 +743,8 @@ void xtensa_tlb_set_entry(CPUXtensaState *env, bool dtlb, xtensa_tlb_set_entry_mmu(env, entry, dtlb, wi, ei, vpn, pte); tlb_flush_page(cs, entry->vaddr); } else { - qemu_log("%s %d, %d, %d trying to set immutable entry\n", - __func__, dtlb, wi, ei); + qemu_log_mask(LOG_GUEST_ERROR, "%s %d, %d, %d trying to set immutable entry\n", + __func__, dtlb, wi, ei); } } else { tlb_flush_page(cs, entry->vaddr); @@ -806,15 +806,15 @@ static void set_dbreak(CPUXtensaState *env, unsigned i, uint32_t dbreaka, } /* contiguous mask after inversion is one less than some power of 2 */ if ((~mask + 1) & ~mask) { - qemu_log("DBREAKC mask is not contiguous: 0x%08x\n", dbreakc); + qemu_log_mask(LOG_GUEST_ERROR, "DBREAKC mask is not contiguous: 0x%08x\n", dbreakc); /* cut mask after the first zero bit */ mask = 0xffffffff << (32 - clo32(mask)); } if (cpu_watchpoint_insert(cs, dbreaka & mask, ~mask + 1, flags, &env->cpu_watchpoint[i])) { env->cpu_watchpoint[i] = NULL; - qemu_log("Failed to set data breakpoint at 0x%08x/%d\n", - dbreaka & mask, ~mask + 1); + qemu_log_mask(LOG_GUEST_ERROR, "Failed to set data breakpoint at 0x%08x/%d\n", + dbreaka & mask, ~mask + 1); } } diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 06b0163412..fbcec945a1 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -501,9 +501,9 @@ static bool gen_check_sr(DisasContext *dc, uint32_t sr, unsigned access) { if (!xtensa_option_bits_enabled(dc->config, sregnames[sr].opt_bits)) { if (sregnames[sr].name) { - qemu_log("SR %s is not configured\n", sregnames[sr].name); + qemu_log_mask(LOG_GUEST_ERROR, "SR %s is not configured\n", sregnames[sr].name); } else { - qemu_log("SR %d is not implemented\n", sr); + qemu_log_mask(LOG_UNIMP, "SR %d is not implemented\n", sr); } gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); return false; @@ -514,8 +514,8 @@ static bool gen_check_sr(DisasContext *dc, uint32_t sr, unsigned access) [SR_X] = "xsr", }; assert(access < ARRAY_SIZE(access_text) && access_text[access]); - qemu_log("SR %s is not available for %s\n", sregnames[sr].name, - access_text[access]); + qemu_log_mask(LOG_GUEST_ERROR, "SR %s is not available for %s\n", sregnames[sr].name, + access_text[access]); gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); return false; } @@ -875,18 +875,18 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) { #define HAS_OPTION_BITS(opt) do { \ if (!option_bits_enabled(dc, opt)) { \ - qemu_log("Option is not enabled %s:%d\n", \ - __FILE__, __LINE__); \ + qemu_log_mask(LOG_GUEST_ERROR, "Option is not enabled %s:%d\n", \ + __FILE__, __LINE__); \ goto invalid_opcode; \ } \ } while (0) #define HAS_OPTION(opt) HAS_OPTION_BITS(XTENSA_OPTION_BIT(opt)) -#define TBD() qemu_log("TBD(pc = %08x): %s:%d\n", dc->pc, __FILE__, __LINE__) +#define TBD() qemu_log_mask(LOG_UNIMP, "TBD(pc = %08x): %s:%d\n", dc->pc, __FILE__, __LINE__) #define RESERVED() do { \ - qemu_log("RESERVED(pc = %08x, %02x%02x%02x): %s:%d\n", \ - dc->pc, b0, b1, b2, __FILE__, __LINE__); \ + qemu_log_mask(LOG_GUEST_ERROR, "RESERVED(pc = %08x, %02x%02x%02x): %s:%d\n", \ + dc->pc, b0, b1, b2, __FILE__, __LINE__); \ goto invalid_opcode; \ } while (0) @@ -1186,7 +1186,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) gen_jump(dc, cpu_SR[EPC1 + RRR_S - 1]); } } else { - qemu_log("RFI %d is illegal\n", RRR_S); + qemu_log_mask(LOG_GUEST_ERROR, "RFI %d is illegal\n", RRR_S); gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); } break; @@ -1222,7 +1222,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) gen_helper_simcall(cpu_env); } } else { - qemu_log("SIMCALL but semihosting is disabled\n"); + qemu_log_mask(LOG_GUEST_ERROR, "SIMCALL but semihosting is disabled\n"); gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); } break; @@ -1865,7 +1865,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) if (uregnames[st].name) { tcg_gen_mov_i32(cpu_R[RRR_R], cpu_UR[st]); } else { - qemu_log("RUR %d not implemented, ", st); + qemu_log_mask(LOG_UNIMP, "RUR %d not implemented, ", st); TBD(); } } @@ -1876,7 +1876,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) if (uregnames[RSR_SR].name) { gen_wur(RSR_SR, cpu_R[RRR_T]); } else { - qemu_log("WUR %d not implemented, ", RSR_SR); + qemu_log_mask(LOG_UNIMP, "WUR %d not implemented, ", RSR_SR); TBD(); } } @@ -3006,7 +3006,7 @@ static void disas_xtensa_insn(CPUXtensaState *env, DisasContext *dc) return; invalid_opcode: - qemu_log("INVALID(pc = %08x)\n", dc->pc); + qemu_log_mask(LOG_GUEST_ERROR, "INVALID(pc = %08x)\n", dc->pc); gen_exception_cause(dc, ILLEGAL_INSTRUCTION_CAUSE); #undef HAS_OPTION } diff --git a/target-xtensa/xtensa-semi.c b/target-xtensa/xtensa-semi.c index 16e9d8c7b8..384d9c2ebe 100644 --- a/target-xtensa/xtensa-semi.c +++ b/target-xtensa/xtensa-semi.c @@ -313,7 +313,7 @@ void HELPER(simcall)(CPUXtensaState *env) break; default: - qemu_log("%s(%d): not implemented\n", __func__, regs[2]); + qemu_log_mask(LOG_GUEST_ERROR, "%s(%d): not implemented\n", __func__, regs[2]); regs[2] = -1; regs[3] = TARGET_ENOSYS; break; |