diff options
| -rw-r--r-- | target/mips/tcg/meson.build | 3 | ||||
| -rw-r--r-- | target/mips/tcg/msa.decode (renamed from target/mips/tcg/msa32.decode) | 8 | ||||
| -rw-r--r-- | target/mips/tcg/msa64.decode | 17 | ||||
| -rw-r--r-- | target/mips/tcg/msa_translate.c | 14 |
4 files changed, 10 insertions, 32 deletions
diff --git a/target/mips/tcg/meson.build b/target/mips/tcg/meson.build index 5d8acbaf0d..bf4001e574 100644 --- a/target/mips/tcg/meson.build +++ b/target/mips/tcg/meson.build @@ -1,8 +1,7 @@ gen = [ decodetree.process('mips32r6.decode', extra_args: '--static-decode=decode_mips32r6'), decodetree.process('mips64r6.decode', extra_args: '--static-decode=decode_mips64r6'), - decodetree.process('msa32.decode', extra_args: '--static-decode=decode_msa32'), - decodetree.process('msa64.decode', extra_args: '--static-decode=decode_msa64'), + decodetree.process('msa.decode', extra_args: '--decode=decode_ase_msa'), decodetree.process('tx79.decode', extra_args: '--static-decode=decode_tx79'), ] diff --git a/target/mips/tcg/msa32.decode b/target/mips/tcg/msa.decode index ca200e373b..bf132e36b9 100644 --- a/target/mips/tcg/msa32.decode +++ b/target/mips/tcg/msa.decode @@ -6,9 +6,10 @@ # # Reference: # MIPS Architecture for Programmers Volume IV-j -# The MIPS32 SIMD Architecture Module, Revision 1.12 -# (Document Number: MD00866-2B-MSA32-AFP-01.12) -# +# - The MIPS32 SIMD Architecture Module, Revision 1.12 +# (Document Number: MD00866-2B-MSA32-AFP-01.12) +# - The MIPS64 SIMD Architecture Module, Revision 1.12 +# (Document Number: MD00868-1D-MSA64-AFP-01.12) &rtype rs rt rd sa @@ -19,6 +20,7 @@ @bz_df ...... ... df:2 wt:5 s16:16 &msa_bz LSA 000000 ..... ..... ..... 000 .. 000101 @lsa +DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa BZ_V 010001 01011 ..... ................ @bz BNZ_V 010001 01111 ..... ................ @bz diff --git a/target/mips/tcg/msa64.decode b/target/mips/tcg/msa64.decode deleted file mode 100644 index d2442474d0..0000000000 --- a/target/mips/tcg/msa64.decode +++ /dev/null @@ -1,17 +0,0 @@ -# MIPS SIMD Architecture Module instruction set -# -# Copyright (C) 2020 Philippe Mathieu-Daudé -# -# SPDX-License-Identifier: LGPL-2.1-or-later -# -# Reference: -# MIPS Architecture for Programmers Volume IV-j -# The MIPS64 SIMD Architecture Module, Revision 1.12 -# (Document Number: MD00868-1D-MSA64-AFP-01.12) -# - -&rtype rs rt rd sa !extern - -@lsa ...... rs:5 rt:5 rd:5 ... sa:2 ...... &rtype - -DLSA 000000 ..... ..... ..... 000 .. 010101 @lsa diff --git a/target/mips/tcg/msa_translate.c b/target/mips/tcg/msa_translate.c index 9df4497c88..eed2eca6c9 100644 --- a/target/mips/tcg/msa_translate.c +++ b/target/mips/tcg/msa_translate.c @@ -18,8 +18,7 @@ #include "internal.h" /* Include the auto-generated decoder. */ -#include "decode-msa32.c.inc" -#include "decode-msa64.c.inc" +#include "decode-msa.c.inc" #define OPC_MSA (0x1E << 26) @@ -2269,13 +2268,8 @@ static bool trans_LSA(DisasContext *ctx, arg_rtype *a) static bool trans_DLSA(DisasContext *ctx, arg_rtype *a) { - return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); -} - -bool decode_ase_msa(DisasContext *ctx, uint32_t insn) -{ - if (TARGET_LONG_BITS == 64 && decode_msa64(ctx, insn)) { - return true; + if (TARGET_LONG_BITS != 64) { + return false; } - return decode_msa32(ctx, insn); + return gen_dlsa(ctx, a->rd, a->rt, a->rs, a->sa); } |