diff options
| -rw-r--r-- | hw/ppc/pnv.c | 2 | ||||
| -rw-r--r-- | hw/ppc/pnv_bmc.c | 8 | ||||
| -rw-r--r-- | include/hw/ppc/pnv.h | 2 |
3 files changed, 7 insertions, 5 deletions
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 6a0aa78d53..f0b8f3ad26 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -820,7 +820,7 @@ static void pnv_init(MachineState *machine) g_free(chip_typename); /* Create the machine BMC simulator */ - pnv->bmc = pnv_bmc_create(); + pnv->bmc = pnv_bmc_create(pnv->pnor); /* Instantiate ISA bus on chip 0 */ pnv->isa_bus = pnv_isa_create(pnv->chips[0], &error_fatal); diff --git a/hw/ppc/pnv_bmc.c b/hw/ppc/pnv_bmc.c index 07fa1e1c7e..8863354c1c 100644 --- a/hw/ppc/pnv_bmc.c +++ b/hw/ppc/pnv_bmc.c @@ -143,8 +143,8 @@ static uint16_t bytes_to_blocks(uint32_t bytes) static void hiomap_cmd(IPMIBmcSim *ibs, uint8_t *cmd, unsigned int cmd_len, RspBuffer *rsp) { - PnvMachineState *pnv = PNV_MACHINE(qdev_get_machine()); - PnvPnor *pnor = pnv->pnor; + PnvPnor *pnor = PNV_PNOR(object_property_get_link(OBJECT(ibs), "pnor", + &error_abort)); uint32_t pnor_size = pnor->size; uint32_t pnor_addr = PNOR_SPI_OFFSET; bool readonly = false; @@ -217,11 +217,13 @@ static const IPMINetfn hiomap_netfn = { * Instantiate the machine BMC. PowerNV uses the QEMU internal * simulator but it could also be external. */ -IPMIBmc *pnv_bmc_create(void) +IPMIBmc *pnv_bmc_create(PnvPnor *pnor) { Object *obj; obj = object_new(TYPE_IPMI_BMC_SIMULATOR); + object_ref(OBJECT(pnor)); + object_property_add_const_link(obj, "pnor", OBJECT(pnor), &error_abort); object_property_set_bool(obj, true, "realized", &error_fatal); /* Install the HIOMAP protocol handlers to access the PNOR */ diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 4b9012f994..2504d8cd4f 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -229,7 +229,7 @@ PnvChip *pnv_get_chip(uint32_t chip_id); */ void pnv_dt_bmc_sensors(IPMIBmc *bmc, void *fdt); void pnv_bmc_powerdown(IPMIBmc *bmc); -IPMIBmc *pnv_bmc_create(void); +IPMIBmc *pnv_bmc_create(PnvPnor *pnor); /* * POWER8 MMIO base addresses |