diff options
| -rw-r--r-- | target-mips/dsp_helper.c | 3 | ||||
| -rw-r--r-- | tests/tcg/mips/mips32-dsp/extp.c | 18 |
2 files changed, 19 insertions, 2 deletions
diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index 9212789b4e..a55f866581 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -3415,8 +3415,7 @@ target_ulong helper_extp(target_ulong ac, target_ulong size, CPUMIPSState *env) if (sub >= -1) { acc = ((uint64_t)env->active_tc.HI[ac] << 32) | ((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO); - temp = (acc >> (start_pos - size)) & - (((uint32_t)0x01 << (size + 1)) - 1); + temp = (acc >> (start_pos - size)) & (~0U >> (31 - size)); set_DSPControl_efi(0, env); } else { set_DSPControl_efi(1, env); diff --git a/tests/tcg/mips/mips32-dsp/extp.c b/tests/tcg/mips/mips32-dsp/extp.c index 21a67af216..b18bdb34c8 100644 --- a/tests/tcg/mips/mips32-dsp/extp.c +++ b/tests/tcg/mips/mips32-dsp/extp.c @@ -40,5 +40,23 @@ int main() dsp = (dsp >> 14) & 0x01; assert(dsp == 1); + ach = 0; + acl = 0x80000001; + dsp = 0x1F; + result = 0x80000001; + + __asm + ("wrdsp %1\n\t" + "mthi %2, $ac2\n\t" + "mtlo %3, $ac2\n\t" + "extp %0, $ac2, 0x1F\n\t" + "rddsp %1\n\t" + : "=r"(rt), "+r"(dsp) + : "r"(ach), "r"(acl) + ); + dsp = (dsp >> 14) & 0x01; + assert(dsp == 0); + assert(result == rt); + return 0; } |