diff options
| -rw-r--r-- | linux-user/elfload.c | 9 | ||||
| -rw-r--r-- | target/microblaze/cpu.h | 2 | ||||
| -rw-r--r-- | target/microblaze/gdbstub.c | 4 | ||||
| -rw-r--r-- | target/microblaze/translate.c | 16 |
4 files changed, 12 insertions, 19 deletions
diff --git a/linux-user/elfload.c b/linux-user/elfload.c index 69936dcd45..58b3f4ef4d 100644 --- a/linux-user/elfload.c +++ b/linux-user/elfload.c @@ -1038,9 +1038,12 @@ static void elf_core_copy_regs(target_elf_gregset_t *regs, const CPUMBState *env (*regs)[pos++] = tswapreg(env->regs[i]); } - for (i = 0; i < 6; i++) { - (*regs)[pos++] = tswapreg(env->sregs[i]); - } + (*regs)[pos++] = tswapreg(env->pc); + (*regs)[pos++] = tswapreg(env->msr); + (*regs)[pos++] = 0; + (*regs)[pos++] = tswapreg(env->ear); + (*regs)[pos++] = 0; + (*regs)[pos++] = tswapreg(env->esr); } #endif /* TARGET_MICROBLAZE */ diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index deddb47abb..610ddfb719 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -242,7 +242,7 @@ struct CPUMBState { uint64_t esr; uint64_t fsr; uint64_t btr; - uint64_t sregs[14]; + uint64_t edr; float_status fp_status; /* Stack protectors. Yes, it's a hw feature. */ uint32_t slr, shr; diff --git a/target/microblaze/gdbstub.c b/target/microblaze/gdbstub.c index cde8c169bf..9cba9d2215 100644 --- a/target/microblaze/gdbstub.c +++ b/target/microblaze/gdbstub.c @@ -81,7 +81,7 @@ int mb_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n) val = env->pvr.regs[n - GDB_PVR0]; break; case GDB_EDR: - val = env->sregs[SR_EDR]; + val = env->edr; break; case GDB_SLR: val = env->slr; @@ -137,7 +137,7 @@ int mb_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) env->pvr.regs[n - GDB_PVR0] = tmp; break; case GDB_EDR: - env->sregs[SR_EDR] = tmp; + env->edr = tmp; break; case GDB_SLR: env->slr = tmp; diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 469e1f103a..7d307e6b48 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -103,12 +103,6 @@ static const char *regnames[] = "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", }; -static const char *special_regnames[] = -{ - "rpc", "rmsr", "sr2", "rear", "sr4", "resr", "sr6", "rfsr", - "sr8", "sr9", "sr10", "rbtr", "sr12", "redr" -}; - static inline void t_sync_flags(DisasContext *dc) { /* Synch the tb dependent flags between translator and runtime. */ @@ -1828,7 +1822,7 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, int flags) /* Registers that aren't modeled are reported as 0 */ qemu_fprintf(f, "redr=%" PRIx64 " rpid=0 rzpr=0 rtlbx=0 rtlbsx=0 " - "rtlblo=0 rtlbhi=0\n", env->sregs[SR_EDR]); + "rtlblo=0 rtlbhi=0\n", env->edr); qemu_fprintf(f, "slr=%x shr=%x\n", env->slr, env->shr); for (i = 0; i < 32; i++) { qemu_fprintf(f, "r%2.2d=%8.8x ", i, env->regs[i]); @@ -1881,12 +1875,8 @@ void mb_tcg_init(void) tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, fsr), "rfsr"); cpu_SR[SR_BTR] = tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, btr), "rbtr"); - - for (i = SR_BTR + 1; i < ARRAY_SIZE(cpu_SR); i++) { - cpu_SR[i] = tcg_global_mem_new_i64(cpu_env, - offsetof(CPUMBState, sregs[i]), - special_regnames[i]); - } + cpu_SR[SR_EDR] = + tcg_global_mem_new_i64(cpu_env, offsetof(CPUMBState, edr), "redr"); } void restore_state_to_opc(CPUMBState *env, TranslationBlock *tb, |