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-rw-r--r--hw/acpi/piix4.c6
-rw-r--r--hw/i386/pc_q35.c10
-rw-r--r--hw/isa/vt82c686.c13
-rw-r--r--hw/mips/fuloong2e.c6
-rw-r--r--hw/pci-bridge/dec.c6
-rw-r--r--hw/pci-host/bonito.c4
-rw-r--r--hw/pci-host/sabre.c13
-rw-r--r--hw/pci/pci.c8
-rw-r--r--hw/ppc/mac_newworld.c4
-rw-r--r--hw/ppc/mac_oldworld.c4
-rw-r--r--hw/sparc64/sun4u.c8
11 files changed, 44 insertions, 38 deletions
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index e27f57195a..1262abc77a 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -514,10 +514,12 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
qemu_irq sci_irq, qemu_irq smi_irq,
int smm_enabled, DeviceState **piix4_pm)
{
+ PCIDevice *pci_dev;
DeviceState *dev;
PIIX4PMState *s;
- dev = DEVICE(pci_create(bus, devfn, TYPE_PIIX4_PM));
+ pci_dev = pci_new(devfn, TYPE_PIIX4_PM);
+ dev = DEVICE(pci_dev);
qdev_prop_set_uint32(dev, "smb_io_base", smb_io_base);
if (piix4_pm) {
*piix4_pm = dev;
@@ -531,7 +533,7 @@ I2CBus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
s->use_acpi_pci_hotplug = false;
}
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
return s->smb.smbus;
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 59307d91e2..a6b6add2ef 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -100,16 +100,16 @@ static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
return -1;
}
- ehci = pci_create_multifunction(bus, PCI_DEVFN(slot, 7), true, name);
- qdev_init_nofail(&ehci->qdev);
+ ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), true, name);
+ pci_realize_and_unref(ehci, bus, &error_fatal);
usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
for (i = 0; i < 3; i++) {
- uhci = pci_create_multifunction(bus, PCI_DEVFN(slot, comp[i].func),
- true, comp[i].name);
+ uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true,
+ comp[i].name);
qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
- qdev_init_nofail(&uhci->qdev);
+ pci_realize_and_unref(uhci, bus, &error_fatal);
}
return 0;
}
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index fac4e56b7d..18160ca445 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -23,6 +23,7 @@
#include "hw/isa/apm.h"
#include "hw/acpi/acpi.h"
#include "hw/i2c/pm_smbus.h"
+#include "qapi/error.h"
#include "qemu/module.h"
#include "qemu/timer.h"
#include "exec/address-spaces.h"
@@ -276,8 +277,8 @@ void vt82c686b_ac97_init(PCIBus *bus, int devfn)
{
PCIDevice *dev;
- dev = pci_create(bus, devfn, TYPE_VT82C686B_AC97_DEVICE);
- qdev_init_nofail(&dev->qdev);
+ dev = pci_new(devfn, TYPE_VT82C686B_AC97_DEVICE);
+ pci_realize_and_unref(dev, bus, &error_fatal);
}
static void via_ac97_class_init(ObjectClass *klass, void *data)
@@ -320,8 +321,8 @@ void vt82c686b_mc97_init(PCIBus *bus, int devfn)
{
PCIDevice *dev;
- dev = pci_create(bus, devfn, TYPE_VT82C686B_MC97_DEVICE);
- qdev_init_nofail(&dev->qdev);
+ dev = pci_new(devfn, TYPE_VT82C686B_MC97_DEVICE);
+ pci_realize_and_unref(dev, bus, &error_fatal);
}
static void via_mc97_class_init(ObjectClass *klass, void *data)
@@ -388,12 +389,12 @@ I2CBus *vt82c686b_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
PCIDevice *dev;
VT686PMState *s;
- dev = pci_create(bus, devfn, TYPE_VT82C686B_PM_DEVICE);
+ dev = pci_new(devfn, TYPE_VT82C686B_PM_DEVICE);
qdev_prop_set_uint32(&dev->qdev, "smb_io_base", smb_io_base);
s = VT82C686B_PM_DEVICE(dev);
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, bus, &error_fatal);
return s->smb.smbus;
}
diff --git a/hw/mips/fuloong2e.c b/hw/mips/fuloong2e.c
index 7a65166cf0..8ca31e5162 100644
--- a/hw/mips/fuloong2e.c
+++ b/hw/mips/fuloong2e.c
@@ -297,6 +297,7 @@ static void mips_fuloong2e_init(MachineState *machine)
long bios_size;
uint8_t *spd_data;
int64_t kernel_entry;
+ PCIDevice *pci_dev;
PCIBus *pci_bus;
ISABus *isa_bus;
I2CBus *smbus;
@@ -367,10 +368,11 @@ static void mips_fuloong2e_init(MachineState *machine)
/* GPU */
if (vga_interface_type != VGA_NONE) {
- dev = DEVICE(pci_create(pci_bus, -1, "ati-vga"));
+ pci_dev = pci_new(-1, "ati-vga");
+ dev = DEVICE(pci_dev);
qdev_prop_set_uint32(dev, "vgamem_mb", 16);
qdev_prop_set_uint16(dev, "x-device-id", 0x5159);
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
}
/* Populate SPD eeprom data */
diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c
index 952bc71122..677a310b96 100644
--- a/hw/pci-bridge/dec.c
+++ b/hw/pci-bridge/dec.c
@@ -26,6 +26,7 @@
#include "qemu/osdep.h"
#include "dec.h"
#include "hw/sysbus.h"
+#include "qapi/error.h"
#include "qemu/module.h"
#include "hw/pci/pci.h"
#include "hw/pci/pci_host.h"
@@ -81,11 +82,10 @@ PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
PCIDevice *dev;
PCIBridge *br;
- dev = pci_create_multifunction(parent_bus, devfn, false,
- "dec-21154-p2p-bridge");
+ dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
br = PCI_BRIDGE(dev);
pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
- qdev_init_nofail(&dev->qdev);
+ pci_realize_and_unref(dev, parent_bus, &error_fatal);
return pci_bridge_get_sec_bus(br);
}
diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c
index 546ac84cf4..7bb032f005 100644
--- a/hw/pci-host/bonito.c
+++ b/hw/pci-host/bonito.c
@@ -750,11 +750,11 @@ PCIBus *bonito_init(qemu_irq *pic)
pcihost->pic = pic;
qdev_realize_and_unref(dev, NULL, &error_fatal);
- d = pci_create(phb->bus, PCI_DEVFN(0, 0), TYPE_PCI_BONITO);
+ d = pci_new(PCI_DEVFN(0, 0), TYPE_PCI_BONITO);
s = PCI_BONITO(d);
s->pcihost = pcihost;
pcihost->pci_dev = s;
- qdev_init_nofail(DEVICE(d));
+ pci_realize_and_unref(d, phb->bus, &error_fatal);
return phb->bus;
}
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index 475bcb01d7..0cc68585f8 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -35,6 +35,7 @@
#include "hw/pci-bridge/simba.h"
#include "hw/pci-host/sabre.h"
#include "exec/address-spaces.h"
+#include "qapi/error.h"
#include "qemu/log.h"
#include "qemu/module.h"
#include "sysemu/runstate.h"
@@ -405,17 +406,17 @@ static void sabre_realize(DeviceState *dev, Error **errp)
pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu);
/* APB secondary busses */
- pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 0), true,
- TYPE_SIMBA_PCI_BRIDGE);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 0), true,
+ TYPE_SIMBA_PCI_BRIDGE);
s->bridgeB = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq);
- qdev_init_nofail(&pci_dev->qdev);
+ pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
- pci_dev = pci_create_multifunction(phb->bus, PCI_DEVFN(1, 1), true,
- TYPE_SIMBA_PCI_BRIDGE);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), true,
+ TYPE_SIMBA_PCI_BRIDGE);
s->bridgeA = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq);
- qdev_init_nofail(&pci_dev->qdev);
+ pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
}
static void sabre_init(Object *obj)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 7e759646cf..24f726d4cd 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -1953,10 +1953,10 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *rootbus,
exit(1);
}
- pci_dev = pci_create(bus, devfn, nd->model);
+ pci_dev = pci_new(devfn, nd->model);
dev = &pci_dev->qdev;
qdev_set_nic_properties(dev, nd);
- qdev_init_nofail(dev);
+ pci_realize_and_unref(pci_dev, bus, &error_fatal);
g_ptr_array_free(pci_nic_models, true);
return pci_dev;
}
@@ -2199,8 +2199,8 @@ PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
bool multifunction,
const char *name)
{
- PCIDevice *dev = pci_create_multifunction(bus, devfn, multifunction, name);
- qdev_init_nofail(&dev->qdev);
+ PCIDevice *dev = pci_new_multifunction(devfn, multifunction, name);
+ pci_realize_and_unref(dev, bus, &error_fatal);
return dev;
}
diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c
index 2d069dcc59..baa17cdce7 100644
--- a/hw/ppc/mac_newworld.c
+++ b/hw/ppc/mac_newworld.c
@@ -375,14 +375,14 @@ static void ppc_core99_init(MachineState *machine)
pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
/* MacIO */
- macio = pci_create(pci_bus, -1, TYPE_NEWWORLD_MACIO);
+ macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq);
qdev_prop_set_bit(dev, "has-pmu", has_pmu);
qdev_prop_set_bit(dev, "has-adb", has_adb);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_init_nofail(dev);
+ pci_realize_and_unref(macio, pci_bus, &error_fatal);
/* We only emulate 2 out of 3 IDE controllers for now */
ide_drive_get(hd, ARRAY_SIZE(hd));
diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c
index f73ec5f3a9..903483079e 100644
--- a/hw/ppc/mac_oldworld.c
+++ b/hw/ppc/mac_oldworld.c
@@ -278,12 +278,12 @@ static void ppc_heathrow_init(MachineState *machine)
ide_drive_get(hd, ARRAY_SIZE(hd));
/* MacIO */
- macio = pci_create(pci_bus, -1, TYPE_OLDWORLD_MACIO);
+ macio = pci_new(-1, TYPE_OLDWORLD_MACIO);
dev = DEVICE(macio);
qdev_prop_set_uint64(dev, "frequency", tbfreq);
object_property_set_link(OBJECT(macio), OBJECT(pic_dev), "pic",
&error_abort);
- qdev_init_nofail(dev);
+ pci_realize_and_unref(macio, pci_bus, &error_fatal);
macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
"ide[0]"));
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index ade9c22825..6f29a013ca 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -605,10 +605,10 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
pci_busA->slot_reserved_mask = 0xfffffff1;
pci_busB->slot_reserved_mask = 0xfffffff0;
- ebus = pci_create_multifunction(pci_busA, PCI_DEVFN(1, 0), true, TYPE_EBUS);
+ ebus = pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS);
qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base",
hwdef->console_serial_base);
- qdev_init_nofail(DEVICE(ebus));
+ pci_realize_and_unref(ebus, pci_busA, &error_fatal);
/* Wire up "well-known" ISA IRQs to PBM legacy obio IRQs */
qdev_connect_gpio_out_named(DEVICE(ebus), "isa-irq", 7,
@@ -661,9 +661,9 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
qemu_macaddr_default_if_unset(&macaddr);
}
- pci_dev = pci_create(pci_busA, PCI_DEVFN(3, 0), "cmd646-ide");
+ pci_dev = pci_new(PCI_DEVFN(3, 0), "cmd646-ide");
qdev_prop_set_uint32(&pci_dev->qdev, "secondary", 1);
- qdev_init_nofail(&pci_dev->qdev);
+ pci_realize_and_unref(pci_dev, pci_busA, &error_fatal);
pci_ide_create_devs(pci_dev);
/* Map NVRAM into I/O (ebus) space */
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-19 10:58:24 +0000