diff options
| -rw-r--r-- | target/xtensa/cpu.h | 10 | ||||
| -rw-r--r-- | target/xtensa/translate.c | 3 |
2 files changed, 9 insertions, 4 deletions
diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index b363ffcf10..75e65df597 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -645,7 +645,9 @@ static inline int xtensa_get_cintlevel(const CPUXtensaState *env) static inline int xtensa_get_ring(const CPUXtensaState *env) { - if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU)) { + if (xtensa_option_bits_enabled(env->config, + XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) | + XTENSA_OPTION_BIT(XTENSA_OPTION_MPU))) { return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; } else { return 0; @@ -654,8 +656,10 @@ static inline int xtensa_get_ring(const CPUXtensaState *env) static inline int xtensa_get_cring(const CPUXtensaState *env) { - if (xtensa_option_enabled(env->config, XTENSA_OPTION_MMU) && - (env->sregs[PS] & PS_EXCM) == 0) { + if (xtensa_option_bits_enabled(env->config, + XTENSA_OPTION_BIT(XTENSA_OPTION_MMU) | + XTENSA_OPTION_BIT(XTENSA_OPTION_MPU)) && + (env->sregs[PS] & PS_EXCM) == 0) { return (env->sregs[PS] & PS_RING) >> PS_RING_SHIFT; } else { return 0; diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c index a99f5296e2..e6d910786c 100644 --- a/target/xtensa/translate.c +++ b/target/xtensa/translate.c @@ -2713,7 +2713,8 @@ static void translate_wsr_ps(DisasContext *dc, const OpcodeArg arg[], uint32_t mask = PS_WOE | PS_CALLINC | PS_OWB | PS_UM | PS_EXCM | PS_INTLEVEL; - if (option_enabled(dc, XTENSA_OPTION_MMU)) { + if (option_enabled(dc, XTENSA_OPTION_MMU) || + option_enabled(dc, XTENSA_OPTION_MPU)) { mask |= PS_RING; } tcg_gen_andi_i32(cpu_SR[par[0]], arg[0].in, mask); |