diff options
| -rw-r--r-- | cpu-exec-common.c | 6 | ||||
| -rw-r--r-- | exec.c | 2 | ||||
| -rw-r--r-- | hw/i386/kvmvapic.c | 2 | ||||
| -rw-r--r-- | include/exec/exec-all.h | 2 | ||||
| -rw-r--r-- | target-i386/bpt_helper.c | 2 | ||||
| -rw-r--r-- | target-lm32/helper.c | 2 | ||||
| -rw-r--r-- | target-s390x/helper.c | 2 | ||||
| -rw-r--r-- | target-xtensa/helper.c | 2 | ||||
| -rw-r--r-- | translate-all.c | 4 | ||||
| -rw-r--r-- | user-exec.c | 2 |
10 files changed, 12 insertions, 14 deletions
diff --git a/cpu-exec-common.c b/cpu-exec-common.c index 0cb5b6381b..0cb4ae60ef 100644 --- a/cpu-exec-common.c +++ b/cpu-exec-common.c @@ -26,10 +26,8 @@ bool exit_request; CPUState *tcg_current_cpu; -/* exit the current TB from a signal handler. The host registers are - restored in a state compatible with the CPU emulator - */ -void cpu_resume_from_signal(CPUState *cpu, void *puc) +/* exit the current TB, but without causing any exception to be raised */ +void cpu_loop_exit_noexc(CPUState *cpu) { /* XXX: restore cpu registers saved in host registers */ @@ -2091,7 +2091,7 @@ static void check_watchpoint(int offset, int len, MemTxAttrs attrs, int flags) } else { cpu_get_tb_cpu_state(env, &pc, &cs_base, &cpu_flags); tb_gen_code(cpu, pc, cs_base, cpu_flags, 1); - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } } } else { diff --git a/hw/i386/kvmvapic.c b/hw/i386/kvmvapic.c index 5b71b1ba46..3bf1ddd976 100644 --- a/hw/i386/kvmvapic.c +++ b/hw/i386/kvmvapic.c @@ -450,7 +450,7 @@ static void patch_instruction(VAPICROMState *s, X86CPU *cpu, target_ulong ip) if (!kvm_enabled()) { tb_gen_code(cs, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index b6a4a122da..e076397e2f 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -50,7 +50,7 @@ void restore_state_to_opc(CPUArchState *env, struct TranslationBlock *tb, void cpu_gen_init(void); bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc); -void QEMU_NORETURN cpu_resume_from_signal(CPUState *cpu, void *puc); +void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu); void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc, target_ulong cs_base, diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c index 499a277567..6fd7fe04a0 100644 --- a/target-i386/bpt_helper.c +++ b/target-i386/bpt_helper.c @@ -218,7 +218,7 @@ void breakpoint_handler(CPUState *cs) if (check_hw_breakpoints(env, false)) { raise_exception(env, EXCP01_DB); } else { - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } else { diff --git a/target-lm32/helper.c b/target-lm32/helper.c index b8f4ed9960..891da18c30 100644 --- a/target-lm32/helper.c +++ b/target-lm32/helper.c @@ -141,7 +141,7 @@ void lm32_debug_excp_handler(CPUState *cs) if (check_watchpoints(env)) { raise_exception(env, EXCP_WATCHPOINT); } else { - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } else { diff --git a/target-s390x/helper.c b/target-s390x/helper.c index ad8f7978ea..9a744df6c8 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -688,7 +688,7 @@ void s390x_cpu_debug_excp_handler(CPUState *cs) will be triggered, it will call load_psw which will recompute the watchpoints. */ cpu_watchpoint_remove_all(cs, BP_CPU); - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } #endif /* CONFIG_USER_ONLY */ diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c index 839f4a74a5..768b32c417 100644 --- a/target-xtensa/helper.c +++ b/target-xtensa/helper.c @@ -108,7 +108,7 @@ void xtensa_breakpoint_handler(CPUState *cs) if (cause) { debug_exception_env(env, cause); } - cpu_resume_from_signal(cs, NULL); + cpu_loop_exit_noexc(cs); } } } diff --git a/translate-all.c b/translate-all.c index ff588f390f..118e7d3c84 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1395,7 +1395,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end, modifying the memory. It will ensure that it cannot modify itself */ tb_gen_code(cpu, current_pc, current_cs_base, current_flags, 1); - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } #endif } @@ -1654,7 +1654,7 @@ void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr) repeating the fault, which is horribly inefficient. Better would be to execute just this insn uncached, or generate a second new TB. */ - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } void tb_flush_jmp_cache(CPUState *cpu, target_ulong addr) diff --git a/user-exec.c b/user-exec.c index efd34a6ee4..c5179a410c 100644 --- a/user-exec.c +++ b/user-exec.c @@ -74,7 +74,7 @@ static void cpu_exit_tb_from_sighandler(CPUState *cpu, void *puc) sigprocmask(SIG_SETMASK, &uc->sc_mask, NULL); #endif - cpu_resume_from_signal(cpu, NULL); + cpu_loop_exit_noexc(cpu); } /* 'pc' is the host PC at which the exception was raised. 'address' is |