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-rw-r--r--disas/alpha.c6
-rw-r--r--disas/arm.c2
-rw-r--r--disas/i386.c2
-rw-r--r--disas/m68k.c4
-rw-r--r--disas/mips.c50
-rw-r--r--disas/ppc.c22
-rw-r--r--disas/sparc.c6
-rw-r--r--include/disas/bfd.h1
8 files changed, 46 insertions, 47 deletions
diff --git a/disas/alpha.c b/disas/alpha.c
index 44d00a3635..b7b0ae0d92 100644
--- a/disas/alpha.c
+++ b/disas/alpha.c
@@ -521,7 +521,7 @@ static unsigned
insert_bdisp(unsigned insn, int value, const char **errmsg)
{
if (errmsg != (const char **)NULL && (value & 3))
- *errmsg = _("branch operand unaligned");
+ *errmsg = "branch operand unaligned";
return insn | ((value / 4) & 0x1FFFFF);
}
@@ -539,7 +539,7 @@ static unsigned
insert_jhint(unsigned insn, int value, const char **errmsg)
{
if (errmsg != (const char **)NULL && (value & 3))
- *errmsg = _("jump hint unaligned");
+ *errmsg = "jump hint unaligned";
return insn | ((value / 4) & 0x3FFF);
}
@@ -556,7 +556,7 @@ static unsigned
insert_ev6hwjhint(unsigned insn, int value, const char **errmsg)
{
if (errmsg != (const char **)NULL && (value & 3))
- *errmsg = _("jump hint unaligned");
+ *errmsg = "jump hint unaligned";
return insn | ((value / 4) & 0x1FFF);
}
diff --git a/disas/arm.c b/disas/arm.c
index 70da5298a0..32f8ca992f 100644
--- a/disas/arm.c
+++ b/disas/arm.c
@@ -1817,7 +1817,7 @@ print_insn_coprocessor (bfd_vma pc, struct disassemble_info *info, long given,
func (stream, "e");
break;
default:
- func (stream, _("<illegal precision>"));
+ func (stream, "<illegal precision>");
break;
}
break;
diff --git a/disas/i386.c b/disas/i386.c
index c0e717abe3..57145d0a6b 100644
--- a/disas/i386.c
+++ b/disas/i386.c
@@ -3406,7 +3406,7 @@ static const struct dis386 three_byte_table[][256] = {
}
};
-#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>")
+#define INTERNAL_DISASSEMBLER_ERROR "<internal disassembler error>"
static void
ckprefix (void)
diff --git a/disas/m68k.c b/disas/m68k.c
index 8f74ae1157..8e7c3f76c4 100644
--- a/disas/m68k.c
+++ b/disas/m68k.c
@@ -1676,7 +1676,7 @@ print_insn_arg (const char *d,
(*info->fprintf_func) (info->stream, "%%sfc");
else
/* xgettext:c-format */
- (*info->fprintf_func) (info->stream, _("<function code %d>"), fc);
+ (*info->fprintf_func) (info->stream, "<function code %d>", fc);
}
break;
@@ -1827,7 +1827,7 @@ match_insn_m68k (bfd_vma memaddr,
{
info->fprintf_func (info->stream,
/* xgettext:c-format */
- _("<internal error in opcode table: %s %s>\n"),
+ "<internal error in opcode table: %s %s>\n",
best->name, best->args);
info->fprintf_func = save_printer;
info->print_address_func = save_print_address;
diff --git a/disas/mips.c b/disas/mips.c
index 249931b735..97f661a37e 100644
--- a/disas/mips.c
+++ b/disas/mips.c
@@ -4257,7 +4257,7 @@ print_insn_args (const char *d,
case '\0':
/* xgettext:c-format */
(*info->fprintf_func) (info->stream,
- _("# internal error, incomplete extension sequence (+)"));
+ "# internal error, incomplete extension sequence (+)");
return;
case 'A':
@@ -4515,7 +4515,7 @@ print_insn_args (const char *d,
default:
/* xgettext:c-format */
(*info->fprintf_func) (info->stream,
- _("# internal error, undefined extension sequence (+%c)"),
+ "# internal error, undefined extension sequence (+%c)",
*d);
return;
}
@@ -4875,7 +4875,7 @@ print_insn_args (const char *d,
default:
/* xgettext:c-format */
(*info->fprintf_func) (info->stream,
- _("# internal error, undefined modifier(%c)"),
+ "# internal error, undefined modifier(%c)",
*d);
return;
}
@@ -5739,7 +5739,7 @@ print_mips16_insn_arg (char type,
/* xgettext:c-format */
(*info->fprintf_func)
(info->stream,
- _("# internal disassembler error, unrecognised modifier (%c)"),
+ "# internal disassembler error, unrecognised modifier (%c)",
type);
abort ();
}
@@ -5750,51 +5750,51 @@ print_mips_disassembler_options (FILE *stream)
{
unsigned int i;
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
The following MIPS specific disassembler options are supported for use\n\
-with the -M switch (multiple options should be separated by commas):\n"));
+with the -M switch (multiple options should be separated by commas):\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
gpr-names=ABI Print GPR names according to specified ABI.\n\
- Default: based on binary being disassembled.\n"));
+ Default: based on binary being disassembled.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
fpr-names=ABI Print FPR names according to specified ABI.\n\
- Default: numeric.\n"));
+ Default: numeric.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
cp0-names=ARCH Print CP0 register names according to\n\
specified architecture.\n\
- Default: based on binary being disassembled.\n"));
+ Default: based on binary being disassembled.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
hwr-names=ARCH Print HWR names according to specified\n\
architecture.\n\
- Default: based on binary being disassembled.\n"));
+ Default: based on binary being disassembled.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
reg-names=ABI Print GPR and FPR names according to\n\
- specified ABI.\n"));
+ specified ABI.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
reg-names=ARCH Print CP0 register and HWR names according to\n\
- specified architecture.\n"));
+ specified architecture.\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
For the options above, the following values are supported for \"ABI\":\n\
- "));
+ ");
for (i = 0; i < ARRAY_SIZE (mips_abi_choices); i++)
fprintf (stream, " %s", mips_abi_choices[i].name);
- fprintf (stream, _("\n"));
+ fprintf (stream, "\n");
- fprintf (stream, _("\n\
+ fprintf (stream, "\n\
For the options above, The following values are supported for \"ARCH\":\n\
- "));
+ ");
for (i = 0; i < ARRAY_SIZE (mips_arch_choices); i++)
if (*mips_arch_choices[i].name != '\0')
fprintf (stream, " %s", mips_arch_choices[i].name);
- fprintf (stream, _("\n"));
+ fprintf (stream, "\n");
- fprintf (stream, _("\n"));
+ fprintf (stream, "\n");
}
#endif
diff --git a/disas/ppc.c b/disas/ppc.c
index 478332ba37..052cebe851 100644
--- a/disas/ppc.c
+++ b/disas/ppc.c
@@ -1120,7 +1120,7 @@ insert_bo (unsigned long insn,
const char **errmsg)
{
if (!valid_bo (value, dialect, 0))
- *errmsg = _("invalid conditional option");
+ *errmsg = "invalid conditional option";
return insn | ((value & 0x1f) << 21);
}
@@ -1148,9 +1148,9 @@ insert_boe (unsigned long insn,
const char **errmsg)
{
if (!valid_bo (value, dialect, 0))
- *errmsg = _("invalid conditional option");
+ *errmsg = "invalid conditional option";
else if ((value & 1) != 0)
- *errmsg = _("attempt to set y bit when using + or - modifier");
+ *errmsg = "attempt to set y bit when using + or - modifier";
return insn | ((value & 0x1f) << 21);
}
@@ -1182,7 +1182,7 @@ insert_fxm (unsigned long insn,
{
if (value == 0 || (value & -value) != value)
{
- *errmsg = _("invalid mask field");
+ *errmsg = "invalid mask field";
value = 0;
}
}
@@ -1208,7 +1208,7 @@ insert_fxm (unsigned long insn,
/* Any other value on mfcr is an error. */
else if ((insn & (0x3ff << 1)) == 19 << 1)
{
- *errmsg = _("ignoring invalid mfcr mask");
+ *errmsg = "ignoring invalid mfcr mask";
value = 0;
}
@@ -1258,7 +1258,7 @@ insert_mbe (unsigned long insn,
if (uval == 0)
{
- *errmsg = _("illegal bitmask");
+ *errmsg = "illegal bitmask";
return insn;
}
@@ -1293,7 +1293,7 @@ insert_mbe (unsigned long insn,
me = 32;
if (count != 2 && (count != 0 || ! last))
- *errmsg = _("illegal bitmask");
+ *errmsg = "illegal bitmask";
return insn | (mb << 6) | ((me - 1) << 1);
}
@@ -1413,7 +1413,7 @@ insert_ram (unsigned long insn,
const char **errmsg)
{
if ((unsigned long) value >= ((insn >> 21) & 0x1f))
- *errmsg = _("index register in load range");
+ *errmsg = "index register in load range";
return insn | ((value & 0x1f) << 16);
}
@@ -1429,7 +1429,7 @@ insert_raq (unsigned long insn,
long rtvalue = (insn & RT_MASK) >> 21;
if (value == rtvalue)
- *errmsg = _("source and target register operands must be different");
+ *errmsg = "source and target register operands must be different";
return insn | ((value & 0x1f) << 16);
}
@@ -1444,7 +1444,7 @@ insert_ras (unsigned long insn,
const char **errmsg)
{
if (value == 0)
- *errmsg = _("invalid register operand when updating");
+ *errmsg = "invalid register operand when updating";
return insn | ((value & 0x1f) << 16);
}
@@ -1526,7 +1526,7 @@ insert_sprg (unsigned long insn,
if (value > 7
|| (value > 3
&& (dialect & (PPC_OPCODE_BOOKE | PPC_OPCODE_403)) == 0))
- *errmsg = _("invalid sprg number");
+ *errmsg = "invalid sprg number";
/* If this is mfsprg4..7 then use spr 260..263 which can be read in
user mode. Anything else must use spr 272..279. */
diff --git a/disas/sparc.c b/disas/sparc.c
index 64bba8df27..f120f4e86d 100644
--- a/disas/sparc.c
+++ b/disas/sparc.c
@@ -2494,7 +2494,7 @@ compare_opcodes (const void * a, const void * b)
fprintf
(stderr,
/* xgettext:c-format */
- _("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
+ "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n",
op0->name, match0, lose0);
op0->lose &= ~op0->match;
lose0 = op0->lose;
@@ -2505,7 +2505,7 @@ compare_opcodes (const void * a, const void * b)
fprintf
(stderr,
/* xgettext:c-format */
- _("Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n"),
+ "Internal error: bad sparc-opcode.h: \"%s\", %#.8lx, %#.8lx\n",
op1->name, match1, lose1);
op1->lose &= ~op1->match;
lose1 = op1->lose;
@@ -2555,7 +2555,7 @@ compare_opcodes (const void * a, const void * b)
else
fprintf (stderr,
/* xgettext:c-format */
- _("Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n"),
+ "Internal error: bad sparc-opcode.h: \"%s\" == \"%s\"\n",
op0->name, op1->name);
}
diff --git a/include/disas/bfd.h b/include/disas/bfd.h
index 64c9544ed7..231e5fbf91 100644
--- a/include/disas/bfd.h
+++ b/include/disas/bfd.h
@@ -477,7 +477,6 @@ int generic_symbol_at_address(bfd_vma, struct disassemble_info *);
(INFO).disassembler_options = NULL, \
(INFO).insn_info_valid = 0
-#define _(x) x
#define ATTRIBUTE_UNUSED __attribute__((unused))
/* from libbfd */
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-15 15:00:05 +0000