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-rw-r--r--target-arm/cpu-qom.h3
-rw-r--r--target-arm/helper.c6
2 files changed, 7 insertions, 2 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h
index 24a4cfb1ae..57b4a12069 100644
--- a/target-arm/cpu-qom.h
+++ b/target-arm/cpu-qom.h
@@ -116,6 +116,9 @@ typedef struct ARMCPU {
/* KVM init features for this CPU */
uint32_t kvm_init_features[7];
+ /* Uniprocessor system with MP extensions */
+ bool mp_is_up;
+
/* The instance init functions for implementation-specific subclasses
* set these fields to specify the implementation-dependent values of
* various constant registers and reset values of non-constant
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f51dece2fe..f038a03a6c 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -2075,9 +2075,11 @@ static uint64_t mpidr_read(CPUARMState *env, const ARMCPRegInfo *ri)
mpidr |= (1U << 31);
/* Cores which are uniprocessor (non-coherent)
* but still implement the MP extensions set
- * bit 30. (For instance, A9UP.) However we do
- * not currently model any of those cores.
+ * bit 30. (For instance, Cortex-R5).
*/
+ if (cpu->mp_is_up) {
+ mpidr |= (1u << 30);
+ }
}
return mpidr;
}