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-rw-r--r--hw/apb_pci.c7
-rw-r--r--hw/pckbd.c4
-rw-r--r--pc-bios/README5
-rw-r--r--pc-bios/bios.binbin131072 -> 131072 bytes
-rw-r--r--pc-bios/openbios-ppcbin312132 -> 312028 bytes
-rw-r--r--pc-bios/openbios-sparc32bin217668 -> 217664 bytes
-rw-r--r--pc-bios/openbios-sparc64bin1065880 -> 1065872 bytes
m---------roms/seabios0
-rw-r--r--target-sparc/helper.c2
9 files changed, 7 insertions, 11 deletions
diff --git a/hw/apb_pci.c b/hw/apb_pci.c
index 095f3b7990..65d8ba610f 100644
--- a/hw/apb_pci.c
+++ b/hw/apb_pci.c
@@ -73,10 +73,9 @@ typedef struct APBState {
uint32_t obio_irq_map[32];
qemu_irq pci_irqs[32];
uint32_t reset_control;
+ unsigned int nr_resets;
} APBState;
-static unsigned int nr_resets;
-
static void apb_config_writel (void *opaque, target_phys_addr_t addr,
uint32_t val)
{
@@ -108,7 +107,7 @@ static void apb_config_writel (void *opaque, target_phys_addr_t addr,
s->reset_control &= ~(val & RESET_WCMASK);
s->reset_control |= val & RESET_WMASK;
if (val & SOFT_POR) {
- nr_resets = 0;
+ s->nr_resets = 0;
qemu_system_reset_request();
} else if (val & SOFT_XIR) {
qemu_system_reset_request();
@@ -374,7 +373,7 @@ static void pci_pbm_reset(DeviceState *d)
s->pci_irq_map[i] &= PBM_PCI_IMR_MASK;
}
- if (nr_resets++ == 0) {
+ if (s->nr_resets++ == 0) {
/* Power on reset */
s->reset_control = POR;
}
diff --git a/hw/pckbd.c b/hw/pckbd.c
index 7998aa66b5..e83b8a6bcb 100644
--- a/hw/pckbd.c
+++ b/hw/pckbd.c
@@ -126,8 +126,6 @@ typedef struct KBDState {
target_phys_addr_t mask;
} KBDState;
-static KBDState kbd_state;
-
/* update irq and KBD_STAT_[MOUSE_]OBF */
/* XXX: not generating the irqs if KBD_MODE_DISABLE_KBD is set may be
incorrect, but it avoids having to simulate exact delays */
@@ -390,7 +388,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
target_phys_addr_t base, ram_addr_t size,
target_phys_addr_t mask)
{
- KBDState *s = &kbd_state;
+ KBDState *s = qemu_mallocz(sizeof(KBDState));
int s_io_memory;
s->irq_kbd = kbd_irq;
diff --git a/pc-bios/README b/pc-bios/README
index 437ef1c268..fc940a7c9d 100644
--- a/pc-bios/README
+++ b/pc-bios/README
@@ -14,9 +14,8 @@
- OpenBIOS (http://www.openbios.org/) is a free (GPL v2) portable
firmware implementation. The goal is to implement a 100% IEEE
1275-1994 (referred to as Open Firmware) compliant firmware.
- The included image for PowerPC (for 32 and 64 bit PPC CPUs) is
- built from OpenBIOS SVN revision 721, the Sparc32 and Sparc64 ones
- are built from OpenBIOS SVN revision 683.
+ The included image for PowerPC (for 32 and 64 bit PPC CPUs), Sparc32
+ and Sparc64 are built from OpenBIOS SVN revision 771.
- The PXE roms come from Rom-o-Matic gPXE 0.9.9 with BANNER_TIMEOUT=0
diff --git a/pc-bios/bios.bin b/pc-bios/bios.bin
index 7a8f0d0585..f27ea89f8d 100644
--- a/pc-bios/bios.bin
+++ b/pc-bios/bios.bin
Binary files differ
diff --git a/pc-bios/openbios-ppc b/pc-bios/openbios-ppc
index 340fc69b78..34e188e578 100644
--- a/pc-bios/openbios-ppc
+++ b/pc-bios/openbios-ppc
Binary files differ
diff --git a/pc-bios/openbios-sparc32 b/pc-bios/openbios-sparc32
index 4f2f45f2c4..4c2a9f7210 100644
--- a/pc-bios/openbios-sparc32
+++ b/pc-bios/openbios-sparc32
Binary files differ
diff --git a/pc-bios/openbios-sparc64 b/pc-bios/openbios-sparc64
index 632f9380da..fdb739baa2 100644
--- a/pc-bios/openbios-sparc64
+++ b/pc-bios/openbios-sparc64
Binary files differ
diff --git a/roms/seabios b/roms/seabios
-Subproject 8f469b9676127ba6bb52609d89ec774e61db0ee
+Subproject 7d09d0e3ba11310e973d4302c7fcc3fc2184e04
diff --git a/target-sparc/helper.c b/target-sparc/helper.c
index 46421225c4..582de1082c 100644
--- a/target-sparc/helper.c
+++ b/target-sparc/helper.c
@@ -1490,7 +1490,7 @@ void cpu_dump_state(CPUState *env, FILE *f,
}
#ifdef TARGET_SPARC64
cpu_fprintf(f, "pstate: %08x ccr: %02x (icc: ", env->pstate,
- cpu_get_ccr(env));
+ (unsigned)cpu_get_ccr(env));
cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << PSR_CARRY_SHIFT);
cpu_fprintf(f, " xcc: ");
cpu_print_cc(f, cpu_fprintf, cpu_get_ccr(env) << (PSR_CARRY_SHIFT - 4));