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-rw-r--r--cpus.c2
-rw-r--r--cputlb.c7
-rw-r--r--exec.c27
-rw-r--r--include/exec/exec-all.h1
-rw-r--r--include/exec/softmmu_template.h6
-rw-r--r--include/qom/cpu.h3
6 files changed, 33 insertions, 13 deletions
diff --git a/cpus.c b/cpus.c
index ca4c59fe0b..945d85b326 100644
--- a/cpus.c
+++ b/cpus.c
@@ -1119,6 +1119,8 @@ void resume_all_vcpus(void)
static void qemu_tcg_init_vcpu(CPUState *cpu)
{
+ tcg_cpu_address_space_init(cpu, cpu->as);
+
/* share a single thread for all cpus with TCG */
if (!tcg_cpu_thread) {
cpu->thread = g_malloc0(sizeof(QemuThread));
diff --git a/cputlb.c b/cputlb.c
index 71cf64fd40..0fbaa39412 100644
--- a/cputlb.c
+++ b/cputlb.c
@@ -232,6 +232,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
uintptr_t addend;
CPUTLBEntry *te;
hwaddr iotlb, xlat, sz;
+ CPUState *cpu = ENV_GET_CPU(env);
assert(size >= TARGET_PAGE_SIZE);
if (size != TARGET_PAGE_SIZE) {
@@ -239,7 +240,7 @@ void tlb_set_page(CPUArchState *env, target_ulong vaddr,
}
sz = size;
- section = address_space_translate_for_iotlb(&address_space_memory, paddr,
+ section = address_space_translate_for_iotlb(cpu->as, paddr,
&xlat, &sz);
assert(sz >= TARGET_PAGE_SIZE);
@@ -305,6 +306,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
int mmu_idx, page_index, pd;
void *p;
MemoryRegion *mr;
+ CPUState *cpu = ENV_GET_CPU(env1);
page_index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
mmu_idx = cpu_mmu_index(env1);
@@ -313,9 +315,8 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr)
cpu_ldub_code(env1, addr);
}
pd = env1->iotlb[mmu_idx][page_index] & ~TARGET_PAGE_MASK;
- mr = iotlb_to_region(&address_space_memory, pd);
+ mr = iotlb_to_region(cpu->as, pd);
if (memory_region_is_unassigned(mr)) {
- CPUState *cpu = ENV_GET_CPU(env1);
CPUClass *cc = CPU_GET_CLASS(cpu);
if (cc->do_unassigned_access) {
diff --git a/exec.c b/exec.c
index 122e6e5f11..cd931c1e8e 100644
--- a/exec.c
+++ b/exec.c
@@ -138,6 +138,7 @@ typedef struct subpage_t {
static void io_mem_init(void);
static void memory_map_init(void);
+static void tcg_commit(MemoryListener *listener);
static MemoryRegion io_mem_watch;
#endif
@@ -453,6 +454,22 @@ CPUState *qemu_get_cpu(int index)
return NULL;
}
+#if !defined(CONFIG_USER_ONLY)
+void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as)
+{
+ /* We only support one address space per cpu at the moment. */
+ assert(cpu->as == as);
+
+ if (cpu->tcg_as_listener) {
+ memory_listener_unregister(cpu->tcg_as_listener);
+ } else {
+ cpu->tcg_as_listener = g_new0(MemoryListener, 1);
+ }
+ cpu->tcg_as_listener->commit = tcg_commit;
+ memory_listener_register(cpu->tcg_as_listener, as);
+}
+#endif
+
void cpu_exec_init(CPUArchState *env)
{
CPUState *cpu = ENV_GET_CPU(env);
@@ -472,6 +489,7 @@ void cpu_exec_init(CPUArchState *env)
QTAILQ_INIT(&env->breakpoints);
QTAILQ_INIT(&env->watchpoints);
#ifndef CONFIG_USER_ONLY
+ cpu->as = &address_space_memory;
cpu->thread_id = qemu_get_thread_id();
#endif
QTAILQ_INSERT_TAIL(&cpus, cpu, node);
@@ -503,7 +521,7 @@ static void breakpoint_invalidate(CPUState *cpu, target_ulong pc)
{
hwaddr phys = cpu_get_phys_page_debug(cpu, pc);
if (phys != -1) {
- tb_invalidate_phys_addr(&address_space_memory,
+ tb_invalidate_phys_addr(cpu->as,
phys | (pc & ~TARGET_PAGE_MASK));
}
}
@@ -1830,10 +1848,6 @@ static MemoryListener core_memory_listener = {
.priority = 1,
};
-static MemoryListener tcg_memory_listener = {
- .commit = tcg_commit,
-};
-
void address_space_init_dispatch(AddressSpace *as)
{
as->dispatch = NULL;
@@ -1869,9 +1883,6 @@ static void memory_map_init(void)
address_space_init(&address_space_io, system_io, "I/O");
memory_listener_register(&core_memory_listener, &address_space_memory);
- if (tcg_enabled()) {
- memory_listener_register(&tcg_memory_listener, &address_space_memory);
- }
}
MemoryRegion *get_system_memory(void)
diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h
index 75fd1da16f..a387922df4 100644
--- a/include/exec/exec-all.h
+++ b/include/exec/exec-all.h
@@ -96,6 +96,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end,
int is_cpu_write_access);
#if !defined(CONFIG_USER_ONLY)
+void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
/* cputlb.c */
void tlb_flush_page(CPUArchState *env, target_ulong addr);
void tlb_flush(CPUArchState *env, int flush_global);
diff --git a/include/exec/softmmu_template.h b/include/exec/softmmu_template.h
index a946b35ca3..c14a04d7e9 100644
--- a/include/exec/softmmu_template.h
+++ b/include/exec/softmmu_template.h
@@ -122,7 +122,8 @@ static inline DATA_TYPE glue(io_read, SUFFIX)(CPUArchState *env,
uintptr_t retaddr)
{
uint64_t val;
- MemoryRegion *mr = iotlb_to_region(&address_space_memory, physaddr);
+ CPUState *cpu = ENV_GET_CPU(env);
+ MemoryRegion *mr = iotlb_to_region(cpu->as, physaddr);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
env->mem_io_pc = retaddr;
@@ -328,7 +329,8 @@ static inline void glue(io_write, SUFFIX)(CPUArchState *env,
target_ulong addr,
uintptr_t retaddr)
{
- MemoryRegion *mr = iotlb_to_region(&address_space_memory, physaddr);
+ CPUState *cpu = ENV_GET_CPU(env);
+ MemoryRegion *mr = iotlb_to_region(cpu->as, physaddr);
physaddr = (physaddr & TARGET_PAGE_MASK) + addr;
if (mr != &io_mem_rom && mr != &io_mem_notdirty && !can_do_io(env)) {
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index 7739e00067..367eda17d1 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -186,6 +186,9 @@ struct CPUState {
uint32_t interrupt_request;
int singlestep_enabled;
+ AddressSpace *as;
+ MemoryListener *tcg_as_listener;
+
void *env_ptr; /* CPUArchState */
struct TranslationBlock *current_tb;
struct GDBRegisterState *gdb_regs;