diff options
| -rw-r--r-- | target/sh4/translate.c | 31 |
1 files changed, 17 insertions, 14 deletions
diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 4c3512f62f..310c52ad2a 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -1830,17 +1830,28 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) ctx.features = env->features; ctx.has_movcal = (ctx.tbflags & TB_FLAG_PENDING_MOVCA); - num_insns = 0; max_insns = tb->cflags & CF_COUNT_MASK; if (max_insns == 0) { max_insns = CF_COUNT_MASK; } - if (max_insns > TCG_MAX_INSNS) { - max_insns = TCG_MAX_INSNS; + max_insns = MIN(max_insns, TCG_MAX_INSNS); + + /* Since the ISA is fixed-width, we can bound by the number + of instructions remaining on the page. */ + num_insns = -(ctx.pc | TARGET_PAGE_MASK) / 2; + max_insns = MIN(max_insns, num_insns); + + /* Single stepping means just that. */ + if (ctx.singlestep_enabled || singlestep) { + max_insns = 1; } gen_tb_start(tb); - while (ctx.bstate == BS_NONE && !tcg_op_buf_full()) { + num_insns = 0; + + while (ctx.bstate == BS_NONE + && num_insns < max_insns + && !tcg_op_buf_full()) { tcg_gen_insn_start(ctx.pc, ctx.envflags); num_insns++; @@ -1864,18 +1875,10 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb) ctx.opcode = cpu_lduw_code(env, ctx.pc); decode_opc(&ctx); ctx.pc += 2; - if ((ctx.pc & (TARGET_PAGE_SIZE - 1)) == 0) - break; - if (cs->singlestep_enabled) { - break; - } - if (num_insns >= max_insns) - break; - if (singlestep) - break; } - if (tb->cflags & CF_LAST_IO) + if (tb->cflags & CF_LAST_IO) { gen_io_end(); + } if (cs->singlestep_enabled) { gen_save_cpu_state(&ctx, true); gen_helper_debug(cpu_env); |