diff options
| -rw-r--r-- | hw/arm_gic.c | 10 | ||||
| -rw-r--r-- | hw/armv7m_nvic.c | 7 |
2 files changed, 7 insertions, 10 deletions
diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 2d8ceb80f1..3293ae4c7b 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -743,23 +743,13 @@ static void gic_reset(DeviceState *dev) s->current_pending[i] = 1023; s->running_irq[i] = 1023; s->running_priority[i] = 0x100; -#ifdef NVIC - /* The NVIC doesn't have per-cpu interfaces, so enable by default. */ - s->cpu_enabled[i] = 1; -#else s->cpu_enabled[i] = 0; -#endif } for (i = 0; i < 16; i++) { GIC_SET_ENABLED(i, ALL_CPU_MASK); GIC_SET_TRIGGER(i); } -#ifdef NVIC - /* The NVIC is always enabled. */ - s->enabled = 1; -#else s->enabled = 0; -#endif } static void gic_save(QEMUFile *f, void *opaque) diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 99a87a28bf..653c011839 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -382,6 +382,13 @@ static void armv7m_nvic_reset(DeviceState *dev) { nvic_state *s = FROM_SYSBUSGIC(nvic_state, sysbus_from_qdev(dev)); gic_reset(&s->gic.busdev.qdev); + /* Common GIC reset resets to disabled; the NVIC doesn't have + * per-CPU interfaces so mark our non-existent CPU interface + * as enabled by default. + */ + s->gic.cpu_enabled[0] = 1; + /* The NVIC as a whole is always enabled. */ + s->gic.enabled = 1; systick_reset(s); } |