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-rw-r--r--hw/hppa/machine.c8
-rw-r--r--target/hppa/cpu.h5
2 files changed, 12 insertions, 1 deletions
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c
index 90aeefe2a4..e9d84d0f03 100644
--- a/hw/hppa/machine.c
+++ b/hw/hppa/machine.c
@@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms)
fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version",
g_memdup(&val, sizeof(val)), sizeof(val));
+ val = cpu_to_le64(HPPA_TLB_ENTRIES);
+ fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries",
+ g_memdup(&val, sizeof(val)), sizeof(val));
+
+ val = cpu_to_le64(HPPA_BTLB_ENTRIES);
+ fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries",
+ g_memdup(&val, sizeof(val)), sizeof(val));
+
return fw_cfg;
}
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index 801a4fb1ba..fb6c59d075 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -196,9 +196,12 @@ struct CPUHPPAState {
target_ureg shadow[7]; /* shadow registers */
/* ??? The number of entries isn't specified by the architecture. */
+#define HPPA_TLB_ENTRIES 256
+#define HPPA_BTLB_ENTRIES 0
+
/* ??? Implement a unified itlb/dtlb for the moment. */
/* ??? We should use a more intelligent data structure. */
- hppa_tlb_entry tlb[256];
+ hppa_tlb_entry tlb[HPPA_TLB_ENTRIES];
uint32_t tlb_last;
};