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-rw-r--r--target-s390x/helper.h1
-rw-r--r--target-s390x/insn-data.def2
-rw-r--r--target-s390x/misc_helper.c14
-rw-r--r--target-s390x/translate.c31
4 files changed, 24 insertions, 24 deletions
diff --git a/target-s390x/helper.h b/target-s390x/helper.h
index c359377b62..3d7472eba0 100644
--- a/target-s390x/helper.h
+++ b/target-s390x/helper.h
@@ -85,7 +85,6 @@ DEF_HELPER_4(diag, i64, env, i32, i64, i64)
DEF_HELPER_3(load_psw, void, env, i64, i64)
DEF_HELPER_FLAGS_2(spx, TCG_CALL_NO_RWG, void, env, i64)
DEF_HELPER_FLAGS_1(stck, TCG_CALL_NO_RWG_SE, i64, env)
-DEF_HELPER_2(stcke, i32, env, i64)
DEF_HELPER_FLAGS_2(sckc, TCG_CALL_NO_RWG, void, env, i64)
DEF_HELPER_FLAGS_1(stckc, TCG_CALL_NO_RWG, i64, env)
DEF_HELPER_FLAGS_2(spt, TCG_CALL_NO_RWG, void, env, i64)
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def
index 12468a3ef5..75729fee64 100644
--- a/target-s390x/insn-data.def
+++ b/target-s390x/insn-data.def
@@ -663,6 +663,8 @@
/* STORE CLOCK */
C(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0)
C(0xb27c, STCKF, S, Z, la2, 0, new, m1_64, stck, 0)
+/* STORE CLOCK EXTENDED */
+ C(0xb278, STCKE, S, Z, 0, a2, 0, 0, stcke, 0)
/* STORE CLOCK COMPARATOR */
C(0xb207, STCKC, S, Z, la2, 0, new, m1_64, stckc, 0)
/* STORE CONTROL */
diff --git a/target-s390x/misc_helper.c b/target-s390x/misc_helper.c
index b098e8869d..409df4f7f8 100644
--- a/target-s390x/misc_helper.c
+++ b/target-s390x/misc_helper.c
@@ -157,20 +157,6 @@ uint64_t HELPER(stck)(CPUS390XState *env)
return clock_value(env);
}
-/* Store Clock Extended */
-uint32_t HELPER(stcke)(CPUS390XState *env, uint64_t a1)
-{
- cpu_stb_data(env, a1, 0);
- /* basically the same value as stck */
- cpu_stq_data(env, a1 + 1, clock_value(env) | env->cpu_num);
- /* more fine grained than stck */
- cpu_stq_data(env, a1 + 9, 0);
- /* XXX programmable fields */
- cpu_stw_data(env, a1 + 17, 0);
-
- return 0;
-}
-
/* Set Clock Comparator */
void HELPER(sckc)(CPUS390XState *env, uint64_t time)
{
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 19781edb92..e5c3ee6dd7 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -1033,15 +1033,6 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op,
LOG_DISAS("disas_b2: op 0x%x r1 %d r2 %d\n", op, r1, r2);
switch (op) {
- case 0x78: /* STCKE D2(B2) [S] */
- /* Store Clock Extended */
- decode_rs(s, insn, &r1, &r3, &b2, &d2);
- tmp = get_address(s, 0, b2, d2);
- potential_page_fault(s);
- gen_helper_stcke(cc_op, cpu_env, tmp);
- set_cc_static(s);
- tcg_temp_free_i64(tmp);
- break;
case 0x79: /* SACF D2(B2) [S] */
/* Set Address Space Control Fast */
check_privileged(s);
@@ -2828,6 +2819,28 @@ static ExitStatus op_stck(DisasContext *s, DisasOps *o)
return NO_EXIT;
}
+static ExitStatus op_stcke(DisasContext *s, DisasOps *o)
+{
+ TCGv_i64 c1 = tcg_temp_new_i64();
+ TCGv_i64 c2 = tcg_temp_new_i64();
+ gen_helper_stck(c1, cpu_env);
+ /* Shift the 64-bit value into its place as a zero-extended
+ 104-bit value. Note that "bit positions 64-103 are always
+ non-zero so that they compare differently to STCK"; we set
+ the least significant bit to 1. */
+ tcg_gen_shli_i64(c2, c1, 56);
+ tcg_gen_shri_i64(c1, c1, 8);
+ tcg_gen_ori_i64(c2, c2, 0x10000);
+ tcg_gen_qemu_st64(c1, o->in2, get_mem_index(s));
+ tcg_gen_addi_i64(o->in2, o->in2, 8);
+ tcg_gen_qemu_st64(c2, o->in2, get_mem_index(s));
+ tcg_temp_free_i64(c1);
+ tcg_temp_free_i64(c2);
+ /* ??? We don't implement clock states. */
+ gen_op_movi_cc(s, 0);
+ return NO_EXIT;
+}
+
static ExitStatus op_sckc(DisasContext *s, DisasOps *o)
{
check_privileged(s);