diff options
| -rw-r--r-- | tcg/tcg-op.h | 11 | ||||
| -rw-r--r-- | tcg/tcg-opc.h | 6 |
2 files changed, 17 insertions, 0 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 13eaa5a9e8..447878db01 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -1650,20 +1650,31 @@ static inline void tcg_gen_concat32_i64(TCGv_i64 dest, TCGv_i64 low, TCGv_i64 hi static inline void tcg_gen_andc_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) { +#ifdef TCG_TARGET_HAS_andc_i32 + tcg_gen_op3_i32(INDEX_op_andc_i32, ret, arg1, arg2); +#else TCGv_i32 t0; t0 = tcg_temp_new_i32(); tcg_gen_not_i32(t0, arg2); tcg_gen_and_i32(ret, arg1, t0); tcg_temp_free_i32(t0); +#endif } static inline void tcg_gen_andc_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2) { +#ifdef TCG_TARGET_HAS_andc_i64 + tcg_gen_op3_i64(INDEX_op_andc_i64, ret, arg1, arg2); +#elif defined(TCG_TARGET_HAS_andc_i32) && TCG_TARGET_REG_BITS == 32 + tcg_gen_andc_i32(TCGV_LOW(ret), TCGV_LOW(arg1), TCGV_LOW(arg2)); + tcg_gen_andc_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); +#else TCGv_i64 t0; t0 = tcg_temp_new_i64(); tcg_gen_not_i64(t0, arg2); tcg_gen_and_i64(ret, arg1, t0); tcg_temp_free_i64(t0); +#endif } static inline void tcg_gen_eqv_i32(TCGv_i32 ret, TCGv_i32 arg1, TCGv_i32 arg2) diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 89db3b49bf..6d855a767d 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -109,6 +109,9 @@ DEF2(not_i32, 1, 1, 0, 0) #ifdef TCG_TARGET_HAS_neg_i32 DEF2(neg_i32, 1, 1, 0, 0) #endif +#ifdef TCG_TARGET_HAS_andc_i32 +DEF2(andc_i32, 1, 2, 0, 0) +#endif #if TCG_TARGET_REG_BITS == 64 DEF2(mov_i64, 1, 1, 0, 0) @@ -185,6 +188,9 @@ DEF2(not_i64, 1, 1, 0, 0) #ifdef TCG_TARGET_HAS_neg_i64 DEF2(neg_i64, 1, 1, 0, 0) #endif +#ifdef TCG_TARGET_HAS_andc_i64 +DEF2(andc_i64, 1, 2, 0, 0) +#endif #endif /* QEMU specific */ |