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-rw-r--r--include/qom/cpu.h2
-rw-r--r--qom/cpu.c6
-rw-r--r--target-i386/cpu.c10
3 files changed, 18 insertions, 0 deletions
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index ac93dcec66..1b4de17415 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -45,6 +45,7 @@ typedef struct CPUState CPUState;
* instantiatable CPU type.
* @reset: Callback to reset the #CPUState to its initial state.
* @do_interrupt: Callback for interrupt handling.
+ * @get_arch_id: Callback for getting architecture-dependent CPU ID.
* @vmsd: State description for migration.
*
* Represents a CPU family or model.
@@ -58,6 +59,7 @@ typedef struct CPUClass {
void (*reset)(CPUState *cpu);
void (*do_interrupt)(CPUState *cpu);
+ int64_t (*get_arch_id)(CPUState *cpu);
const struct VMStateDescription *vmsd;
} CPUClass;
diff --git a/qom/cpu.c b/qom/cpu.c
index 34fa8054b2..9a4457ba1b 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -78,6 +78,11 @@ static void cpu_common_realizefn(DeviceState *dev, Error **errp)
}
}
+static int64_t cpu_common_get_arch_id(CPUState *cpu)
+{
+ return cpu->cpu_index;
+}
+
static void cpu_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
@@ -85,6 +90,7 @@ static void cpu_class_init(ObjectClass *klass, void *data)
k->class_by_name = cpu_common_class_by_name;
k->reset = cpu_common_reset;
+ k->get_arch_id = cpu_common_get_arch_id;
dc->realize = cpu_common_realizefn;
dc->no_user = 1;
}
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index e2302d8b05..f34ba23dad 100644
--- a/target-i386/cpu.c
+++ b/target-i386/cpu.c
@@ -2272,6 +2272,14 @@ static void x86_cpu_initfn(Object *obj)
}
}
+static int64_t x86_cpu_get_arch_id(CPUState *cs)
+{
+ X86CPU *cpu = X86_CPU(cs);
+ CPUX86State *env = &cpu->env;
+
+ return env->cpuid_apic_id;
+}
+
static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
{
X86CPUClass *xcc = X86_CPU_CLASS(oc);
@@ -2286,6 +2294,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->do_interrupt = x86_cpu_do_interrupt;
cpu_class_set_vmsd(cc, &vmstate_x86_cpu);
+
+ cc->get_arch_id = x86_cpu_get_arch_id;
}
static const TypeInfo x86_cpu_type_info = {