diff options
| -rw-r--r-- | hw/arm/virt.c | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 484689264c..42efad1e57 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -48,6 +48,7 @@ #include "hw/arm/sysbus-fdt.h" #include "hw/platform-bus.h" #include "hw/arm/fdt.h" +#include "hw/intc/arm_gic_common.h" /* Number of external interrupt lines to configure the GIC with */ #define NUM_IRQS 256 @@ -390,15 +391,17 @@ static void create_gic(VirtBoardInfo *vbi, qemu_irq *pic) */ for (i = 0; i < smp_cpus; i++) { DeviceState *cpudev = DEVICE(qemu_get_cpu(i)); - int ppibase = NUM_IRQS + i * 32; + int ppibase = NUM_IRQS + i * GIC_INTERNAL + GIC_NR_SGIS; /* physical timer; we wire it up to the non-secure timer's ID, * since a real A15 always has TrustZone but QEMU doesn't. */ qdev_connect_gpio_out(cpudev, 0, - qdev_get_gpio_in(gicdev, ppibase + 30)); + qdev_get_gpio_in(gicdev, + ppibase + ARCH_TIMER_NS_EL1_IRQ)); /* virtual timer */ qdev_connect_gpio_out(cpudev, 1, - qdev_get_gpio_in(gicdev, ppibase + 27)); + qdev_get_gpio_in(gicdev, + ppibase + ARCH_TIMER_VIRT_IRQ)); sysbus_connect_irq(gicbusdev, i, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ)); sysbus_connect_irq(gicbusdev, i + smp_cpus, |