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-rw-r--r--include/hw/i386/pc.h4
-rw-r--r--target/i386/cpu.c2
-rw-r--r--target/i386/cpu.h1
-rw-r--r--target/i386/machine.c2
4 files changed, 8 insertions, 1 deletions
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 654003f44c..6894f37df1 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -317,6 +317,10 @@ bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *);
#define PC_COMPAT_2_11 \
HW_COMPAT_2_11 \
{\
+ .driver = TYPE_X86_CPU,\
+ .property = "x-migrate-smi-count",\
+ .value = "off",\
+ },{\
.driver = "Skylake-Server" "-" TYPE_X86_CPU,\
.property = "clflushopt",\
.value = "off",\
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index f454d4beb3..723e02221e 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5435,6 +5435,8 @@ static Property x86_cpu_properties[] = {
false),
DEFINE_PROP_BOOL("vmware-cpuid-freq", X86CPU, vmware_cpuid_freq, true),
DEFINE_PROP_BOOL("tcg-cpuid", X86CPU, expose_tcg, true),
+ DEFINE_PROP_BOOL("x-migrate-smi-count", X86CPU, migrate_smi_count,
+ true),
/*
* lecacy_cache defaults to true unless the CPU model provides its
* own cache information (see x86_cpu_load_def()).
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 194e2e6b92..c18863ec7a 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1379,6 +1379,7 @@ struct X86CPU {
bool expose_kvm;
bool expose_tcg;
bool migratable;
+ bool migrate_smi_count;
bool max_features; /* Enable all supported features automatically */
uint32_t apic_id;
diff --git a/target/i386/machine.c b/target/i386/machine.c
index 8b64dff487..084c2c73a8 100644
--- a/target/i386/machine.c
+++ b/target/i386/machine.c
@@ -400,7 +400,7 @@ static bool msr_smi_count_needed(void *opaque)
X86CPU *cpu = opaque;
CPUX86State *env = &cpu->env;
- return env->msr_smi_count != 0;
+ return cpu->migrate_smi_count && env->msr_smi_count != 0;
}
static const VMStateDescription vmstate_msr_smi_count = {