diff options
| -rw-r--r-- | target-arm/cpu.c | 4 | ||||
| -rw-r--r-- | target-arm/helper.c | 2 |
2 files changed, 3 insertions, 3 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c index e837f64538..e0b82a6704 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -108,8 +108,8 @@ static void arm_cpu_reset(CPUState *s) env->aarch64 = 1; #if defined(CONFIG_USER_ONLY) env->pstate = PSTATE_MODE_EL0t; - /* Userspace expects access to CTL_EL0 and the cache ops */ - env->cp15.c1_sys |= SCTLR_UCT | SCTLR_UCI; + /* Userspace expects access to DC ZVA, CTL_EL0 and the cache ops */ + env->cp15.c1_sys |= SCTLR_UCT | SCTLR_UCI | SCTLR_DZE; /* and to the FP/Neon instructions */ env->cp15.c1_coproc = deposit64(env->cp15.c1_coproc, 20, 2, 3); #else diff --git a/target-arm/helper.c b/target-arm/helper.c index d837820f27..53527c2003 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -2018,7 +2018,7 @@ static uint64_t aa64_dczid_read(CPUARMState *env, const ARMCPRegInfo *ri) int dzp_bit = 1 << 4; /* DZP indicates whether DC ZVA access is allowed */ - if (aa64_zva_access(env, NULL) != CP_ACCESS_OK) { + if (aa64_zva_access(env, NULL) == CP_ACCESS_OK) { dzp_bit = 0; } return cpu->dcz_blocksize | dzp_bit; |