diff options
| -rw-r--r-- | target/s390x/cpu_models.c | 1 | ||||
| -rw-r--r-- | target/s390x/helper.h | 1 | ||||
| -rw-r--r-- | target/s390x/insn-data.def | 2 | ||||
| -rw-r--r-- | target/s390x/mem_helper.c | 51 | ||||
| -rw-r--r-- | target/s390x/translate.c | 15 |
5 files changed, 70 insertions, 0 deletions
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c index 51b17b98f3..63903c2d6f 100644 --- a/target/s390x/cpu_models.c +++ b/target/s390x/cpu_models.c @@ -675,6 +675,7 @@ static void check_compatibility(const S390CPUModel *max_model, static void add_qemu_cpu_model_features(S390FeatBitmap fbm) { static const int feats[] = { + S390_FEAT_DAT_ENH, S390_FEAT_STFLE, S390_FEAT_EXTENDED_IMMEDIATE, S390_FEAT_EXTENDED_TRANSLATION_2, diff --git a/target/s390x/helper.h b/target/s390x/helper.h index b268367e92..964097b2ce 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -131,6 +131,7 @@ DEF_HELPER_4(mvcs, i32, env, i64, i64, i64) DEF_HELPER_4(mvcp, i32, env, i64, i64, i64) DEF_HELPER_4(sigp, i32, env, i64, i32, i64) DEF_HELPER_FLAGS_2(sacf, TCG_CALL_NO_WG, void, env, i64) +DEF_HELPER_FLAGS_4(idte, TCG_CALL_NO_RWG, void, env, i64, i64, i32) DEF_HELPER_FLAGS_4(ipte, TCG_CALL_NO_RWG, void, env, i64, i64, i32) DEF_HELPER_FLAGS_1(ptlb, TCG_CALL_NO_RWG, void, env) DEF_HELPER_FLAGS_1(purge, TCG_CALL_NO_RWG, void, env) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 5ba7822f27..d3bb8516ed 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -928,6 +928,8 @@ C(0x8300, DIAG, RSI, Z, 0, 0, 0, 0, diag, 0) /* INSERT STORAGE KEY EXTENDED */ C(0xb229, ISKE, RRE, Z, 0, r2_o, new, r1_8, iske, 0) +/* INVALIDATE DAT TABLE ENTRY */ + C(0xb98e, IPDE, RRF_b, Z, r1_o, r2_o, 0, 0, idte, 0) /* INVALIDATE PAGE TABLE ENTRY */ C(0xb221, IPTE, RRF_a, Z, r1_o, r2_o, 0, 0, ipte, 0) /* LOAD CONTROL */ diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 20cef9a3e5..ede84711d1 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -1610,6 +1610,57 @@ uint32_t HELPER(mvcp)(CPUS390XState *env, uint64_t l, uint64_t a1, uint64_t a2) return cc; } +void HELPER(idte)(CPUS390XState *env, uint64_t r1, uint64_t r2, uint32_t m4) +{ + CPUState *cs = CPU(s390_env_get_cpu(env)); + const uintptr_t ra = GETPC(); + uint64_t table, entry, raddr; + uint16_t entries, i, index = 0; + + if (r2 & 0xff000) { + cpu_restore_state(cs, ra); + program_interrupt(env, PGM_SPECIFICATION, 4); + } + + if (!(r2 & 0x800)) { + /* invalidation-and-clearing operation */ + table = r1 & _ASCE_ORIGIN; + entries = (r2 & 0x7ff) + 1; + + switch (r1 & _ASCE_TYPE_MASK) { + case _ASCE_TYPE_REGION1: + index = (r2 >> 53) & 0x7ff; + break; + case _ASCE_TYPE_REGION2: + index = (r2 >> 42) & 0x7ff; + break; + case _ASCE_TYPE_REGION3: + index = (r2 >> 31) & 0x7ff; + break; + case _ASCE_TYPE_SEGMENT: + index = (r2 >> 20) & 0x7ff; + break; + } + for (i = 0; i < entries; i++) { + /* addresses are not wrapped in 24/31bit mode but table index is */ + raddr = table + ((index + i) & 0x7ff) * sizeof(entry); + entry = ldq_phys(cs->as, raddr); + if (!(entry & _REGION_ENTRY_INV)) { + /* we are allowed to not store if already invalid */ + entry |= _REGION_ENTRY_INV; + stq_phys(cs->as, raddr, entry); + } + } + } + + /* We simply flush the complete tlb, therefore we can ignore r3. */ + if (m4 & 1) { + tlb_flush(cs); + } else { + tlb_flush_all_cpus_synced(cs); + } +} + /* invalidate pte */ void HELPER(ipte)(CPUS390XState *env, uint64_t pto, uint64_t vaddr, uint32_t m4) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 1db5f2d5b9..592d6b0f38 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2380,6 +2380,21 @@ static ExitStatus op_ipm(DisasContext *s, DisasOps *o) } #ifndef CONFIG_USER_ONLY +static ExitStatus op_idte(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m4; + + check_privileged(s); + if (s390_has_feat(S390_FEAT_LOCAL_TLB_CLEARING)) { + m4 = tcg_const_i32(get_field(s->fields, m4)); + } else { + m4 = tcg_const_i32(0); + } + gen_helper_idte(cpu_env, o->in1, o->in2, m4); + tcg_temp_free_i32(m4); + return NO_EXIT; +} + static ExitStatus op_ipte(DisasContext *s, DisasOps *o) { TCGv_i32 m4; |