diff options
| -rw-r--r-- | target-sh4/helper.h | 1 | ||||
| -rw-r--r-- | target-sh4/op_helper.c | 11 | ||||
| -rw-r--r-- | target-sh4/translate.c | 11 |
3 files changed, 23 insertions, 0 deletions
diff --git a/target-sh4/helper.h b/target-sh4/helper.h index 631e7e1968..e665185587 100644 --- a/target-sh4/helper.h +++ b/target-sh4/helper.h @@ -35,6 +35,7 @@ DEF_HELPER_2(fdiv_FT, i32, i32, i32) DEF_HELPER_2(fdiv_DT, i64, i64, i64) DEF_HELPER_1(float_FT, i32, i32) DEF_HELPER_1(float_DT, i64, i32) +DEF_HELPER_3(fmac_FT, i32, i32, i32, i32) DEF_HELPER_2(fmul_FT, i32, i32, i32) DEF_HELPER_2(fmul_DT, i64, i64, i64) DEF_HELPER_1(fneg_T, i32, i32) diff --git a/target-sh4/op_helper.c b/target-sh4/op_helper.c index aa81d9ed4a..84e1ad3317 100644 --- a/target-sh4/op_helper.c +++ b/target-sh4/op_helper.c @@ -531,6 +531,17 @@ uint64_t helper_float_DT(uint32_t t0) return d.ll; } +uint32_t helper_fmac_FT(uint32_t t0, uint32_t t1, uint32_t t2) +{ + CPU_FloatU f0, f1, f2; + f0.l = t0; + f1.l = t1; + f2.l = t2; + f0.f = float32_mul(f0.f, f1.f, &env->fp_status); + f0.f = float32_add(f0.f, f2.f, &env->fp_status); + return f0.l; +} + uint32_t helper_fmul_FT(uint32_t t0, uint32_t t1) { CPU_FloatU f0, f1; diff --git a/target-sh4/translate.c b/target-sh4/translate.c index ef50f9b53e..7e36cf8dfd 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -1176,6 +1176,17 @@ static void _decode_opc(DisasContext * ctx) } } return; + case 0xf00e: /* fmac FR0,RM,Rn */ + { + CHECK_FPU_ENABLED + if (ctx->fpscr & FPSCR_PR) { + break; /* illegal instruction */ + } else { + gen_helper_fmac_FT(cpu_fregs[FREG(B11_8)], + cpu_fregs[FREG(0)], cpu_fregs[FREG(B7_4)], cpu_fregs[FREG(B11_8)]); + return; + } + } } switch (ctx->opcode & 0xff00) { |