diff options
76 files changed, 2230 insertions, 1325 deletions
diff --git a/Makefile.hw b/Makefile.hw index 659e441992..63eb7e40be 100644 --- a/Makefile.hw +++ b/Makefile.hw @@ -10,6 +10,7 @@ include $(SRC_PATH)/rules.mak $(call set-vpath, $(SRC_PATH):$(SRC_PATH)/hw) QEMU_CFLAGS+=-I.. +QEMU_CFLAGS += $(GLIB_CFLAGS) include $(SRC_PATH)/Makefile.objs diff --git a/Makefile.target b/Makefile.target index 0787758ad6..8822442a8a 100644 --- a/Makefile.target +++ b/Makefile.target @@ -191,7 +191,6 @@ obj-$(CONFIG_VIRTIO) += virtio.o virtio-blk.o virtio-balloon.o virtio-net.o virt obj-y += vhost_net.o obj-$(CONFIG_VHOST_NET) += vhost.o obj-$(CONFIG_REALLY_VIRTFS) += 9pfs/virtio-9p-device.o -obj-y += rwhandler.o obj-$(CONFIG_KVM) += kvm.o kvm-all.o obj-$(CONFIG_NO_KVM) += kvm-stub.o obj-y += memory.o diff --git a/hw/9pfs/codir.c b/hw/9pfs/codir.c index 3a257b9027..f17f927c10 100644 --- a/hw/9pfs/codir.c +++ b/hw/9pfs/codir.c @@ -97,15 +97,19 @@ int v9fs_co_opendir(V9fsState *s, V9fsFidState *fidp) err = 0; } }); + if (!err) { + total_open_fd++; + if (total_open_fd > open_fd_hw) { + v9fs_reclaim_fd(s); + } + } return err; } -int v9fs_co_closedir(V9fsState *s, V9fsFidState *fidp) +int v9fs_co_closedir(V9fsState *s, DIR *dir) { int err; - DIR *dir; - dir = fidp->fs.dir; v9fs_co_run_in_worker( { err = s->ops->closedir(&s->ctx, dir); @@ -113,5 +117,8 @@ int v9fs_co_closedir(V9fsState *s, V9fsFidState *fidp) err = -errno; } }); + if (!err) { + total_open_fd--; + } return err; } diff --git a/hw/9pfs/cofile.c b/hw/9pfs/cofile.c index e388146422..0caf1e3cee 100644 --- a/hw/9pfs/cofile.c +++ b/hw/9pfs/cofile.c @@ -58,6 +58,12 @@ int v9fs_co_open(V9fsState *s, V9fsFidState *fidp, int flags) err = 0; } }); + if (!err) { + total_open_fd++; + if (total_open_fd > open_fd_hw) { + v9fs_reclaim_fd(s); + } + } return err; } @@ -79,15 +85,19 @@ int v9fs_co_open2(V9fsState *s, V9fsFidState *fidp, char *fullname, gid_t gid, err = -errno; } }); + if (!err) { + total_open_fd++; + if (total_open_fd > open_fd_hw) { + v9fs_reclaim_fd(s); + } + } return err; } -int v9fs_co_close(V9fsState *s, V9fsFidState *fidp) +int v9fs_co_close(V9fsState *s, int fd) { - int fd; int err; - fd = fidp->fs.fd; v9fs_co_run_in_worker( { err = s->ops->close(&s->ctx, fd); @@ -95,6 +105,9 @@ int v9fs_co_close(V9fsState *s, V9fsFidState *fidp) err = -errno; } }); + if (!err) { + total_open_fd--; + } return err; } diff --git a/hw/9pfs/virtio-9p-coth.h b/hw/9pfs/virtio-9p-coth.h index 48defb72ff..b7be9b5f1f 100644 --- a/hw/9pfs/virtio-9p-coth.h +++ b/hw/9pfs/virtio-9p-coth.h @@ -83,8 +83,8 @@ extern int v9fs_co_open2(V9fsState *, V9fsFidState *, char *, gid_t, int, int); extern int v9fs_co_lsetxattr(V9fsState *, V9fsString *, V9fsString *, void *, size_t, int); extern int v9fs_co_lremovexattr(V9fsState *, V9fsString *, V9fsString *); -extern int v9fs_co_closedir(V9fsState *, V9fsFidState *); -extern int v9fs_co_close(V9fsState *, V9fsFidState *); +extern int v9fs_co_closedir(V9fsState *, DIR *); +extern int v9fs_co_close(V9fsState *, int); extern int v9fs_co_fsync(V9fsState *, V9fsFidState *, int); extern int v9fs_co_symlink(V9fsState *, V9fsFidState *, const char *, const char *, gid_t); diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c index 94660024d6..97f2da5f0e 100644 --- a/hw/9pfs/virtio-9p-device.c +++ b/hw/9pfs/virtio-9p-device.c @@ -130,6 +130,7 @@ VirtIODevice *virtio_9p_init(DeviceState *dev, V9fsConf *conf) s->config_size = sizeof(struct virtio_9p_config) + s->tag_len; s->vdev.get_config = virtio_9p_get_config; + s->fid_list = NULL; if (v9fs_init_worker_threads() < 0) { fprintf(stderr, "worker thread initialization failed\n"); @@ -171,6 +172,7 @@ static PCIDeviceInfo virtio_9p_info = { static void virtio_9p_register_devices(void) { pci_qdev_register(&virtio_9p_info); + virtio_9p_set_fd_limit(); } device_init(virtio_9p_register_devices) diff --git a/hw/9pfs/virtio-9p.c b/hw/9pfs/virtio-9p.c index ad70768dce..94b7090e7d 100644 --- a/hw/9pfs/virtio-9p.c +++ b/hw/9pfs/virtio-9p.c @@ -22,6 +22,9 @@ #include "virtio-9p-coth.h" int debug_9p_pdu; +int open_fd_hw; +int total_open_fd; +static int open_fd_rc; enum { Oread = 0x00, @@ -232,16 +235,60 @@ static size_t v9fs_string_size(V9fsString *str) return str->size; } -static V9fsFidState *lookup_fid(V9fsState *s, int32_t fid) +/* + * returns 0 if fid got re-opened, 1 if not, < 0 on error */ +static int v9fs_reopen_fid(V9fsState *s, V9fsFidState *f) +{ + int err = 1; + if (f->fid_type == P9_FID_FILE) { + if (f->fs.fd == -1) { + do { + err = v9fs_co_open(s, f, f->open_flags); + } while (err == -EINTR); + } + } else if (f->fid_type == P9_FID_DIR) { + if (f->fs.dir == NULL) { + do { + err = v9fs_co_opendir(s, f); + } while (err == -EINTR); + } + } + return err; +} + +static V9fsFidState *get_fid(V9fsState *s, int32_t fid) { + int err; V9fsFidState *f; for (f = s->fid_list; f; f = f->next) { + BUG_ON(f->clunked); if (f->fid == fid) { + /* + * Update the fid ref upfront so that + * we don't get reclaimed when we yield + * in open later. + */ + f->ref++; + /* + * check whether we need to reopen the + * file. We might have closed the fd + * while trying to free up some file + * descriptors. + */ + err = v9fs_reopen_fid(s, f); + if (err < 0) { + f->ref--; + return NULL; + } + /* + * Mark the fid as referenced so that the LRU + * reclaim won't close the file descriptor + */ + f->flags |= FID_REFERENCED; return f; } } - return NULL; } @@ -249,16 +296,22 @@ static V9fsFidState *alloc_fid(V9fsState *s, int32_t fid) { V9fsFidState *f; - f = lookup_fid(s, fid); - if (f) { - return NULL; + for (f = s->fid_list; f; f = f->next) { + /* If fid is already there return NULL */ + BUG_ON(f->clunked); + if (f->fid == fid) { + return NULL; + } } - f = g_malloc0(sizeof(V9fsFidState)); - f->fid = fid; f->fid_type = P9_FID_NONE; - + f->ref = 1; + /* + * Mark the fid as referenced so that the LRU + * reclaim won't close the file descriptor + */ + f->flags |= FID_REFERENCED; f->next = s->fid_list; s->fid_list = f; @@ -299,9 +352,41 @@ free_value: return retval; } -static int free_fid(V9fsState *s, int32_t fid) +static int free_fid(V9fsState *s, V9fsFidState *fidp) { int retval = 0; + + if (fidp->fid_type == P9_FID_FILE) { + /* If we reclaimed the fd no need to close */ + if (fidp->fs.fd != -1) { + retval = v9fs_co_close(s, fidp->fs.fd); + } + } else if (fidp->fid_type == P9_FID_DIR) { + if (fidp->fs.dir != NULL) { + retval = v9fs_co_closedir(s, fidp->fs.dir); + } + } else if (fidp->fid_type == P9_FID_XATTR) { + retval = v9fs_xattr_fid_clunk(s, fidp); + } + v9fs_string_free(&fidp->path); + g_free(fidp); + return retval; +} + +static void put_fid(V9fsState *s, V9fsFidState *fidp) +{ + BUG_ON(!fidp->ref); + fidp->ref--; + /* + * Don't free the fid if it is in reclaim list + */ + if (!fidp->ref && fidp->clunked) { + free_fid(s, fidp); + } +} + +static int clunk_fid(V9fsState *s, int32_t fid) +{ V9fsFidState **fidpp, *fidp; for (fidpp = &s->fid_list; *fidpp; fidpp = &(*fidpp)->next) { @@ -313,20 +398,119 @@ static int free_fid(V9fsState *s, int32_t fid) if (*fidpp == NULL) { return -ENOENT; } - fidp = *fidpp; *fidpp = fidp->next; + fidp->clunked = 1; + return 0; +} - if (fidp->fid_type == P9_FID_FILE) { - retval = v9fs_co_close(s, fidp); - } else if (fidp->fid_type == P9_FID_DIR) { - retval = v9fs_co_closedir(s, fidp); - } else if (fidp->fid_type == P9_FID_XATTR) { - retval = v9fs_xattr_fid_clunk(s, fidp); +void v9fs_reclaim_fd(V9fsState *s) +{ + int reclaim_count = 0; + V9fsFidState *f, *reclaim_list = NULL; + + for (f = s->fid_list; f; f = f->next) { + /* + * Unlink fids cannot be reclaimed. Check + * for them and skip them. Also skip fids + * currently being operated on. + */ + if (f->ref || f->flags & FID_NON_RECLAIMABLE) { + continue; + } + /* + * if it is a recently referenced fid + * we leave the fid untouched and clear the + * reference bit. We come back to it later + * in the next iteration. (a simple LRU without + * moving list elements around) + */ + if (f->flags & FID_REFERENCED) { + f->flags &= ~FID_REFERENCED; + continue; + } + /* + * Add fids to reclaim list. + */ + if (f->fid_type == P9_FID_FILE) { + if (f->fs.fd != -1) { + /* + * Up the reference count so that + * a clunk request won't free this fid + */ + f->ref++; + f->rclm_lst = reclaim_list; + reclaim_list = f; + f->fs_reclaim.fd = f->fs.fd; + f->fs.fd = -1; + reclaim_count++; + } + } else if (f->fid_type == P9_FID_DIR) { + if (f->fs.dir != NULL) { + /* + * Up the reference count so that + * a clunk request won't free this fid + */ + f->ref++; + f->rclm_lst = reclaim_list; + reclaim_list = f; + f->fs_reclaim.dir = f->fs.dir; + f->fs.dir = NULL; + reclaim_count++; + } + } + if (reclaim_count >= open_fd_rc) { + break; + } + } + /* + * Now close the fid in reclaim list. Free them if they + * are already clunked. + */ + while (reclaim_list) { + f = reclaim_list; + reclaim_list = f->rclm_lst; + if (f->fid_type == P9_FID_FILE) { + v9fs_co_close(s, f->fs_reclaim.fd); + } else if (f->fid_type == P9_FID_DIR) { + v9fs_co_closedir(s, f->fs_reclaim.dir); + } + f->rclm_lst = NULL; + /* + * Now drop the fid reference, free it + * if clunked. + */ + put_fid(s, f); } - v9fs_string_free(&fidp->path); - g_free(fidp); - return retval; +} + +static int v9fs_mark_fids_unreclaim(V9fsState *s, V9fsString *str) +{ + int err; + V9fsFidState *fidp, head_fid; + + head_fid.next = s->fid_list; + for (fidp = s->fid_list; fidp; fidp = fidp->next) { + if (!strcmp(fidp->path.data, str->data)) { + /* Mark the fid non reclaimable. */ + fidp->flags |= FID_NON_RECLAIMABLE; + + /* reopen the file/dir if already closed */ + err = v9fs_reopen_fid(s, fidp); + if (err < 0) { + return -1; + } + /* + * Go back to head of fid list because + * the list could have got updated when + * switched to the worker thread + */ + if (err == 0) { + fidp = &head_fid; + } + } + } + return 0; } #define P9_QID_TYPE_DIR 0x80 @@ -1014,19 +1198,21 @@ static void v9fs_attach(void *opaque) fidp = alloc_fid(s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } fidp->uid = n_uname; v9fs_string_sprintf(&fidp->path, "%s", "/"); err = fid_to_qid(s, fidp, &qid); if (err < 0) { err = -EINVAL; - free_fid(s, fid); + clunk_fid(s, fid); goto out; } offset += pdu_marshal(pdu, offset, "Q", &qid); err = offset; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&uname); v9fs_string_free(&aname); @@ -1044,10 +1230,11 @@ static void v9fs_stat(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "d", &fid); - fidp = lookup_fid(s, fid); + + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } err = v9fs_co_lstat(s, &fidp->path, &stbuf); if (err < 0) { @@ -1061,6 +1248,8 @@ static void v9fs_stat(void *opaque) err = offset; v9fs_stat_free(&v9stat); out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1078,10 +1267,10 @@ static void v9fs_getattr(void *opaque) pdu_unmarshal(pdu, offset, "dq", &fid, &request_mask); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { retval = -ENOENT; - goto out; + goto out_nofid; } /* * Currently we only support BASIC fields in stat, so there is no @@ -1095,6 +1284,8 @@ static void v9fs_getattr(void *opaque) retval = offset; retval += pdu_marshal(pdu, offset, "A", &v9stat_dotl); out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, retval); } @@ -1122,10 +1313,10 @@ static void v9fs_setattr(void *opaque) pdu_unmarshal(pdu, offset, "dI", &fid, &v9iattr); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } if (v9iattr.valid & ATTR_MODE) { err = v9fs_co_chmod(s, &fidp->path, v9iattr.mode); @@ -1187,6 +1378,8 @@ static void v9fs_setattr(void *opaque) } err = offset; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1213,7 +1406,7 @@ static void v9fs_walk(void *opaque) int32_t fid, newfid; V9fsString *wnames = NULL; V9fsFidState *fidp; - V9fsFidState *newfidp; + V9fsFidState *newfidp = NULL;; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; @@ -1229,12 +1422,12 @@ static void v9fs_walk(void *opaque) } else if (nwnames > P9_MAXWELEM) { err = -EINVAL; - goto out; + goto out_nofid; } - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } if (fid == newfid) { BUG_ON(fidp->fid_type != P9_FID_NONE); @@ -1267,7 +1460,7 @@ static void v9fs_walk(void *opaque) v9fs_string_copy(&newfidp->path, &path); err = v9fs_co_lstat(s, &newfidp->path, &stbuf); if (err < 0) { - free_fid(s, newfidp->fid); + clunk_fid(s, newfidp->fid); v9fs_string_free(&path); goto out; } @@ -1277,6 +1470,11 @@ static void v9fs_walk(void *opaque) } err = v9fs_walk_marshal(pdu, nwnames, qids); out: + put_fid(s, fidp); + if (newfidp) { + put_fid(s, newfidp); + } +out_nofid: complete_pdu(s, pdu, err); if (nwnames && nwnames <= P9_MAXWELEM) { for (name_idx = 0; name_idx < nwnames; name_idx++) { @@ -1325,10 +1523,10 @@ static void v9fs_open(void *opaque) } else { pdu_unmarshal(pdu, offset, "db", &fid, &mode); } - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } BUG_ON(fidp->fid_type != P9_FID_NONE); @@ -1359,11 +1557,21 @@ static void v9fs_open(void *opaque) goto out; } fidp->fid_type = P9_FID_FILE; + fidp->open_flags = flags; + if (flags & O_EXCL) { + /* + * We let the host file system do O_EXCL check + * We should not reclaim such fd + */ + fidp->flags |= FID_NON_RECLAIMABLE; + } iounit = get_iounit(s, &fidp->path); offset += pdu_marshal(pdu, offset, "Qd", &qid, iounit); err = offset; } out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1385,10 +1593,10 @@ static void v9fs_lcreate(void *opaque) pdu_unmarshal(pdu, offset, "dsddd", &dfid, &name, &flags, &mode, &gid); - fidp = lookup_fid(pdu->s, dfid); + fidp = get_fid(pdu->s, dfid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } v9fs_string_sprintf(&fullname, "%s/%s", fidp->path.data, name.data); @@ -1400,13 +1608,21 @@ static void v9fs_lcreate(void *opaque) goto out; } fidp->fid_type = P9_FID_FILE; + fidp->open_flags = flags; + if (flags & O_EXCL) { + /* + * We let the host file system do O_EXCL check + * We should not reclaim such fd + */ + fidp->flags |= FID_NON_RECLAIMABLE; + } iounit = get_iounit(pdu->s, &fullname); err = v9fs_co_lstat(pdu->s, &fullname, &stbuf); if (err < 0) { fidp->fid_type = P9_FID_NONE; if (fidp->fs.fd > 0) { - close(fidp->fs.fd); + v9fs_co_close(pdu->s, fidp->fs.fd); } goto out; } @@ -1415,6 +1631,8 @@ static void v9fs_lcreate(void *opaque) offset += pdu_marshal(pdu, offset, "Qd", &qid, iounit); err = offset; out: + put_fid(pdu->s, fidp); +out_nofid: complete_pdu(pdu->s, pdu, err); v9fs_string_free(&name); v9fs_string_free(&fullname); @@ -1431,16 +1649,17 @@ static void v9fs_fsync(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dd", &fid, &datasync); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } err = v9fs_co_fsync(s, fidp, datasync); if (!err) { err = offset; } -out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1449,16 +1668,25 @@ static void v9fs_clunk(void *opaque) int err; int32_t fid; size_t offset = 7; + V9fsFidState *fidp; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "d", &fid); - err = free_fid(s, fid); + + fidp = get_fid(s, fid); + if (fidp == NULL) { + err = -ENOENT; + goto out_nofid; + } + err = clunk_fid(s, fidp->fid); if (err < 0) { goto out; } err = offset; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1557,10 +1785,11 @@ static void v9fs_read(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dqd", &fid, &off, &max_count); - fidp = lookup_fid(s, fid); + + fidp = get_fid(s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } if (fidp->fid_type == P9_FID_DIR) { @@ -1612,6 +1841,8 @@ static void v9fs_read(void *opaque) err = -EINVAL; } out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1696,8 +1927,12 @@ static void v9fs_readdir(void *opaque) pdu_unmarshal(pdu, offset, "dqd", &fid, &initial_offset, &max_count); - fidp = lookup_fid(s, fid); - if (fidp == NULL || !fidp->fs.dir) { + fidp = get_fid(s, fid); + if (fidp == NULL) { + retval = -EINVAL; + goto out_nofid; + } + if (!fidp->fs.dir) { retval = -EINVAL; goto out; } @@ -1715,6 +1950,8 @@ static void v9fs_readdir(void *opaque) retval += pdu_marshal(pdu, offset, "d", count); retval += count; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, retval); } @@ -1779,10 +2016,11 @@ static void v9fs_write(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dqdv", &fid, &off, &count, sg, &cnt); - fidp = lookup_fid(s, fid); + + fidp = get_fid(s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } if (fidp->fid_type == P9_FID_FILE) { if (fidp->fs.fd == -1) { @@ -1822,6 +2060,8 @@ static void v9fs_write(void *opaque) offset += pdu_marshal(pdu, offset, "d", total); err = offset; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); } @@ -1846,10 +2086,10 @@ static void v9fs_create(void *opaque) pdu_unmarshal(pdu, offset, "dsdbs", &fid, &name, &perm, &mode, &extension); - fidp = lookup_fid(pdu->s, fid); + fidp = get_fid(pdu->s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } v9fs_string_sprintf(&fullname, "%s/%s", fidp->path.data, name.data); @@ -1879,15 +2119,17 @@ static void v9fs_create(void *opaque) } } else if (perm & P9_STAT_MODE_LINK) { int32_t nfid = atoi(extension.data); - V9fsFidState *nfidp = lookup_fid(pdu->s, nfid); + V9fsFidState *nfidp = get_fid(pdu->s, nfid); if (nfidp == NULL) { err = -EINVAL; goto out; } err = v9fs_co_link(pdu->s, &nfidp->path, &fullname); if (err < 0) { + put_fid(pdu->s, nfidp); goto out; } + put_fid(pdu->s, nfidp); } else if (perm & P9_STAT_MODE_DEVICE) { char ctype; uint32_t major, minor; @@ -1935,12 +2177,20 @@ static void v9fs_create(void *opaque) goto out; } fidp->fid_type = P9_FID_FILE; + fidp->open_flags = omode_to_uflags(mode); + if (fidp->open_flags & O_EXCL) { + /* + * We let the host file system do O_EXCL check + * We should not reclaim such fd + */ + fidp->flags |= FID_NON_RECLAIMABLE; + } } err = v9fs_co_lstat(pdu->s, &fullname, &stbuf); if (err < 0) { fidp->fid_type = P9_FID_NONE; if (fidp->fs.fd) { - close(fidp->fs.fd); + v9fs_co_close(pdu->s, fidp->fs.fd); } goto out; } @@ -1950,6 +2200,8 @@ static void v9fs_create(void *opaque) offset += pdu_marshal(pdu, offset, "Qd", &qid, iounit); err = offset; out: + put_fid(pdu->s, fidp); +out_nofid: complete_pdu(pdu->s, pdu, err); v9fs_string_free(&name); v9fs_string_free(&extension); @@ -1973,10 +2225,10 @@ static void v9fs_symlink(void *opaque) v9fs_string_init(&fullname); pdu_unmarshal(pdu, offset, "dssd", &dfid, &name, &symname, &gid); - dfidp = lookup_fid(pdu->s, dfid); + dfidp = get_fid(pdu->s, dfid); if (dfidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } v9fs_string_sprintf(&fullname, "%s/%s", dfidp->path.data, name.data); @@ -1992,6 +2244,8 @@ static void v9fs_symlink(void *opaque) offset += pdu_marshal(pdu, offset, "Q", &qid); err = offset; out: + put_fid(pdu->s, dfidp); +out_nofid: complete_pdu(pdu->s, pdu, err); v9fs_string_free(&name); v9fs_string_free(&symname); @@ -2021,13 +2275,13 @@ static void v9fs_link(void *opaque) pdu_unmarshal(pdu, offset, "dds", &dfid, &oldfid, &name); - dfidp = lookup_fid(s, dfid); + dfidp = get_fid(s, dfid); if (dfidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } - oldfidp = lookup_fid(s, oldfid); + oldfidp = get_fid(s, oldfid); if (oldfidp == NULL) { err = -ENOENT; goto out; @@ -2041,6 +2295,8 @@ static void v9fs_link(void *opaque) v9fs_string_free(&fullname); out: + put_fid(s, dfidp); +out_nofid: v9fs_string_free(&name); complete_pdu(s, pdu, err); } @@ -2055,19 +2311,28 @@ static void v9fs_remove(void *opaque) pdu_unmarshal(pdu, offset, "d", &fid); - fidp = lookup_fid(pdu->s, fid); + fidp = get_fid(pdu->s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; + } + /* + * IF the file is unlinked, we cannot reopen + * the file later. So don't reclaim fd + */ + err = v9fs_mark_fids_unreclaim(pdu->s, &fidp->path); + if (err < 0) { + goto out_err; } err = v9fs_co_remove(pdu->s, &fidp->path); if (!err) { err = offset; } - +out_err: /* For TREMOVE we need to clunk the fid even on failed remove */ - free_fid(pdu->s, fidp->fid); -out: + clunk_fid(pdu->s, fidp->fid); + put_fid(pdu->s, fidp); +out_nofid: complete_pdu(pdu->s, pdu, err); } @@ -2076,14 +2341,14 @@ static int v9fs_complete_rename(V9fsState *s, V9fsFidState *fidp, { char *end; int err = 0; + V9fsFidState *dirfidp = NULL; char *old_name, *new_name; if (newdirfid != -1) { - V9fsFidState *dirfidp; - dirfidp = lookup_fid(s, newdirfid); + dirfidp = get_fid(s, newdirfid); if (dirfidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } BUG_ON(dirfidp->fid_type != P9_FID_NONE); @@ -2136,6 +2401,10 @@ static int v9fs_complete_rename(V9fsState *s, V9fsFidState *fidp, v9fs_string_copy(&fidp->path, name); } out: + if (dirfidp) { + put_fid(s, dirfidp); + } +out_nofid: return err; } @@ -2152,10 +2421,10 @@ static void v9fs_rename(void *opaque) pdu_unmarshal(pdu, offset, "dds", &fid, &newdirfid, &name); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } BUG_ON(fidp->fid_type != P9_FID_NONE); @@ -2163,7 +2432,8 @@ static void v9fs_rename(void *opaque) if (!err) { err = offset; } -out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&name); } @@ -2181,10 +2451,11 @@ static void v9fs_wstat(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dwS", &fid, &unused, &v9stat); - fidp = lookup_fid(s, fid); + + fidp = get_fid(s, fid); if (fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } /* do we need to sync the file? */ if (donttouch_stat(&v9stat)) { @@ -2250,6 +2521,8 @@ static void v9fs_wstat(void *opaque) } err = offset; out: + put_fid(s, fidp); +out_nofid: v9fs_stat_free(&v9stat); complete_pdu(s, pdu, err); } @@ -2310,10 +2583,10 @@ static void v9fs_statfs(void *opaque) V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "d", &fid); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { retval = -ENOENT; - goto out; + goto out_nofid; } retval = v9fs_co_statfs(s, &fidp->path, &stbuf); if (retval < 0) { @@ -2322,6 +2595,8 @@ static void v9fs_statfs(void *opaque) retval = offset; retval += v9fs_fill_statfs(s, pdu, &stbuf); out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, retval); return; } @@ -2347,10 +2622,10 @@ static void v9fs_mknod(void *opaque) pdu_unmarshal(pdu, offset, "dsdddd", &fid, &name, &mode, &major, &minor, &gid); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } v9fs_string_sprintf(&fullname, "%s/%s", fidp->path.data, name.data); err = v9fs_co_mknod(s, &fullname, fidp->uid, gid, @@ -2366,6 +2641,8 @@ static void v9fs_mknod(void *opaque) err = offset; err += pdu_marshal(pdu, offset, "Q", &qid); out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&fullname); v9fs_string_free(&name); @@ -2399,12 +2676,12 @@ static void v9fs_lock(void *opaque) /* We support only block flag now (that too ignored currently) */ if (flock->flags & ~P9_LOCK_FLAGS_BLOCK) { err = -EINVAL; - goto out; + goto out_nofid; } - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } err = v9fs_co_fstat(s, fidp->fs.fd, &stbuf); if (err < 0) { @@ -2412,6 +2689,8 @@ static void v9fs_lock(void *opaque) } status = P9_LOCK_SUCCESS; out: + put_fid(s, fidp); +out_nofid: err = offset; err += pdu_marshal(pdu, offset, "b", status); complete_pdu(s, pdu, err); @@ -2437,10 +2716,10 @@ static void v9fs_getlock(void *opaque) &glock->start, &glock->length, &glock->proc_id, &glock->client_id); - fidp = lookup_fid(s, fid); + fidp = get_fid(s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } err = v9fs_co_fstat(s, fidp->fs.fd, &stbuf); if (err < 0) { @@ -2452,6 +2731,8 @@ static void v9fs_getlock(void *opaque) &glock->client_id); err = offset; out: + put_fid(s, fidp); +out_nofid: complete_pdu(s, pdu, err); g_free(glock); } @@ -2472,10 +2753,10 @@ static void v9fs_mkdir(void *opaque) v9fs_string_init(&fullname); pdu_unmarshal(pdu, offset, "dsdd", &fid, &name, &mode, &gid); - fidp = lookup_fid(pdu->s, fid); + fidp = get_fid(pdu->s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } v9fs_string_sprintf(&fullname, "%s/%s", fidp->path.data, name.data); err = v9fs_co_mkdir(pdu->s, fullname.data, mode, fidp->uid, gid); @@ -2490,6 +2771,8 @@ static void v9fs_mkdir(void *opaque) offset += pdu_marshal(pdu, offset, "Q", &qid); err = offset; out: + put_fid(pdu->s, fidp); +out_nofid: complete_pdu(pdu->s, pdu, err); v9fs_string_free(&fullname); v9fs_string_free(&name); @@ -2503,15 +2786,15 @@ static void v9fs_xattrwalk(void *opaque) size_t offset = 7; int32_t fid, newfid; V9fsFidState *file_fidp; - V9fsFidState *xattr_fidp; + V9fsFidState *xattr_fidp = NULL; V9fsPDU *pdu = opaque; V9fsState *s = pdu->s; pdu_unmarshal(pdu, offset, "dds", &fid, &newfid, &name); - file_fidp = lookup_fid(s, fid); + file_fidp = get_fid(s, fid); if (file_fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } xattr_fidp = alloc_fid(s, newfid); if (xattr_fidp == NULL) { @@ -2526,7 +2809,7 @@ static void v9fs_xattrwalk(void *opaque) size = v9fs_co_llistxattr(s, &xattr_fidp->path, NULL, 0); if (size < 0) { err = size; - free_fid(s, xattr_fidp->fid); + clunk_fid(s, xattr_fidp->fid); goto out; } /* @@ -2541,7 +2824,7 @@ static void v9fs_xattrwalk(void *opaque) xattr_fidp->fs.xattr.value, xattr_fidp->fs.xattr.len); if (err < 0) { - free_fid(s, xattr_fidp->fid); + clunk_fid(s, xattr_fidp->fid); goto out; } } @@ -2556,7 +2839,7 @@ static void v9fs_xattrwalk(void *opaque) &name, NULL, 0); if (size < 0) { err = size; - free_fid(s, xattr_fidp->fid); + clunk_fid(s, xattr_fidp->fid); goto out; } /* @@ -2571,7 +2854,7 @@ static void v9fs_xattrwalk(void *opaque) &name, xattr_fidp->fs.xattr.value, xattr_fidp->fs.xattr.len); if (err < 0) { - free_fid(s, xattr_fidp->fid); + clunk_fid(s, xattr_fidp->fid); goto out; } } @@ -2579,6 +2862,11 @@ static void v9fs_xattrwalk(void *opaque) err = offset; } out: + put_fid(s, file_fidp); + if (xattr_fidp) { + put_fid(s, xattr_fidp); + } +out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&name); } @@ -2599,10 +2887,10 @@ static void v9fs_xattrcreate(void *opaque) pdu_unmarshal(pdu, offset, "dsqd", &fid, &name, &size, &flags); - file_fidp = lookup_fid(s, fid); + file_fidp = get_fid(s, fid); if (file_fidp == NULL) { err = -EINVAL; - goto out; + goto out_nofid; } /* Make the file fid point to xattr */ xattr_fidp = file_fidp; @@ -2618,7 +2906,8 @@ static void v9fs_xattrcreate(void *opaque) xattr_fidp->fs.xattr.value = NULL; } err = offset; -out: + put_fid(s, file_fidp); +out_nofid: complete_pdu(s, pdu, err); v9fs_string_free(&name); } @@ -2633,10 +2922,10 @@ static void v9fs_readlink(void *opaque) V9fsFidState *fidp; pdu_unmarshal(pdu, offset, "d", &fid); - fidp = lookup_fid(pdu->s, fid); + fidp = get_fid(pdu->s, fid); if (fidp == NULL) { err = -ENOENT; - goto out; + goto out_nofid; } v9fs_string_init(&target); @@ -2648,6 +2937,8 @@ static void v9fs_readlink(void *opaque) err = offset; v9fs_string_free(&target); out: + put_fid(pdu->s, fidp); +out_nofid: complete_pdu(pdu->s, pdu, err); } @@ -2732,3 +3023,14 @@ void handle_9p_output(VirtIODevice *vdev, VirtQueue *vq) } free_pdu(s, pdu); } + +void virtio_9p_set_fd_limit(void) +{ + struct rlimit rlim; + if (getrlimit(RLIMIT_NOFILE, &rlim) < 0) { + fprintf(stderr, "Failed to get the resource limit\n"); + exit(1); + } + open_fd_hw = rlim.rlim_cur - MIN(400, rlim.rlim_cur/3); + open_fd_rc = rlim.rlim_cur/2; +} diff --git a/hw/9pfs/virtio-9p.h b/hw/9pfs/virtio-9p.h index d00a502dcc..9d1b508e16 100644 --- a/hw/9pfs/virtio-9p.h +++ b/hw/9pfs/virtio-9p.h @@ -5,6 +5,7 @@ #include <dirent.h> #include <sys/time.h> #include <utime.h> +#include <sys/resource.h> #include "hw/virtio.h" #include "fsdev/file-op-9p.h" @@ -101,6 +102,9 @@ enum p9_proto_version { #define P9_NOTAG (u16)(~0) #define P9_NOFID (u32)(~0) #define P9_MAXWELEM 16 + +#define FID_REFERENCED 0x1 +#define FID_NON_RECLAIMABLE 0x2 static inline const char *rpath(FsContext *ctx, const char *path, char *buffer) { snprintf(buffer, PATH_MAX, "%s/%s", ctx->fs_root, path); @@ -198,12 +202,21 @@ struct V9fsFidState int32_t fid; V9fsString path; union { - int fd; - DIR *dir; - V9fsXattr xattr; + int fd; + DIR *dir; + V9fsXattr xattr; } fs; + union { + int fd; + DIR *dir; + } fs_reclaim; + int flags; + int open_flags; uid_t uid; + int ref; + int clunked; V9fsFidState *next; + V9fsFidState *rclm_lst; }; typedef struct V9fsState @@ -352,6 +365,9 @@ typedef struct V9fsGetlock V9fsString client_id; } V9fsGetlock; +extern int open_fd_hw; +extern int total_open_fd; + size_t pdu_packunpack(void *addr, struct iovec *sg, int sg_count, size_t offset, size_t size, int pack); @@ -362,4 +378,6 @@ static inline size_t do_pdu_unpack(void *dst, struct iovec *sg, int sg_count, } extern void handle_9p_output(VirtIODevice *vdev, VirtQueue *vq); +extern void virtio_9p_set_fd_limit(void); +extern void v9fs_reclaim_fd(V9fsState *s); #endif diff --git a/hw/an5206.c b/hw/an5206.c index 04ca420a90..481ae60449 100644 --- a/hw/an5206.c +++ b/hw/an5206.c @@ -12,6 +12,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" +#include "exec-memory.h" #define KERNEL_LOAD_ADDR 0x10000 #define AN5206_MBAR_ADDR 0x10000000 @@ -37,6 +38,9 @@ static void an5206_init(ram_addr_t ram_size, int kernel_size; uint64_t elf_entry; target_phys_addr_t entry; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *sram = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "m5206"; @@ -52,12 +56,12 @@ static void an5206_init(ram_addr_t ram_size, env->rambar0 = AN5206_RAMBAR_ADDR | 1; /* DRAM at address zero */ - cpu_register_physical_memory(0, ram_size, - qemu_ram_alloc(NULL, "an5206.ram", ram_size) | IO_MEM_RAM); + memory_region_init_ram(ram, NULL, "an5206.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0, ram); /* Internal SRAM. */ - cpu_register_physical_memory(AN5206_RAMBAR_ADDR, 512, - qemu_ram_alloc(NULL, "an5206.sram", 512) | IO_MEM_RAM); + memory_region_init_ram(sram, NULL, "an5206.sram", 512); + memory_region_add_subregion(address_space_mem, AN5206_RAMBAR_ADDR, sram); mcf5206_init(AN5206_MBAR_ADDR, env); diff --git a/hw/arm-misc.h b/hw/arm-misc.h index f8a747289b..af403a159a 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -11,13 +11,16 @@ #ifndef ARM_MISC_H #define ARM_MISC_H 1 +#include "memory.h" + /* The CPU is also modeled as an interrupt controller. */ #define ARM_PIC_CPU_IRQ 0 #define ARM_PIC_CPU_FIQ 1 qemu_irq *arm_pic_init_cpu(CPUState *env); /* armv7m.c */ -qemu_irq *armv7m_init(int flash_size, int sram_size, +qemu_irq *armv7m_init(MemoryRegion *address_space_mem, + int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */ diff --git a/hw/armv7m.c b/hw/armv7m.c index a932f16a44..28d41b82a6 100644 --- a/hw/armv7m.c +++ b/hw/armv7m.c @@ -156,7 +156,8 @@ static void armv7m_reset(void *opaque) flash_size and sram_size are in kb. Returns the NVIC array. */ -qemu_irq *armv7m_init(int flash_size, int sram_size, +qemu_irq *armv7m_init(MemoryRegion *address_space_mem, + int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model) { CPUState *env; @@ -169,6 +170,9 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, uint64_t lowaddr; int i; int big_endian; + MemoryRegion *sram = g_new(MemoryRegion, 1); + MemoryRegion *flash = g_new(MemoryRegion, 1); + MemoryRegion *hack = g_new(MemoryRegion, 1); flash_size *= 1024; sram_size *= 1024; @@ -194,12 +198,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, #endif /* Flash programming is done via the SCU, so pretend it is ROM. */ - cpu_register_physical_memory(0, flash_size, - qemu_ram_alloc(NULL, "armv7m.flash", - flash_size) | IO_MEM_ROM); - cpu_register_physical_memory(0x20000000, sram_size, - qemu_ram_alloc(NULL, "armv7m.sram", - sram_size) | IO_MEM_RAM); + memory_region_init_ram(flash, NULL, "armv7m.flash", flash_size); + memory_region_set_readonly(flash, true); + memory_region_add_subregion(address_space_mem, 0, flash); + memory_region_init_ram(sram, NULL, "armv7m.sram", sram_size); + memory_region_add_subregion(address_space_mem, 0x20000000, sram); armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); @@ -232,9 +235,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, /* Hack to map an additional page of ram at the top of the address space. This stops qemu complaining about executing code outside RAM when returning from an exception. */ - cpu_register_physical_memory(0xfffff000, 0x1000, - qemu_ram_alloc(NULL, "armv7m.hack", - 0x1000) | IO_MEM_RAM); + memory_region_init_ram(hack, NULL, "armv7m.hack", 0x1000); + memory_region_add_subregion(address_space_mem, 0xfffff000, hack); qemu_register_reset(armv7m_reset, env); return pic; diff --git a/hw/axis_dev88.c b/hw/axis_dev88.c index 06200e257a..73eb39d43b 100644 --- a/hw/axis_dev88.c +++ b/hw/axis_dev88.c @@ -31,6 +31,7 @@ #include "elf.h" #include "cris-boot.h" #include "blockdev.h" +#include "exec-memory.h" #define D(x) #define DNAND(x) @@ -259,8 +260,9 @@ void axisdev88_init (ram_addr_t ram_size, int i; int nand_regs; int gpio_regs; - ram_addr_t phys_ram; - ram_addr_t phys_intmem; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *phys_ram = g_new(MemoryRegion, 1); + MemoryRegion *phys_intmem = g_new(MemoryRegion, 1); /* init CPUs */ if (cpu_model == NULL) { @@ -269,15 +271,13 @@ void axisdev88_init (ram_addr_t ram_size, env = cpu_init(cpu_model); /* allocate RAM */ - phys_ram = qemu_ram_alloc(NULL, "axisdev88.ram", ram_size); - cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM); + memory_region_init_ram(phys_ram, NULL, "axisdev88.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0x40000000, phys_ram); /* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the internal memory. */ - phys_intmem = qemu_ram_alloc(NULL, "axisdev88.chipram", INTMEM_SIZE); - cpu_register_physical_memory(0x38000000, INTMEM_SIZE, - phys_intmem | IO_MEM_RAM); - + memory_region_init_ram(phys_intmem, NULL, "axisdev88.chipram", INTMEM_SIZE); + memory_region_add_subregion(address_space_mem, 0x38000000, phys_intmem); /* Attach a NAND flash to CS1. */ nand = drive_get(IF_MTD, 0, 0); diff --git a/hw/cirrus_vga.c b/hw/cirrus_vga.c index 4d0ef0d54c..ec7ea8207b 100644 --- a/hw/cirrus_vga.c +++ b/hw/cirrus_vga.c @@ -2424,6 +2424,7 @@ static void cirrus_update_memory_access(CirrusVGAState *s) { unsigned mode; + memory_region_transaction_begin(); if ((s->vga.sr[0x17] & 0x44) == 0x44) { goto generic_io; } else if (s->cirrus_srcptr != s->cirrus_srcptr_end) { @@ -2443,6 +2444,7 @@ static void cirrus_update_memory_access(CirrusVGAState *s) unmap_linear_vram(s); } } + memory_region_transaction_commit(); } diff --git a/hw/collie.c b/hw/collie.c index 156404d9f3..a10cc1b90c 100644 --- a/hw/collie.c +++ b/hw/collie.c @@ -26,7 +26,6 @@ static void collie_init(ram_addr_t ram_size, { StrongARMState *s; DriveInfo *dinfo; - ram_addr_t phys_flash; if (!cpu_model) { cpu_model = "sa1110"; @@ -34,15 +33,13 @@ static void collie_init(ram_addr_t ram_size, s = sa1110_init(collie_binfo.ram_size, cpu_model); - phys_flash = qemu_ram_alloc(NULL, "collie.fl1", 0x02000000); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(SA_CS0, phys_flash, + pflash_cfi01_register(SA_CS0, NULL, "collie.fl1", 0x02000000, dinfo ? dinfo->bdrv : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); - phys_flash = qemu_ram_alloc(NULL, "collie.fl2", 0x02000000); dinfo = drive_get(IF_PFLASH, 0, 1); - pflash_cfi01_register(SA_CS1, phys_flash, + pflash_cfi01_register(SA_CS1, NULL, "collie.fl2", 0x02000000, dinfo ? dinfo->bdrv : NULL, (64 * 1024), 512, 4, 0x00, 0x00, 0x00, 0x00, 0); diff --git a/hw/dec_pci.c b/hw/dec_pci.c index a35f382052..1aec06611c 100644 --- a/hw/dec_pci.c +++ b/hw/dec_pci.c @@ -80,16 +80,15 @@ PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn) static int pci_dec_21154_init_device(SysBusDevice *dev) { DECState *s; - int pci_mem_config, pci_mem_data; s = FROM_SYSBUS(DECState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - pci_mem_data = pci_host_data_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops, + &s->host_state, "pci-data-idx", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); return 0; } diff --git a/hw/dummy_m68k.c b/hw/dummy_m68k.c index eed9e3843c..30146b9c9d 100644 --- a/hw/dummy_m68k.c +++ b/hw/dummy_m68k.c @@ -10,6 +10,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" +#include "exec-memory.h" #define KERNEL_LOAD_ADDR 0x10000 @@ -21,6 +22,8 @@ static void dummy_m68k_init(ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model) { CPUState *env; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); int kernel_size; uint64_t elf_entry; target_phys_addr_t entry; @@ -37,8 +40,8 @@ static void dummy_m68k_init(ram_addr_t ram_size, env->vbr = 0; /* RAM at address zero */ - cpu_register_physical_memory(0, ram_size, - qemu_ram_alloc(NULL, "dummy_m68k.ram", ram_size) | IO_MEM_RAM); + memory_region_init_ram(ram, NULL, "dummy_m68k.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0, ram); /* Load kernel. */ if (kernel_filename) { diff --git a/hw/flash.h b/hw/flash.h index 270be5e127..9c9e5265b7 100644 --- a/hw/flash.h +++ b/hw/flash.h @@ -1,15 +1,22 @@ /* NOR flash devices */ + +#include "memory.h" + typedef struct pflash_t pflash_t; /* pflash_cfi01.c */ -pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, +pflash_t *pflash_cfi01_register(target_phys_addr_t base, + DeviceState *qdev, const char *name, + target_phys_addr_t size, BlockDriverState *bs, uint32_t sector_len, int nb_blocs, int width, uint16_t id0, uint16_t id1, uint16_t id2, uint16_t id3, int be); /* pflash_cfi02.c */ -pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, +pflash_t *pflash_cfi02_register(target_phys_addr_t base, + DeviceState *qdev, const char *name, + target_phys_addr_t size, BlockDriverState *bs, uint32_t sector_len, int nb_blocs, int nb_mappings, int width, uint16_t id0, uint16_t id1, @@ -17,6 +24,8 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, uint16_t unlock_addr0, uint16_t unlock_addr1, int be); +MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl); + /* nand.c */ DeviceState *nand_init(BlockDriverState *bdrv, int manf_id, int chip_id); void nand_setpins(DeviceState *dev, uint8_t cle, uint8_t ale, diff --git a/hw/grackle_pci.c b/hw/grackle_pci.c index 9a823e1c06..9d3ff7d555 100644 --- a/hw/grackle_pci.c +++ b/hw/grackle_pci.c @@ -92,16 +92,15 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, static int pci_grackle_init_device(SysBusDevice *dev) { GrackleState *s; - int pci_mem_config, pci_mem_data; s = FROM_SYSBUS(GrackleState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - pci_mem_data = pci_host_data_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops, + &s->host_state, "pci-data-idx", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); qemu_register_reset(pci_grackle_reset, &s->host_state); return 0; diff --git a/hw/gumstix.c b/hw/gumstix.c index 853f7e1ee8..b8b76f4b87 100644 --- a/hw/gumstix.c +++ b/hw/gumstix.c @@ -67,8 +67,7 @@ static void connex_init(ram_addr_t ram_size, #else be = 0; #endif - if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "connext.rom", - connex_rom), + if (!pflash_cfi01_register(0x00000000, NULL, "connext.rom", connex_rom, dinfo->bdrv, sector_len, connex_rom / sector_len, 2, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); @@ -106,8 +105,7 @@ static void verdex_init(ram_addr_t ram_size, #else be = 0; #endif - if (!pflash_cfi01_register(0x00000000, qemu_ram_alloc(NULL, "verdex.rom", - verdex_rom), + if (!pflash_cfi01_register(0x00000000, NULL, "verdex.rom", verdex_rom, dinfo->bdrv, sector_len, verdex_rom / sector_len, 2, 0, 0, 0, 0, be)) { fprintf(stderr, "qemu: Error registering flash memory.\n"); diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 281410899f..3c8982ea29 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -13,11 +13,13 @@ #include "boards.h" #include "arm-misc.h" #include "net.h" +#include "exec-memory.h" typedef struct { SysBusDevice busdev; uint32_t memsz; - uint32_t flash_offset; + MemoryRegion flash; + bool flash_mapped; uint32_t cm_osc; uint32_t cm_ctrl; uint32_t cm_lock; @@ -108,9 +110,15 @@ static uint32_t integratorcm_read(void *opaque, target_phys_addr_t offset) static void integratorcm_do_remap(integratorcm_state *s, int flash) { if (flash) { - cpu_register_physical_memory(0, 0x100000, IO_MEM_RAM); + if (s->flash_mapped) { + sysbus_del_memory(&s->busdev, &s->flash); + s->flash_mapped = false; + } } else { - cpu_register_physical_memory(0, 0x100000, s->flash_offset | IO_MEM_RAM); + if (!s->flash_mapped) { + sysbus_add_memory_overlap(&s->busdev, 0, &s->flash, 1); + s->flash_mapped = true; + } } //??? tlb_flush (cpu_single_env, 1); } @@ -252,7 +260,8 @@ static int integratorcm_init(SysBusDevice *dev) } memcpy(integrator_spd + 73, "QEMU-MEMORY", 11); s->cm_init = 0x00000112; - s->flash_offset = qemu_ram_alloc(NULL, "integrator.flash", 0x100000); + memory_region_init_ram(&s->flash, NULL, "integrator.flash", 0x100000); + s->flash_mapped = false; iomemtype = cpu_register_io_memory(integratorcm_readfn, integratorcm_writefn, s, @@ -456,7 +465,9 @@ static void integratorcp_init(ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model) { CPUState *env; - ram_addr_t ram_offset; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *ram_alias = g_new(MemoryRegion, 1); qemu_irq pic[32]; qemu_irq *cpu_pic; DeviceState *dev; @@ -469,13 +480,14 @@ static void integratorcp_init(ram_addr_t ram_size, fprintf(stderr, "Unable to find CPU definition\n"); exit(1); } - ram_offset = qemu_ram_alloc(NULL, "integrator.ram", ram_size); + memory_region_init_ram(ram, NULL, "integrator.ram", ram_size); /* ??? On a real system the first 1Mb is mapped as SSRAM or boot flash. */ /* ??? RAM should repeat to fill physical memory space. */ /* SDRAM at address zero*/ - cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); + memory_region_add_subregion(address_space_mem, 0, ram); /* And again at address 0x80000000 */ - cpu_register_physical_memory(0x80000000, ram_size, ram_offset | IO_MEM_RAM); + memory_region_init_alias(ram_alias, "ram.alias", ram, 0, ram_size); + memory_region_add_subregion(address_space_mem, 0x80000000, ram_alias); dev = qdev_create(NULL, "integrator_core"); qdev_prop_set_uint32(dev, "memsz", ram_size >> 20); diff --git a/hw/leon3.c b/hw/leon3.c index a62a9419f3..607ec852fe 100644 --- a/hw/leon3.c +++ b/hw/leon3.c @@ -29,6 +29,7 @@ #include "loader.h" #include "elf.h" #include "trace.h" +#include "exec-memory.h" #include "grlib.h" @@ -100,7 +101,9 @@ static void leon3_generic_hw_init(ram_addr_t ram_size, const char *cpu_model) { CPUState *env; - ram_addr_t ram_offset, prom_offset; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *prom = g_new(MemoryRegion, 1); int ret; char *filename; qemu_irq *cpu_irqs = NULL; @@ -139,14 +142,14 @@ static void leon3_generic_hw_init(ram_addr_t ram_size, exit(1); } - ram_offset = qemu_ram_alloc(NULL, "leon3.ram", ram_size); - cpu_register_physical_memory(0x40000000, ram_size, ram_offset | IO_MEM_RAM); + memory_region_init_ram(ram, NULL, "leon3.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0x40000000, ram); /* Allocate BIOS */ prom_size = 8 * 1024 * 1024; /* 8Mb */ - prom_offset = qemu_ram_alloc(NULL, "Leon3.bios", prom_size); - cpu_register_physical_memory(0x00000000, prom_size, - prom_offset | IO_MEM_ROM); + memory_region_init_ram(prom, NULL, "Leon3.bios", prom_size); + memory_region_set_readonly(prom, true); + memory_region_add_subregion(address_space_mem, 0x00000000, prom); /* Load boot prom */ if (bios_name == NULL) { diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c index d18aad7435..97e1c001b9 100644 --- a/hw/lm32_boards.c +++ b/hw/lm32_boards.c @@ -28,6 +28,7 @@ #include "elf.h" #include "lm32_hwsetup.h" #include "lm32.h" +#include "exec-memory.h" typedef struct { CPUState *env; @@ -76,8 +77,8 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used, { CPUState *env; DriveInfo *dinfo; - ram_addr_t phys_ram; - ram_addr_t phys_flash; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *phys_ram = g_new(MemoryRegion, 1); qemu_irq *cpu_irq, irq[32]; ResetInfo *reset_info; int i; @@ -105,13 +106,12 @@ static void lm32_evr_init(ram_addr_t ram_size_not_used, reset_info->flash_base = flash_base; - phys_ram = qemu_ram_alloc(NULL, "lm32_evr.sdram", ram_size); - cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM); + memory_region_init_ram(phys_ram, NULL, "lm32_evr.sdram", ram_size); + memory_region_add_subregion(address_space_mem, ram_base, phys_ram); - phys_flash = qemu_ram_alloc(NULL, "lm32_evr.flash", flash_size); dinfo = drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, phys_flash, + pflash_cfi02_register(flash_base, NULL, "lm32_evr.flash", flash_size, dinfo ? dinfo->bdrv : NULL, flash_sector_size, flash_size / flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); @@ -164,8 +164,8 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used, { CPUState *env; DriveInfo *dinfo; - ram_addr_t phys_ram; - ram_addr_t phys_flash; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *phys_ram = g_new(MemoryRegion, 1); qemu_irq *cpu_irq, irq[32]; HWSetup *hw; ResetInfo *reset_info; @@ -200,13 +200,12 @@ static void lm32_uclinux_init(ram_addr_t ram_size_not_used, reset_info->flash_base = flash_base; - phys_ram = qemu_ram_alloc(NULL, "lm32_uclinux.sdram", ram_size); - cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM); + memory_region_init_ram(phys_ram, NULL, "lm32_uclinux.sdram", ram_size); + memory_region_add_subregion(address_space_mem, ram_base, phys_ram); - phys_flash = qemu_ram_alloc(NULL, "lm32_uclinux.flash", flash_size); dinfo = drive_get(IF_PFLASH, 0, 0); /* Spansion S29NS128P */ - pflash_cfi02_register(flash_base, phys_flash, + pflash_cfi02_register(flash_base, NULL, "lm32_uclinux.flash", flash_size, dinfo ? dinfo->bdrv : NULL, flash_sector_size, flash_size / flash_sector_size, 1, 2, 0x01, 0x7e, 0x43, 0x00, 0x555, 0x2aa, 1); diff --git a/hw/mainstone.c b/hw/mainstone.c index 4792f0e3ed..336f31e64e 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -17,6 +17,7 @@ #include "flash.h" #include "blockdev.h" #include "sysbus.h" +#include "exec-memory.h" /* Device addresses */ #define MST_FPGA_PHYS 0x08000000 @@ -90,7 +91,8 @@ static struct arm_boot_info mainstone_binfo = { .ram_size = 0x04000000, }; -static void mainstone_common_init(ram_addr_t ram_size, +static void mainstone_common_init(MemoryRegion *address_space_mem, + ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum mainstone_model_e model, int arm_id) @@ -102,15 +104,16 @@ static void mainstone_common_init(ram_addr_t ram_size, DriveInfo *dinfo; int i; int be; + MemoryRegion *rom = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "pxa270-c5"; /* Setup CPU & memory */ cpu = pxa270_init(mainstone_binfo.ram_size, cpu_model); - cpu_register_physical_memory(0, MAINSTONE_ROM, - qemu_ram_alloc(NULL, "mainstone.rom", - MAINSTONE_ROM) | IO_MEM_ROM); + memory_region_init_ram(rom, NULL, "mainstone.rom", MAINSTONE_ROM); + memory_region_set_readonly(rom, true); + memory_region_add_subregion(address_space_mem, 0, rom); #ifdef TARGET_WORDS_BIGENDIAN be = 1; @@ -126,10 +129,9 @@ static void mainstone_common_init(ram_addr_t ram_size, exit(1); } - if (!pflash_cfi01_register(mainstone_flash_base[i], - qemu_ram_alloc(NULL, i ? "mainstone.flash1" : - "mainstone.flash0", - MAINSTONE_FLASH), + if (!pflash_cfi01_register(mainstone_flash_base[i], NULL, + i ? "mainstone.flash1" : "mainstone.flash0", + MAINSTONE_FLASH, dinfo->bdrv, sector_len, MAINSTONE_FLASH / sector_len, 4, 0, 0, 0, 0, be)) { @@ -170,7 +172,7 @@ static void mainstone_init(ram_addr_t ram_size, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model) { - mainstone_common_init(ram_size, kernel_filename, + mainstone_common_init(get_system_memory(), ram_size, kernel_filename, kernel_cmdline, initrd_filename, cpu_model, mainstone, 0x196); } diff --git a/hw/mcf5208.c b/hw/mcf5208.c index 8fe507f82f..1c2c0c48aa 100644 --- a/hw/mcf5208.c +++ b/hw/mcf5208.c @@ -13,6 +13,7 @@ #include "boards.h" #include "loader.h" #include "elf.h" +#include "exec-memory.h" #define SYS_FREQ 66000000 @@ -27,6 +28,7 @@ #define PCSR_PRE_MASK 0x0f00 typedef struct { + MemoryRegion iomem; qemu_irq irq; ptimer_state *timer; uint16_t pcsr; @@ -43,7 +45,7 @@ static void m5208_timer_update(m5208_timer_state *s) } static void m5208_timer_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { m5208_timer_state *s = (m5208_timer_state *)opaque; int prescale; @@ -104,7 +106,8 @@ static void m5208_timer_trigger(void *opaque) m5208_timer_update(s); } -static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr) +static uint64_t m5208_timer_read(void *opaque, target_phys_addr_t addr, + unsigned size) { m5208_timer_state *s = (m5208_timer_state *)opaque; switch (addr) { @@ -120,19 +123,14 @@ static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr) } } -static CPUReadMemoryFunc * const m5208_timer_readfn[] = { - m5208_timer_read, - m5208_timer_read, - m5208_timer_read +static const MemoryRegionOps m5208_timer_ops = { + .read = m5208_timer_read, + .write = m5208_timer_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUWriteMemoryFunc * const m5208_timer_writefn[] = { - m5208_timer_write, - m5208_timer_write, - m5208_timer_write -}; - -static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr) +static uint64_t m5208_sys_read(void *opaque, target_phys_addr_t addr, + unsigned size) { switch (addr) { case 0x110: /* SDCS0 */ @@ -154,45 +152,36 @@ static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr) } static void m5208_sys_write(void *opaque, target_phys_addr_t addr, - uint32_t value) + uint64_t value, unsigned size) { hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr); } -static CPUReadMemoryFunc * const m5208_sys_readfn[] = { - m5208_sys_read, - m5208_sys_read, - m5208_sys_read -}; - -static CPUWriteMemoryFunc * const m5208_sys_writefn[] = { - m5208_sys_write, - m5208_sys_write, - m5208_sys_write +static const MemoryRegionOps m5208_sys_ops = { + .read = m5208_sys_read, + .write = m5208_sys_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static void mcf5208_sys_init(qemu_irq *pic) +static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic) { - int iomemtype; + MemoryRegion *iomem = g_new(MemoryRegion, 1); m5208_timer_state *s; QEMUBH *bh; int i; - iomemtype = cpu_register_io_memory(m5208_sys_readfn, - m5208_sys_writefn, NULL, - DEVICE_NATIVE_ENDIAN); /* SDRAMC. */ - cpu_register_physical_memory(0xfc0a8000, 0x00004000, iomemtype); + memory_region_init_io(iomem, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000); + memory_region_add_subregion(address_space, 0xfc0a8000, iomem); /* Timers. */ for (i = 0; i < 2; i++) { s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state)); bh = qemu_bh_new(m5208_timer_trigger, s); s->timer = ptimer_init(bh); - iomemtype = cpu_register_io_memory(m5208_timer_readfn, - m5208_timer_writefn, s, - DEVICE_NATIVE_ENDIAN); - cpu_register_physical_memory(0xfc080000 + 0x4000 * i, 0x00004000, - iomemtype); + memory_region_init_io(&s->iomem, &m5208_timer_ops, s, + "m5208-timer", 0x00004000); + memory_region_add_subregion(address_space, 0xfc080000 + 0x4000 * i, + &s->iomem); s->irq = pic[4 + i]; } } @@ -207,6 +196,9 @@ static void mcf5208evb_init(ram_addr_t ram_size, uint64_t elf_entry; target_phys_addr_t entry; qemu_irq *pic; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *sram = g_new(MemoryRegion, 1); if (!cpu_model) cpu_model = "m5208"; @@ -221,12 +213,12 @@ static void mcf5208evb_init(ram_addr_t ram_size, /* TODO: Configure BARs. */ /* DRAM at 0x40000000 */ - cpu_register_physical_memory(0x40000000, ram_size, - qemu_ram_alloc(NULL, "mcf5208.ram", ram_size) | IO_MEM_RAM); + memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size); + memory_region_add_subregion(address_space_mem, 0x40000000, ram); /* Internal SRAM. */ - cpu_register_physical_memory(0x80000000, 16384, - qemu_ram_alloc(NULL, "mcf5208.sram", 16384) | IO_MEM_RAM); + memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384); + memory_region_add_subregion(address_space_mem, 0x80000000, sram); /* Internal peripherals. */ pic = mcf_intc_init(0xfc048000, env); @@ -235,7 +227,7 @@ static void mcf5208evb_init(ram_addr_t ram_size, mcf_uart_mm_init(0xfc064000, pic[27], serial_hds[1]); mcf_uart_mm_init(0xfc068000, pic[28], serial_hds[2]); - mcf5208_sys_init(pic); + mcf5208_sys_init(address_space_mem, pic); if (nb_nics > 1) { fprintf(stderr, "Too many NICs\n"); diff --git a/hw/milkymist-minimac2.c b/hw/milkymist-minimac2.c index cd360264c1..fb48e37187 100644 --- a/hw/milkymist-minimac2.c +++ b/hw/milkymist-minimac2.c @@ -97,6 +97,8 @@ struct MilkymistMinimac2State { NICConf conf; char *phy_model; target_phys_addr_t buffers_base; + MemoryRegion buffers; + MemoryRegion regs_region; qemu_irq rx_irq; qemu_irq tx_irq; @@ -320,8 +322,8 @@ static ssize_t minimac2_rx(VLANClientState *nc, const uint8_t *buf, size_t size) return size; } -static uint32_t -minimac2_read(void *opaque, target_phys_addr_t addr) +static uint64_t +minimac2_read(void *opaque, target_phys_addr_t addr, unsigned size) { MilkymistMinimac2State *s = opaque; uint32_t r = 0; @@ -350,7 +352,8 @@ minimac2_read(void *opaque, target_phys_addr_t addr) } static void -minimac2_write(void *opaque, target_phys_addr_t addr, uint32_t value) +minimac2_write(void *opaque, target_phys_addr_t addr, uint64_t value, + unsigned size) { MilkymistMinimac2State *s = opaque; @@ -395,16 +398,14 @@ minimac2_write(void *opaque, target_phys_addr_t addr, uint32_t value) } } -static CPUReadMemoryFunc * const minimac2_read_fn[] = { - NULL, - NULL, - &minimac2_read, -}; - -static CPUWriteMemoryFunc * const minimac2_write_fn[] = { - NULL, - NULL, - &minimac2_write, +static const MemoryRegionOps minimac2_ops = { + .read = minimac2_read, + .write = minimac2_write, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; static int minimac2_can_rx(VLANClientState *nc) @@ -457,25 +458,23 @@ static NetClientInfo net_milkymist_minimac2_info = { static int milkymist_minimac2_init(SysBusDevice *dev) { MilkymistMinimac2State *s = FROM_SYSBUS(typeof(*s), dev); - int regs; - ram_addr_t buffers; size_t buffers_size = TARGET_PAGE_ALIGN(3 * MINIMAC2_BUFFER_SIZE); sysbus_init_irq(dev, &s->rx_irq); sysbus_init_irq(dev, &s->tx_irq); - regs = cpu_register_io_memory(minimac2_read_fn, minimac2_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, regs); + memory_region_init_io(&s->regs_region, &minimac2_ops, s, + "minimac2-mmio", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->regs_region); /* register buffers memory */ - buffers = qemu_ram_alloc(NULL, "milkymist_minimac2.buffers", buffers_size); - s->rx0_buf = qemu_get_ram_ptr(buffers); + memory_region_init_ram(&s->buffers, NULL, "milkymist_minimac2.buffers", + buffers_size); + s->rx0_buf = memory_region_get_ram_ptr(&s->buffers); s->rx1_buf = s->rx0_buf + MINIMAC2_BUFFER_SIZE; s->tx_buf = s->rx1_buf + MINIMAC2_BUFFER_SIZE; - cpu_register_physical_memory(s->buffers_base, buffers_size, - buffers | IO_MEM_RAM); + sysbus_add_memory(dev, s->buffers_base, &s->buffers); qemu_macaddr_default_if_unset(&s->conf.macaddr); s->nic = qemu_new_nic(&net_milkymist_minimac2_info, &s->conf, diff --git a/hw/milkymist-softusb.c b/hw/milkymist-softusb.c index fe4eedb2cb..ef4d9ee2ce 100644 --- a/hw/milkymist-softusb.c +++ b/hw/milkymist-softusb.c @@ -49,6 +49,9 @@ struct MilkymistSoftUsbState { HIDState hid_kbd; HIDState hid_mouse; + MemoryRegion regs_region; + MemoryRegion pmem; + MemoryRegion dmem; qemu_irq irq; /* device properties */ @@ -68,7 +71,8 @@ struct MilkymistSoftUsbState { }; typedef struct MilkymistSoftUsbState MilkymistSoftUsbState; -static uint32_t softusb_read(void *opaque, target_phys_addr_t addr) +static uint64_t softusb_read(void *opaque, target_phys_addr_t addr, + unsigned size) { MilkymistSoftUsbState *s = opaque; uint32_t r = 0; @@ -91,7 +95,8 @@ static uint32_t softusb_read(void *opaque, target_phys_addr_t addr) } static void -softusb_write(void *opaque, target_phys_addr_t addr, uint32_t value) +softusb_write(void *opaque, target_phys_addr_t addr, uint64_t value, + unsigned size) { MilkymistSoftUsbState *s = opaque; @@ -110,16 +115,14 @@ softusb_write(void *opaque, target_phys_addr_t addr, uint32_t value) } } -static CPUReadMemoryFunc * const softusb_read_fn[] = { - NULL, - NULL, - &softusb_read, -}; - -static CPUWriteMemoryFunc * const softusb_write_fn[] = { - NULL, - NULL, - &softusb_write, +static const MemoryRegionOps softusb_mmio_ops = { + .read = softusb_read, + .write = softusb_write, + .endianness = DEVICE_NATIVE_ENDIAN, + .valid = { + .min_access_size = 4, + .max_access_size = 4, + }, }; static inline void softusb_read_dmem(MilkymistSoftUsbState *s, @@ -256,23 +259,20 @@ static void milkymist_softusb_reset(DeviceState *d) static int milkymist_softusb_init(SysBusDevice *dev) { MilkymistSoftUsbState *s = FROM_SYSBUS(typeof(*s), dev); - int softusb_regs; - ram_addr_t pmem_ram; - ram_addr_t dmem_ram; sysbus_init_irq(dev, &s->irq); - softusb_regs = cpu_register_io_memory(softusb_read_fn, softusb_write_fn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, R_MAX * 4, softusb_regs); + memory_region_init_io(&s->regs_region, &softusb_mmio_ops, s, + "milkymist-softusb", R_MAX * 4); + sysbus_init_mmio_region(dev, &s->regs_region); /* register pmem and dmem */ - pmem_ram = qemu_ram_alloc(NULL, "milkymist_softusb.pmem", s->pmem_size); - cpu_register_physical_memory(s->pmem_base, s->pmem_size, - pmem_ram | IO_MEM_RAM); - dmem_ram = qemu_ram_alloc(NULL, "milkymist_softusb.dmem", s->dmem_size); - cpu_register_physical_memory(s->dmem_base, s->dmem_size, - dmem_ram | IO_MEM_RAM); + memory_region_init_ram(&s->pmem, NULL, "milkymist_softusb.pmem", + s->pmem_size); + sysbus_add_memory(dev, s->pmem_base, &s->pmem); + memory_region_init_ram(&s->dmem, NULL, "milkymist_softusb.dmem", + s->dmem_size); + sysbus_add_memory(dev, s->dmem_base, &s->dmem); hid_init(&s->hid_kbd, HID_KEYBOARD, softusb_kbd_hid_datain); hid_init(&s->hid_mouse, HID_MOUSE, softusb_mouse_hid_datain); diff --git a/hw/milkymist.c b/hw/milkymist.c index 93288c8401..bca0a58d8c 100644 --- a/hw/milkymist.c +++ b/hw/milkymist.c @@ -29,6 +29,7 @@ #include "blockdev.h" #include "milkymist-hw.h" #include "lm32.h" +#include "exec-memory.h" #define BIOS_FILENAME "mmone-bios.bin" #define BIOS_OFFSET 0x00860000 @@ -81,8 +82,8 @@ milkymist_init(ram_addr_t ram_size_not_used, CPUState *env; int kernel_size; DriveInfo *dinfo; - ram_addr_t phys_sdram; - ram_addr_t phys_flash; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *phys_sdram = g_new(MemoryRegion, 1); qemu_irq irq[32], *cpu_irq; int i; char *bios_filename; @@ -109,14 +110,12 @@ milkymist_init(ram_addr_t ram_size_not_used, cpu_lm32_set_phys_msb_ignore(env, 1); - phys_sdram = qemu_ram_alloc(NULL, "milkymist.sdram", sdram_size); - cpu_register_physical_memory(sdram_base, sdram_size, - phys_sdram | IO_MEM_RAM); + memory_region_init_ram(phys_sdram, NULL, "milkymist.sdram", sdram_size); + memory_region_add_subregion(address_space_mem, sdram_base, phys_sdram); - phys_flash = qemu_ram_alloc(NULL, "milkymist.flash", flash_size); dinfo = drive_get(IF_PFLASH, 0, 0); /* Numonyx JS28F256J3F105 */ - pflash_cfi01_register(flash_base, phys_flash, + pflash_cfi01_register(flash_base, NULL, "milkymist.flash", flash_size, dinfo ? dinfo->bdrv : NULL, flash_sector_size, flash_size / flash_sector_size, 2, 0x00, 0x89, 0x00, 0x1d, 1); diff --git a/hw/mips_fulong2e.c b/hw/mips_fulong2e.c index ec8c88e2e1..abe30569f2 100644 --- a/hw/mips_fulong2e.c +++ b/hw/mips_fulong2e.c @@ -38,6 +38,7 @@ #include "vt82c686.h" #include "mc146818rtc.h" #include "blockdev.h" +#include "exec-memory.h" #define DEBUG_FULONG2E_INIT @@ -256,7 +257,9 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, const char *initrd_filename, const char *cpu_model) { char *filename; - unsigned long ram_offset, bios_offset; + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *bios = g_new(MemoryRegion, 1); long bios_size; int64_t kernel_entry; qemu_irq *i8259; @@ -288,12 +291,12 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, bios_size = 1024 * 1024; /* allocate RAM */ - ram_offset = qemu_ram_alloc(NULL, "fulong2e.ram", ram_size); - bios_offset = qemu_ram_alloc(NULL, "fulong2e.bios", bios_size); + memory_region_init_ram(ram, NULL, "fulong2e.ram", ram_size); + memory_region_init_ram(bios, NULL, "fulong2e.bios", bios_size); + memory_region_set_readonly(bios, true); - cpu_register_physical_memory(0, ram_size, ram_offset); - cpu_register_physical_memory(0x1fc00000LL, - bios_size, bios_offset | IO_MEM_ROM); + memory_region_add_subregion(address_space_mem, 0, ram); + memory_region_add_subregion(address_space_mem, 0x1fc00000LL, bios); /* We do not support flash operation, just loading pmon.bin as raw BIOS. * Please use -L to set the BIOS path and -bios to set bios name. */ @@ -304,7 +307,7 @@ static void mips_fulong2e_init(ram_addr_t ram_size, const char *boot_device, loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; kernel_entry = load_kernel (env); - write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry); + write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); } else { if (bios_name == NULL) { bios_name = FULONG_BIOSNAME; diff --git a/hw/mips_malta.c b/hw/mips_malta.c index 86a8ba07d3..e7cdf2091b 100644 --- a/hw/mips_malta.c +++ b/hw/mips_malta.c @@ -46,6 +46,7 @@ #include "elf.h" #include "mc146818rtc.h" #include "blockdev.h" +#include "exec-memory.h" //#define DEBUG_BOARD_INIT @@ -732,6 +733,12 @@ static int64_t load_kernel (void) return kernel_entry; } +static void malta_mips_config(CPUState *env) +{ + env->mvp->CP0_MVPConf0 |= ((smp_cpus - 1) << CP0MVPC0_PVPE) | + ((smp_cpus * env->nr_threads - 1) << CP0MVPC0_PTC); +} + static void main_cpu_reset(void *opaque) { CPUState *env = opaque; @@ -743,6 +750,8 @@ static void main_cpu_reset(void *opaque) if (loaderparams.kernel_filename) { env->CP0_Status &= ~((1 << CP0St_BEV) | (1 << CP0St_ERL)); } + + malta_mips_config(env); } static void cpu_request_exit(void *opaque, int irq, int level) @@ -761,8 +770,10 @@ void mips_malta_init (ram_addr_t ram_size, const char *initrd_filename, const char *cpu_model) { char *filename; + pflash_t *fl; ram_addr_t ram_offset; - ram_addr_t bios_offset; + MemoryRegion *system_memory = get_system_memory(); + MemoryRegion *bios, *bios_alias = g_new(MemoryRegion, 1); target_long bios_size; int64_t kernel_entry; PCIBus *pci_bus; @@ -796,12 +807,19 @@ void mips_malta_init (ram_addr_t ram_size, cpu_model = "24Kf"; #endif } - env = cpu_init(cpu_model); - if (!env) { - fprintf(stderr, "Unable to find CPU definition\n"); - exit(1); + + for (i = 0; i < smp_cpus; i++) { + env = cpu_init(cpu_model); + if (!env) { + fprintf(stderr, "Unable to find CPU definition\n"); + exit(1); + } + /* Init internal devices */ + cpu_mips_irq_init_cpu(env); + cpu_mips_clock_init(env); + qemu_register_reset(main_cpu_reset, env); } - qemu_register_reset(main_cpu_reset, env); + env = first_cpu; /* allocate RAM */ if (ram_size > (256 << 20)) { @@ -811,17 +829,9 @@ void mips_malta_init (ram_addr_t ram_size, exit(1); } ram_offset = qemu_ram_alloc(NULL, "mips_malta.ram", ram_size); - bios_offset = qemu_ram_alloc(NULL, "mips_malta.bios", BIOS_SIZE); - cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); - /* Map the bios at two physical locations, as on the real board. */ - cpu_register_physical_memory(0x1e000000LL, - BIOS_SIZE, bios_offset | IO_MEM_ROM); - cpu_register_physical_memory(0x1fc00000LL, - BIOS_SIZE, bios_offset | IO_MEM_ROM); - #ifdef TARGET_WORDS_BIGENDIAN be = 1; #else @@ -833,12 +843,19 @@ void mips_malta_init (ram_addr_t ram_size, /* Load firmware in flash / BIOS unless we boot directly into a kernel. */ if (kernel_filename) { /* Write a small bootloader to the flash location. */ + bios = g_new(MemoryRegion, 1); + memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE); + memory_region_set_readonly(bios, true); + memory_region_init_alias(bios_alias, "bios.1fc", bios, 0, BIOS_SIZE); + /* Map the bios at two physical locations, as on the real board. */ + memory_region_add_subregion(system_memory, 0x1e000000LL, bios); + memory_region_add_subregion(system_memory, 0x1fc00000LL, bios_alias); loaderparams.ram_size = ram_size; loaderparams.kernel_filename = kernel_filename; loaderparams.kernel_cmdline = kernel_cmdline; loaderparams.initrd_filename = initrd_filename; kernel_entry = load_kernel(); - write_bootloader(env, qemu_get_ram_ptr(bios_offset), kernel_entry); + write_bootloader(env, memory_region_get_ram_ptr(bios), kernel_entry); } else { dinfo = drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { @@ -847,15 +864,31 @@ void mips_malta_init (ram_addr_t ram_size, fl_sectors = bios_size >> 16; #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size " TARGET_FMT_lx " at " - "offset %08lx addr %08llx '%s' %x\n", - fl_idx, bios_size, bios_offset, 0x1e000000LL, + "addr %08llx '%s' %x\n", + fl_idx, bios_size, 0x1e000000LL, bdrv_get_device_name(dinfo->bdrv), fl_sectors); #endif - pflash_cfi01_register(0x1e000000LL, bios_offset, - dinfo->bdrv, 65536, fl_sectors, - 4, 0x0000, 0x0000, 0x0000, 0x0000, be); - fl_idx++; + fl = pflash_cfi01_register(0x1e000000LL, + NULL, "mips_malta.bios", BIOS_SIZE, + dinfo->bdrv, 65536, fl_sectors, + 4, 0x0000, 0x0000, 0x0000, 0x0000, be); + bios = pflash_cfi01_get_memory(fl); + /* Map the bios at two physical locations, as on the real board. */ + memory_region_init_alias(bios_alias, "bios.1fc", + bios, 0, BIOS_SIZE); + memory_region_add_subregion(system_memory, 0x1fc00000LL, + bios_alias); + fl_idx++; } else { + bios = g_new(MemoryRegion, 1); + memory_region_init_ram(bios, NULL, "mips_malta.bios", BIOS_SIZE); + memory_region_set_readonly(bios, true); + memory_region_init_alias(bios_alias, "bios.1fc", + bios, 0, BIOS_SIZE); + /* Map the bios at two physical locations, as on the real board. */ + memory_region_add_subregion(system_memory, 0x1e000000LL, bios); + memory_region_add_subregion(system_memory, 0x1fc00000LL, + bios_alias); /* Load a BIOS image. */ if (bios_name == NULL) bios_name = BIOS_FILENAME; @@ -878,7 +911,7 @@ void mips_malta_init (ram_addr_t ram_size, a neat trick which allows bi-endian firmware. */ #ifndef TARGET_WORDS_BIGENDIAN { - uint32_t *addr = qemu_get_ram_ptr(bios_offset);; + uint32_t *addr = memory_region_get_ram_ptr(bios); uint32_t *end = addr + bios_size; while (addr < end) { bswap32s(addr); @@ -890,7 +923,7 @@ void mips_malta_init (ram_addr_t ram_size, /* Board ID = 0x420 (Malta Board with CoreLV) XXX: theoretically 0x1e000010 should map to flash and 0x1fc00010 should map to the board ID. */ - stl_p(qemu_get_ram_ptr(bios_offset) + 0x10, 0x00000420); + stl_p(memory_region_get_ram_ptr(bios) + 0x10, 0x00000420); /* Init internal devices */ cpu_mips_irq_init_cpu(env); @@ -955,6 +988,7 @@ static QEMUMachine mips_malta_machine = { .name = "malta", .desc = "MIPS Malta Core LV", .init = mips_malta_init, + .max_cpus = 16, .is_default = 1, }; diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index 9d90568e4e..5d002c5a2b 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -23,6 +23,7 @@ #include "elf.h" #include "mc146818rtc.h" #include "blockdev.h" +#include "exec-memory.h" #define MAX_IDE_BUS 2 @@ -163,7 +164,7 @@ void mips_r4k_init (ram_addr_t ram_size, { char *filename; ram_addr_t ram_offset; - ram_addr_t bios_offset; + MemoryRegion *bios; int bios_size; CPUState *env; ResetData *reset_info; @@ -227,15 +228,15 @@ void mips_r4k_init (ram_addr_t ram_size, be = 0; #endif if ((bios_size > 0) && (bios_size <= BIOS_SIZE)) { - bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", BIOS_SIZE); - cpu_register_physical_memory(0x1fc00000, BIOS_SIZE, - bios_offset | IO_MEM_ROM); + bios = g_new(MemoryRegion, 1); + memory_region_init_ram(bios, NULL, "mips_r4k.bios", BIOS_SIZE); + memory_region_set_readonly(bios, true); + memory_region_add_subregion(get_system_memory(), 0x1fc00000, bios); load_image_targphys(filename, 0x1fc00000, BIOS_SIZE); } else if ((dinfo = drive_get(IF_PFLASH, 0, 0)) != NULL) { uint32_t mips_rom = 0x00400000; - bios_offset = qemu_ram_alloc(NULL, "mips_r4k.bios", mips_rom); - if (!pflash_cfi01_register(0x1fc00000, bios_offset, + if (!pflash_cfi01_register(0x1fc00000, NULL, "mips_r4k.bios", mips_rom, dinfo->bdrv, sector_len, mips_rom / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/hw/musicpal.c b/hw/musicpal.c index 63dd391176..ade5a91feb 100644 --- a/hw/musicpal.c +++ b/hw/musicpal.c @@ -1565,16 +1565,16 @@ static void musicpal_init(ram_addr_t ram_size, * image is smaller than 32 MB. */ #ifdef TARGET_WORDS_BIGENDIAN - pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL, - "musicpal.flash", flash_size), + pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, NULL, + "musicpal.flash", flash_size, dinfo->bdrv, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, 2, 0x00BF, 0x236D, 0x0000, 0x0000, 0x5555, 0x2AAA, 1); #else - pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, qemu_ram_alloc(NULL, - "musicpal.flash", flash_size), + pflash_cfi02_register(0-MP_FLASH_SIZE_MAX, NULL, + "musicpal.flash", flash_size, dinfo->bdrv, 0x10000, (flash_size + 0xffff) >> 16, MP_FLASH_SIZE_MAX / flash_size, diff --git a/hw/omap_sx1.c b/hw/omap_sx1.c index a7b687bc41..15cfbb52f3 100644 --- a/hw/omap_sx1.c +++ b/hw/omap_sx1.c @@ -161,8 +161,8 @@ static void sx1_init(ram_addr_t ram_size, #endif if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) { - if (!pflash_cfi01_register(OMAP_CS0_BASE, qemu_ram_alloc(NULL, - "omap_sx1.flash0-1", flash_size), + if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL, + "omap_sx1.flash0-1", flash_size, dinfo->bdrv, sector_size, flash_size / sector_size, 4, 0, 0, 0, 0, be)) { @@ -182,8 +182,8 @@ static void sx1_init(ram_addr_t ram_size, cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size, OMAP_CS1_SIZE - flash1_size, io); - if (!pflash_cfi01_register(OMAP_CS1_BASE, qemu_ram_alloc(NULL, - "omap_sx1.flash1-1", flash1_size), + if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL, + "omap_sx1.flash1-1", flash1_size, dinfo->bdrv, sector_size, flash1_size / sector_size, 4, 0, 0, 0, 0, be)) { diff --git a/hw/pci_host.c b/hw/pci_host.c index 2e8a29f1e3..44c6c207a9 100644 --- a/hw/pci_host.c +++ b/hw/pci_host.c @@ -94,82 +94,72 @@ uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len) return val; } -static void pci_host_config_write(ReadWriteHandler *handler, - pcibus_t addr, uint32_t val, int len) +static void pci_host_config_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned len) { - PCIHostState *s = container_of(handler, PCIHostState, conf_handler); + PCIHostState *s = opaque; - PCI_DPRINTF("%s addr %" FMT_PCIBUS " %d val %"PRIx32"\n", + PCI_DPRINTF("%s addr " TARGET_FMT_plx " len %d val %"PRIx64"\n", __func__, addr, len, val); s->config_reg = val; } -static uint32_t pci_host_config_read(ReadWriteHandler *handler, - pcibus_t addr, int len) +static uint64_t pci_host_config_read(void *opaque, target_phys_addr_t addr, + unsigned len) { - PCIHostState *s = container_of(handler, PCIHostState, conf_handler); + PCIHostState *s = opaque; uint32_t val = s->config_reg; - PCI_DPRINTF("%s addr %" FMT_PCIBUS " len %d val %"PRIx32"\n", + PCI_DPRINTF("%s addr " TARGET_FMT_plx " len %d val %"PRIx32"\n", __func__, addr, len, val); return val; } -static void pci_host_data_write(ReadWriteHandler *handler, - pcibus_t addr, uint32_t val, int len) +static void pci_host_data_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned len) { - PCIHostState *s = container_of(handler, PCIHostState, data_handler); - PCI_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", - addr, len, val); + PCIHostState *s = opaque; + PCI_DPRINTF("write addr " TARGET_FMT_plx " len %d val %x\n", + addr, len, (unsigned)val); if (s->config_reg & (1u << 31)) pci_data_write(s->bus, s->config_reg | (addr & 3), val, len); } -static uint32_t pci_host_data_read(ReadWriteHandler *handler, - pcibus_t addr, int len) +static uint64_t pci_host_data_read(void *opaque, + target_phys_addr_t addr, unsigned len) { - PCIHostState *s = container_of(handler, PCIHostState, data_handler); + PCIHostState *s = opaque; uint32_t val; if (!(s->config_reg & (1 << 31))) return 0xffffffff; val = pci_data_read(s->bus, s->config_reg | (addr & 3), len); - PCI_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", + PCI_DPRINTF("read addr " TARGET_FMT_plx " len %d val %x\n", addr, len, val); return val; } -static void pci_host_init(PCIHostState *s) -{ - s->conf_handler.write = pci_host_config_write; - s->conf_handler.read = pci_host_config_read; - s->data_handler.write = pci_host_data_write; - s->data_handler.read = pci_host_data_read; -} +const MemoryRegionOps pci_host_conf_le_ops = { + .read = pci_host_config_read, + .write = pci_host_config_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; -int pci_host_conf_register_mmio(PCIHostState *s, int endian) -{ - pci_host_init(s); - return cpu_register_io_memory_simple(&s->conf_handler, endian); -} +const MemoryRegionOps pci_host_conf_be_ops = { + .read = pci_host_config_read, + .write = pci_host_config_write, + .endianness = DEVICE_BIG_ENDIAN, +}; -void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s) -{ - pci_host_init(s); - register_ioport_simple(&s->conf_handler, ioport, 4, 4); - sysbus_init_ioports(&s->busdev, ioport, 4); -} +const MemoryRegionOps pci_host_data_le_ops = { + .read = pci_host_data_read, + .write = pci_host_data_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + +const MemoryRegionOps pci_host_data_be_ops = { + .read = pci_host_data_read, + .write = pci_host_data_write, + .endianness = DEVICE_BIG_ENDIAN, +}; -int pci_host_data_register_mmio(PCIHostState *s, int endian) -{ - pci_host_init(s); - return cpu_register_io_memory_simple(&s->data_handler, endian); -} -void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s) -{ - pci_host_init(s); - register_ioport_simple(&s->data_handler, ioport, 4, 1); - register_ioport_simple(&s->data_handler, ioport, 4, 2); - register_ioport_simple(&s->data_handler, ioport, 4, 4); - sysbus_init_ioports(&s->busdev, ioport, 4); -} diff --git a/hw/pci_host.h b/hw/pci_host.h index 7f551143bb..0211086d70 100644 --- a/hw/pci_host.h +++ b/hw/pci_host.h @@ -29,12 +29,11 @@ #define PCI_HOST_H #include "sysbus.h" -#include "rwhandler.h" struct PCIHostState { SysBusDevice busdev; - ReadWriteHandler conf_handler; - ReadWriteHandler data_handler; + MemoryRegion conf_mem; + MemoryRegion data_mem; MemoryRegion *address_space; uint32_t config_reg; PCIBus *bus; @@ -49,12 +48,9 @@ uint32_t pci_host_config_read_common(PCIDevice *pci_dev, uint32_t addr, void pci_data_write(PCIBus *s, uint32_t addr, uint32_t val, int len); uint32_t pci_data_read(PCIBus *s, uint32_t addr, int len); -/* for mmio */ -int pci_host_conf_register_mmio(PCIHostState *s, int endian); -int pci_host_data_register_mmio(PCIHostState *s, int endian); - -/* for ioio */ -void pci_host_conf_register_ioport(pio_addr_t ioport, PCIHostState *s); -void pci_host_data_register_ioport(pio_addr_t ioport, PCIHostState *s); +extern const MemoryRegionOps pci_host_conf_le_ops; +extern const MemoryRegionOps pci_host_conf_be_ops; +extern const MemoryRegionOps pci_host_data_le_ops; +extern const MemoryRegionOps pci_host_data_be_ops; #endif /* PCI_HOST_H */ diff --git a/hw/petalogix_ml605_mmu.c b/hw/petalogix_ml605_mmu.c index e3ca310efd..38db521b37 100644 --- a/hw/petalogix_ml605_mmu.c +++ b/hw/petalogix_ml605_mmu.c @@ -149,7 +149,6 @@ petalogix_ml605_init(ram_addr_t ram_size, target_phys_addr_t ddr_base = MEMORY_BASEADDR; ram_addr_t phys_lmb_bram; ram_addr_t phys_ram; - ram_addr_t phys_flash; qemu_irq irq[32], *cpu_irq; /* init CPUs */ @@ -169,11 +168,11 @@ petalogix_ml605_init(ram_addr_t ram_size, phys_ram = qemu_ram_alloc(NULL, "petalogix_ml605.ram", ram_size); cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM); - phys_flash = qemu_ram_alloc(NULL, "petalogix_ml605.flash", FLASH_SIZE); dinfo = drive_get(IF_PFLASH, 0, 0); /* 5th parameter 2 means bank-width * 10th paremeter 0 means little-endian */ - pflash_cfi01_register(FLASH_BASEADDR, phys_flash, + pflash_cfi01_register(FLASH_BASEADDR, + NULL, "petalogix_ml605.flash", FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, (64 * 1024), FLASH_SIZE >> 16, 2, 0x89, 0x18, 0x0000, 0x0, 0); diff --git a/hw/petalogix_s3adsp1800_mmu.c b/hw/petalogix_s3adsp1800_mmu.c index a43fb4c95c..66fb96d8eb 100644 --- a/hw/petalogix_s3adsp1800_mmu.c +++ b/hw/petalogix_s3adsp1800_mmu.c @@ -127,7 +127,6 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size, target_phys_addr_t ddr_base = 0x90000000; ram_addr_t phys_lmb_bram; ram_addr_t phys_ram; - ram_addr_t phys_flash; qemu_irq irq[32], *cpu_irq; /* init CPUs */ @@ -148,9 +147,9 @@ petalogix_s3adsp1800_init(ram_addr_t ram_size, phys_ram = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.ram", ram_size); cpu_register_physical_memory(ddr_base, ram_size, phys_ram | IO_MEM_RAM); - phys_flash = qemu_ram_alloc(NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(0xa0000000, phys_flash, + pflash_cfi01_register(0xa0000000, + NULL, "petalogix_s3adsp1800.flash", FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, (64 * 1024), FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c index a2d94022b6..69b8e3d539 100644 --- a/hw/pflash_cfi01.c +++ b/hw/pflash_cfi01.c @@ -40,6 +40,7 @@ #include "flash.h" #include "block.h" #include "qemu-timer.h" +#include "exec-memory.h" #define PFLASH_BUG(fmt, ...) \ do { \ @@ -74,8 +75,7 @@ struct pflash_t { target_phys_addr_t counter; unsigned int writeblock_size; QEMUTimer *timer; - ram_addr_t off; - int fl_mem; + MemoryRegion mem; void *storage; }; @@ -89,8 +89,7 @@ static void pflash_timer (void *opaque) if (pfl->bypass) { pfl->wcycle = 2; } else { - cpu_register_physical_memory(pfl->base, pfl->total_len, - pfl->off | IO_MEM_ROMD | pfl->fl_mem); + memory_region_rom_device_set_readable(&pfl->mem, true); pfl->wcycle = 0; } pfl->cmd = 0; @@ -263,7 +262,7 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset, if (!pfl->wcycle) { /* Set the device in I/O access mode */ - cpu_register_physical_memory(pfl->base, pfl->total_len, pfl->fl_mem); + memory_region_rom_device_set_readable(&pfl->mem, false); } switch (pfl->wcycle) { @@ -422,8 +421,7 @@ static void pflash_write(pflash_t *pfl, target_phys_addr_t offset, __func__, offset, pfl->wcycle, pfl->cmd, value); reset_flash: - cpu_register_physical_memory(pfl->base, pfl->total_len, - pfl->off | IO_MEM_ROMD | pfl->fl_mem); + memory_region_rom_device_set_readable(&pfl->mem, true); pfl->bypass = 0; pfl->wcycle = 0; @@ -514,28 +512,20 @@ static void pflash_writel_le(void *opaque, target_phys_addr_t addr, pflash_write(pfl, addr, value, 4, 0); } -static CPUWriteMemoryFunc * const pflash_write_ops_be[] = { - &pflash_writeb_be, - &pflash_writew_be, - &pflash_writel_be, +static const MemoryRegionOps pflash_cfi01_ops_be = { + .old_mmio = { + .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, }, + .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUReadMemoryFunc * const pflash_read_ops_be[] = { - &pflash_readb_be, - &pflash_readw_be, - &pflash_readl_be, -}; - -static CPUWriteMemoryFunc * const pflash_write_ops_le[] = { - &pflash_writeb_le, - &pflash_writew_le, - &pflash_writel_le, -}; - -static CPUReadMemoryFunc * const pflash_read_ops_le[] = { - &pflash_readb_le, - &pflash_readw_le, - &pflash_readl_le, +static const MemoryRegionOps pflash_cfi01_ops_le = { + .old_mmio = { + .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, }, + .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; /* Count trailing zeroes of a 32 bits quantity */ @@ -574,12 +564,13 @@ static int ctz32 (uint32_t n) return ret; } -pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, +pflash_t *pflash_cfi01_register(target_phys_addr_t base, + DeviceState *qdev, const char *name, + target_phys_addr_t size, BlockDriverState *bs, uint32_t sector_len, int nb_blocs, int width, uint16_t id0, uint16_t id1, - uint16_t id2, uint16_t id3, - int be) + uint16_t id2, uint16_t id3, int be) { pflash_t *pfl; target_phys_addr_t total_len; @@ -596,27 +587,19 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, pfl = g_malloc0(sizeof(pflash_t)); - /* FIXME: Allocate ram ourselves. */ - pfl->storage = qemu_get_ram_ptr(off); - if (be) { - pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_be, - pflash_write_ops_be, pfl, - DEVICE_NATIVE_ENDIAN); - } else { - pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_le, - pflash_write_ops_le, pfl, - DEVICE_NATIVE_ENDIAN); - } - pfl->off = off; - cpu_register_physical_memory(base, total_len, - off | pfl->fl_mem | IO_MEM_ROMD); + memory_region_init_rom_device( + &pfl->mem, be ? &pflash_cfi01_ops_be : &pflash_cfi01_ops_le, pfl, + qdev, name, size); + pfl->storage = memory_region_get_ram_ptr(&pfl->mem); + memory_region_add_subregion(get_system_memory(), base, &pfl->mem); pfl->bs = bs; if (pfl->bs) { /* read the initial flash content */ ret = bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9); if (ret < 0) { - cpu_unregister_io_memory(pfl->fl_mem); + memory_region_del_subregion(get_system_memory(), &pfl->mem); + memory_region_destroy(&pfl->mem); g_free(pfl); return NULL; } @@ -725,3 +708,8 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, return pfl; } + +MemoryRegion *pflash_cfi01_get_memory(pflash_t *fl) +{ + return &fl->mem; +} diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c index 919cfc466f..e5a63da595 100644 --- a/hw/pflash_cfi02.c +++ b/hw/pflash_cfi02.c @@ -39,6 +39,7 @@ #include "flash.h" #include "qemu-timer.h" #include "block.h" +#include "exec-memory.h" //#define PFLASH_DEBUG #ifdef PFLASH_DEBUG @@ -69,25 +70,38 @@ struct pflash_t { uint8_t cfi_len; uint8_t cfi_table[0x52]; QEMUTimer *timer; - ram_addr_t off; - int fl_mem; + /* The device replicates the flash memory across its memory space. Emulate + * that by having a container (.mem) filled with an array of aliases + * (.mem_mappings) pointing to the flash memory (.orig_mem). + */ + MemoryRegion mem; + MemoryRegion *mem_mappings; /* array; one per mapping */ + MemoryRegion orig_mem; int rom_mode; int read_counter; /* used for lazy switch-back to rom mode */ void *storage; }; -static void pflash_register_memory(pflash_t *pfl, int rom_mode) +/* + * Set up replicated mappings of the same region. + */ +static void pflash_setup_mappings(pflash_t *pfl) { - unsigned long phys_offset = pfl->fl_mem; - int i; - - if (rom_mode) - phys_offset |= pfl->off | IO_MEM_ROMD; - pfl->rom_mode = rom_mode; + unsigned i; + target_phys_addr_t size = memory_region_size(&pfl->orig_mem); + + memory_region_init(&pfl->mem, "pflash", pfl->mappings * size); + pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); + for (i = 0; i < pfl->mappings; ++i) { + memory_region_init_alias(&pfl->mem_mappings[i], "pflash-alias", + &pfl->orig_mem, 0, size); + memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]); + } +} - for (i = 0; i < pfl->mappings; i++) - cpu_register_physical_memory(pfl->base + i * pfl->chip_len, - pfl->chip_len, phys_offset); +static void pflash_register_memory(pflash_t *pfl, int rom_mode) +{ + memory_region_rom_device_set_readable(&pfl->orig_mem, rom_mode); } static void pflash_timer (void *opaque) @@ -538,28 +552,20 @@ static void pflash_writel_le(void *opaque, target_phys_addr_t addr, pflash_write(pfl, addr, value, 4, 0); } -static CPUWriteMemoryFunc * const pflash_write_ops_be[] = { - &pflash_writeb_be, - &pflash_writew_be, - &pflash_writel_be, -}; - -static CPUReadMemoryFunc * const pflash_read_ops_be[] = { - &pflash_readb_be, - &pflash_readw_be, - &pflash_readl_be, +static const MemoryRegionOps pflash_cfi02_ops_be = { + .old_mmio = { + .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, }, + .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUWriteMemoryFunc * const pflash_write_ops_le[] = { - &pflash_writeb_le, - &pflash_writew_le, - &pflash_writel_le, -}; - -static CPUReadMemoryFunc * const pflash_read_ops_le[] = { - &pflash_readb_le, - &pflash_readw_le, - &pflash_readl_le, +static const MemoryRegionOps pflash_cfi02_ops_le = { + .old_mmio = { + .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, }, + .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, }, + }, + .endianness = DEVICE_NATIVE_ENDIAN, }; /* Count trailing zeroes of a 32 bits quantity */ @@ -598,7 +604,9 @@ static int ctz32 (uint32_t n) return ret; } -pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, +pflash_t *pflash_cfi02_register(target_phys_addr_t base, + DeviceState *qdev, const char *name, + target_phys_addr_t size, BlockDriverState *bs, uint32_t sector_len, int nb_blocs, int nb_mappings, int width, uint16_t id0, uint16_t id1, @@ -618,33 +626,26 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, return NULL; #endif pfl = g_malloc0(sizeof(pflash_t)); - /* FIXME: Allocate ram ourselves. */ - pfl->storage = qemu_get_ram_ptr(off); - if (be) { - pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_be, - pflash_write_ops_be, - pfl, DEVICE_NATIVE_ENDIAN); - } else { - pfl->fl_mem = cpu_register_io_memory(pflash_read_ops_le, - pflash_write_ops_le, - pfl, DEVICE_NATIVE_ENDIAN); - } - pfl->off = off; + memory_region_init_rom_device( + &pfl->orig_mem, be ? &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, pfl, + qdev, name, size); + pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem); pfl->base = base; pfl->chip_len = chip_len; pfl->mappings = nb_mappings; - pflash_register_memory(pfl, 1); pfl->bs = bs; if (pfl->bs) { /* read the initial flash content */ ret = bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9); if (ret < 0) { - cpu_unregister_io_memory(pfl->fl_mem); g_free(pfl); return NULL; } bdrv_attach_dev_nofail(pfl->bs, pfl); } + pflash_setup_mappings(pfl); + pfl->rom_mode = 1; + memory_region_add_subregion(get_system_memory(), pfl->base, &pfl->mem); #if 0 /* XXX: there should be a bit to set up read-only, * the same way the hardware does (with WP pin). */ diff --git a/hw/piix_pci.c b/hw/piix_pci.c index c563c6e1a3..8f6ea42e2c 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -142,6 +142,7 @@ static void i440fx_update_memory_mappings(PCII440FXState *d) int i, r; uint32_t smram; + memory_region_transaction_begin(); update_pam(d, 0xf0000, 0x100000, (d->dev.config[I440FX_PAM] >> 4) & 3, &d->pam_regions[0]); for(i = 0; i < 12; i++) { @@ -162,6 +163,7 @@ static void i440fx_update_memory_mappings(PCII440FXState *d) d->smram_enabled = false; } } + memory_region_transaction_commit(); } static void i440fx_set_smm(int val, void *arg) @@ -235,9 +237,16 @@ static int i440fx_pcihost_initfn(SysBusDevice *dev) { I440FXState *s = FROM_SYSBUS(I440FXState, dev); - pci_host_conf_register_ioport(0xcf8, s); + memory_region_init_io(&s->conf_mem, &pci_host_conf_le_ops, s, + "pci-conf-idx", 4); + sysbus_add_io(dev, 0xcf8, &s->conf_mem); + sysbus_init_ioports(&s->busdev, 0xcf8, 4); + + memory_region_init_io(&s->data_mem, &pci_host_data_le_ops, s, + "pci-conf-data", 4); + sysbus_add_io(dev, 0xcfc, &s->data_mem); + sysbus_init_ioports(&s->busdev, 0xcfc, 4); - pci_host_data_register_ioport(0xcfc, s); return 0; } diff --git a/hw/ppc405_boards.c b/hw/ppc405_boards.c index dec165e40f..e6c8ac67d9 100644 --- a/hw/ppc405_boards.c +++ b/hw/ppc405_boards.c @@ -32,6 +32,7 @@ #include "qemu-log.h" #include "loader.h" #include "blockdev.h" +#include "exec-memory.h" #define BIOS_FILENAME "ppc405_rom.bin" #define BIOS_SIZE (2048 * 1024) @@ -181,7 +182,8 @@ static void ref405ep_init (ram_addr_t ram_size, ppc4xx_bd_info_t bd; CPUPPCState *env; qemu_irq *pic; - ram_addr_t sram_offset, bios_offset, bdloc; + MemoryRegion *bios; + ram_addr_t sram_offset, bdloc; MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories)); target_phys_addr_t ram_bases[2], ram_sizes[2]; target_ulong sram_size; @@ -224,15 +226,15 @@ static void ref405ep_init (ram_addr_t ram_size, dinfo = drive_get(IF_PFLASH, 0, fl_idx); if (dinfo) { bios_size = bdrv_getlength(dinfo->bdrv); - bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", bios_size); fl_sectors = (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr %lx '%s' %d\n", - fl_idx, bios_size, bios_offset, -bios_size, + " at addr %lx '%s' %d\n", + fl_idx, bios_size, -bios_size, bdrv_get_device_name(dinfo->bdrv), fl_sectors); #endif - pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, + pflash_cfi02_register((uint32_t)(-bios_size), + NULL, "ef405ep.bios", bios_size, dinfo->bdrv, 65536, fl_sectors, 1, 2, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, 1); @@ -243,12 +245,13 @@ static void ref405ep_init (ram_addr_t ram_size, #ifdef DEBUG_BOARD_INIT printf("Load BIOS from file\n"); #endif - bios_offset = qemu_ram_alloc(NULL, "ef405ep.bios", BIOS_SIZE); + bios = g_new(MemoryRegion, 1); + memory_region_init_ram(bios, NULL, "ef405ep.bios", BIOS_SIZE); if (bios_name == NULL) bios_name = BIOS_FILENAME; filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { - bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); + bios_size = load_image(filename, memory_region_get_ram_ptr(bios)); g_free(filename); } else { bios_size = -1; @@ -259,8 +262,9 @@ static void ref405ep_init (ram_addr_t ram_size, exit(1); } bios_size = (bios_size + 0xfff) & ~0xfff; - cpu_register_physical_memory((uint32_t)(-bios_size), - bios_size, bios_offset | IO_MEM_ROM); + memory_region_set_readonly(bios, true); + memory_region_add_subregion(get_system_memory(), + (uint32_t)(-bios_size), bios); } /* Register FPGA */ #ifdef DEBUG_BOARD_INIT @@ -507,7 +511,7 @@ static void taihu_405ep_init(ram_addr_t ram_size, { char *filename; qemu_irq *pic; - ram_addr_t bios_offset; + MemoryRegion *bios; MemoryRegion *ram_memories = g_malloc(2 * sizeof(*ram_memories)); target_phys_addr_t ram_bases[2], ram_sizes[2]; long bios_size; @@ -544,14 +548,14 @@ static void taihu_405ep_init(ram_addr_t ram_size, /* XXX: should check that size is 2MB */ // bios_size = 2 * 1024 * 1024; fl_sectors = (bios_size + 65535) >> 16; - bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", bios_size); #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr %lx '%s' %d\n", - fl_idx, bios_size, bios_offset, -bios_size, + " at addr %lx '%s' %d\n", + fl_idx, bios_size, -bios_size, bdrv_get_device_name(dinfo->bdrv), fl_sectors); #endif - pflash_cfi02_register((uint32_t)(-bios_size), bios_offset, + pflash_cfi02_register((uint32_t)(-bios_size), + NULL, "taihu_405ep.bios", bios_size, dinfo->bdrv, 65536, fl_sectors, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, 1); @@ -564,10 +568,11 @@ static void taihu_405ep_init(ram_addr_t ram_size, #endif if (bios_name == NULL) bios_name = BIOS_FILENAME; - bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.bios", BIOS_SIZE); + bios = g_new(MemoryRegion, 1); + memory_region_init_ram(bios, NULL, "taihu_405ep.bios", BIOS_SIZE); filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); if (filename) { - bios_size = load_image(filename, qemu_get_ram_ptr(bios_offset)); + bios_size = load_image(filename, memory_region_get_ram_ptr(bios)); g_free(filename); } else { bios_size = -1; @@ -578,8 +583,9 @@ static void taihu_405ep_init(ram_addr_t ram_size, exit(1); } bios_size = (bios_size + 0xfff) & ~0xfff; - cpu_register_physical_memory((uint32_t)(-bios_size), - bios_size, bios_offset | IO_MEM_ROM); + memory_region_set_readonly(bios, true); + memory_region_add_subregion(get_system_memory(), (uint32_t)(-bios_size), + bios); } /* Register Linux flash */ dinfo = drive_get(IF_PFLASH, 0, fl_idx); @@ -590,12 +596,11 @@ static void taihu_405ep_init(ram_addr_t ram_size, fl_sectors = (bios_size + 65535) >> 16; #ifdef DEBUG_BOARD_INIT printf("Register parallel flash %d size %lx" - " at offset %08lx addr " TARGET_FMT_lx " '%s'\n", - fl_idx, bios_size, bios_offset, (target_ulong)0xfc000000, + " at addr " TARGET_FMT_lx " '%s'\n", + fl_idx, bios_size, (target_ulong)0xfc000000, bdrv_get_device_name(dinfo->bdrv)); #endif - bios_offset = qemu_ram_alloc(NULL, "taihu_405ep.flash", bios_size); - pflash_cfi02_register(0xfc000000, bios_offset, + pflash_cfi02_register(0xfc000000, NULL, "taihu_405ep.flash", bios_size, dinfo->bdrv, 65536, fl_sectors, 1, 4, 0x0001, 0x22DA, 0x0000, 0x0000, 0x555, 0x2AA, 1); diff --git a/hw/ppc4xx_pci.c b/hw/ppc4xx_pci.c index 52e2663a01..339b38ec7a 100644 --- a/hw/ppc4xx_pci.c +++ b/hw/ppc4xx_pci.c @@ -368,10 +368,12 @@ PCIBus *ppc4xx_pci_init(CPUState *env, qemu_irq pci_irqs[4], cpu_register_physical_memory(config_space + PCIC0_CFGADDR, 4, index); /* CFGDATA */ - index = pci_host_data_register_mmio(&controller->pci_state, 1); - if (index < 0) - goto free; - cpu_register_physical_memory(config_space + PCIC0_CFGDATA, 4, index); + memory_region_init_io(&controller->pci_state.data_mem, + &pci_host_data_be_ops, + &controller->pci_state, "pci-conf-data", 4); + memory_region_add_subregion(get_system_memory(), + config_space + PCIC0_CFGDATA, + &controller->pci_state.data_mem); /* Internal registers */ index = cpu_register_io_memory(pci_reg_read, pci_reg_write, controller, diff --git a/hw/ppce500_pci.c b/hw/ppce500_pci.c index 4390aeb559..2db365d0b6 100644 --- a/hw/ppce500_pci.c +++ b/hw/ppce500_pci.c @@ -79,8 +79,6 @@ struct PPCE500PCIState { uint32_t gasket_time; qemu_irq irq[4]; /* mmio maps */ - int cfgaddr; - int cfgdata; int reg; }; @@ -268,18 +266,18 @@ static void e500_pci_map(SysBusDevice *dev, target_phys_addr_t base) PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); PPCE500PCIState *s = DO_UPCAST(PPCE500PCIState, pci_state, h); - cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, s->cfgaddr); - cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, s->cfgdata); + sysbus_add_memory(dev, base + PCIE500_CFGADDR, &h->conf_mem); + sysbus_add_memory(dev, base + PCIE500_CFGDATA, &h->data_mem); cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE, s->reg); } static void e500_pci_unmap(SysBusDevice *dev, target_phys_addr_t base) { - cpu_register_physical_memory(base + PCIE500_CFGADDR, 4, - IO_MEM_UNASSIGNED); - cpu_register_physical_memory(base + PCIE500_CFGDATA, 4, - IO_MEM_UNASSIGNED); + PCIHostState *h = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); + + sysbus_del_memory(dev, &h->conf_mem); + sysbus_del_memory(dev, &h->data_mem); cpu_register_physical_memory(base + PCIE500_REG_BASE, PCIE500_REG_SIZE, IO_MEM_UNASSIGNED); } @@ -309,9 +307,10 @@ static int e500_pcihost_initfn(SysBusDevice *dev) pci_create_simple(b, 0, "e500-host-bridge"); - s->cfgaddr = pci_host_conf_register_mmio(&s->pci_state, DEVICE_BIG_ENDIAN); - s->cfgdata = pci_host_data_register_mmio(&s->pci_state, - DEVICE_LITTLE_ENDIAN); + memory_region_init_io(&h->conf_mem, &pci_host_conf_be_ops, h, + "pci-conf-idx", 4); + memory_region_init_io(&h->data_mem, &pci_host_data_le_ops, h, + "pci-conf-data", 4); s->reg = cpu_register_io_memory(e500_pci_reg_read, e500_pci_reg_write, s, DEVICE_BIG_ENDIAN); sysbus_init_mmio_cb2(dev, e500_pci_map, e500_pci_unmap); diff --git a/hw/prep_pci.c b/hw/prep_pci.c index c36232a808..55e4e25099 100644 --- a/hw/prep_pci.c +++ b/hw/prep_pci.c @@ -125,9 +125,15 @@ PCIBus *pci_prep_init(qemu_irq *pic, address_space_io, 0, 4); - pci_host_conf_register_ioport(0xcf8, s); - - pci_host_data_register_ioport(0xcfc, s); + memory_region_init_io(&s->conf_mem, &pci_host_conf_be_ops, s, + "pci-conf-idx", 1); + memory_region_add_subregion(address_space_io, 0xcf8, &s->conf_mem); + sysbus_init_ioports(&s->busdev, 0xcf8, 1); + + memory_region_init_io(&s->conf_mem, &pci_host_data_be_ops, s, + "pci-conf-data", 1); + memory_region_add_subregion(address_space_io, 0xcfc, &s->data_mem); + sysbus_init_ioports(&s->busdev, 0xcfc, 1); PPC_io_memory = cpu_register_io_memory(PPC_PCIIO_read, PPC_PCIIO_write, s, @@ -267,7 +267,7 @@ static void r2d_init(ram_addr_t ram_size, /* onboard flash memory */ dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi02_register(0x0, qemu_ram_alloc(NULL, "r2d.flash", FLASH_SIZE), + pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, (16 * 1024), FLASH_SIZE >> 16, 1, 4, 0x0000, 0x0000, 0x0000, 0x0000, diff --git a/hw/sh_intc.c b/hw/sh_intc.c index ecb46e5856..e07424f2a1 100644 --- a/hw/sh_intc.c +++ b/hw/sh_intc.c @@ -382,13 +382,14 @@ void sh_intc_register_sources(struct intc_desc *desc, sh_intc_register_source(desc, vect->enum_id, groups, nr_groups); s = sh_intc_source(desc, vect->enum_id); - if (s) - s->vect = vect->vect; + if (s) { + s->vect = vect->vect; #ifdef DEBUG_INTC_SOURCES - printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n", - vect->enum_id, s->vect, s->enable_count, s->enable_max); + printf("sh_intc: registered source %d -> 0x%04x (%d/%d)\n", + vect->enum_id, s->vect, s->enable_count, s->enable_max); #endif + } } if (groups) { diff --git a/hw/stellaris.c b/hw/stellaris.c index 9b0db7f511..2bf1c235dc 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -15,6 +15,7 @@ #include "i2c.h" #include "net.h" #include "boards.h" +#include "exec-memory.h" #define GPIO_A 0 #define GPIO_B 1 @@ -1260,6 +1261,7 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, 0x40024000, 0x40025000, 0x40026000}; static const int gpio_irq[7] = {0, 1, 2, 3, 4, 30, 31}; + MemoryRegion *address_space_mem = get_system_memory(); qemu_irq *pic; DeviceState *gpio_dev[7]; qemu_irq gpio_in[7][8]; @@ -1274,7 +1276,8 @@ static void stellaris_init(const char *kernel_filename, const char *cpu_model, flash_size = ((board->dc0 & 0xffff) + 1) << 1; sram_size = (board->dc0 >> 18) + 1; - pic = armv7m_init(flash_size, sram_size, kernel_filename, cpu_model); + pic = armv7m_init(address_space_mem, + flash_size, sram_size, kernel_filename, cpu_model); if (board->dc1 & (1 << 16)) { dev = sysbus_create_varargs("stellaris-adc", 0x40038000, diff --git a/hw/stellaris_enet.c b/hw/stellaris_enet.c index f9bd3da209..d5613ffffd 100644 --- a/hw/stellaris_enet.c +++ b/hw/stellaris_enet.c @@ -69,7 +69,7 @@ typedef struct { NICState *nic; NICConf conf; qemu_irq irq; - int mmio_index; + MemoryRegion mmio; } stellaris_enet_state; static void stellaris_enet_update(stellaris_enet_state *s) @@ -130,7 +130,8 @@ static int stellaris_enet_can_receive(VLANClientState *nc) return (s->np < 31); } -static uint32_t stellaris_enet_read(void *opaque, target_phys_addr_t offset) +static uint64_t stellaris_enet_read(void *opaque, target_phys_addr_t offset, + unsigned size) { stellaris_enet_state *s = (stellaris_enet_state *)opaque; uint32_t val; @@ -198,7 +199,7 @@ static uint32_t stellaris_enet_read(void *opaque, target_phys_addr_t offset) } static void stellaris_enet_write(void *opaque, target_phys_addr_t offset, - uint32_t value) + uint64_t value, unsigned size) { stellaris_enet_state *s = (stellaris_enet_state *)opaque; @@ -303,17 +304,12 @@ static void stellaris_enet_write(void *opaque, target_phys_addr_t offset, } } -static CPUReadMemoryFunc * const stellaris_enet_readfn[] = { - stellaris_enet_read, - stellaris_enet_read, - stellaris_enet_read +static const MemoryRegionOps stellaris_enet_ops = { + .read = stellaris_enet_read, + .write = stellaris_enet_write, + .endianness = DEVICE_NATIVE_ENDIAN, }; -static CPUWriteMemoryFunc * const stellaris_enet_writefn[] = { - stellaris_enet_write, - stellaris_enet_write, - stellaris_enet_write -}; static void stellaris_enet_reset(stellaris_enet_state *s) { s->mdv = 0x80; @@ -391,7 +387,7 @@ static void stellaris_enet_cleanup(VLANClientState *nc) unregister_savevm(&s->busdev.qdev, "stellaris_enet", s); - cpu_unregister_io_memory(s->mmio_index); + memory_region_destroy(&s->mmio); g_free(s); } @@ -408,10 +404,9 @@ static int stellaris_enet_init(SysBusDevice *dev) { stellaris_enet_state *s = FROM_SYSBUS(stellaris_enet_state, dev); - s->mmio_index = cpu_register_io_memory(stellaris_enet_readfn, - stellaris_enet_writefn, s, - DEVICE_NATIVE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, s->mmio_index); + memory_region_init_io(&s->mmio, &stellaris_enet_ops, s, "stellaris_enet", + 0x1000); + sysbus_init_mmio_region(dev, &s->mmio); sysbus_init_irq(dev, &s->irq); qemu_macaddr_default_if_unset(&s->conf.macaddr); diff --git a/hw/sysbus.c b/hw/sysbus.c index c365d39d24..4fab5a41b2 100644 --- a/hw/sysbus.c +++ b/hw/sysbus.c @@ -261,3 +261,32 @@ static char *sysbus_get_fw_dev_path(DeviceState *dev) return strdup(path); } + +void sysbus_add_memory(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem) +{ + memory_region_add_subregion(get_system_memory(), addr, mem); +} + +void sysbus_add_memory_overlap(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem, unsigned priority) +{ + memory_region_add_subregion_overlap(get_system_memory(), addr, mem, + priority); +} + +void sysbus_del_memory(SysBusDevice *dev, MemoryRegion *mem) +{ + memory_region_del_subregion(get_system_memory(), mem); +} + +void sysbus_add_io(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem) +{ + memory_region_add_subregion(get_system_io(), addr, mem); +} + +void sysbus_del_io(SysBusDevice *dev, MemoryRegion *mem) +{ + memory_region_del_subregion(get_system_io(), mem); +} diff --git a/hw/sysbus.h b/hw/sysbus.h index aa3d383277..6c36537c24 100644 --- a/hw/sysbus.h +++ b/hw/sysbus.h @@ -58,6 +58,14 @@ void sysbus_init_ioports(SysBusDevice *dev, pio_addr_t ioport, pio_addr_t size); void sysbus_connect_irq(SysBusDevice *dev, int n, qemu_irq irq); void sysbus_mmio_map(SysBusDevice *dev, int n, target_phys_addr_t addr); +void sysbus_add_memory(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem); +void sysbus_add_memory_overlap(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem, unsigned priority); +void sysbus_del_memory(SysBusDevice *dev, MemoryRegion *mem); +void sysbus_add_io(SysBusDevice *dev, target_phys_addr_t addr, + MemoryRegion *mem); +void sysbus_del_io(SysBusDevice *dev, MemoryRegion *mem); /* Legacy helper function for creating devices. */ DeviceState *sysbus_create_varargs(const char *name, diff --git a/hw/tusb6010.c b/hw/tusb6010.c index de6ffc6133..ce7c81f8f2 100644 --- a/hw/tusb6010.c +++ b/hw/tusb6010.c @@ -771,13 +771,12 @@ static void tusb6010_reset(DeviceState *dev) for (i = 0; i < 15; i++) { s->rx_config[i] = s->tx_config[i] = 0; } + musb_reset(s->musb); } static int tusb6010_init(SysBusDevice *dev) { TUSBState *s = FROM_SYSBUS(TUSBState, dev); - qemu_irq *musb_irqs; - int i; s->otg_timer = qemu_new_timer_ns(vm_clock, tusb_otg_tick, s); s->pwr_timer = qemu_new_timer_ns(vm_clock, tusb_power_tick, s); memory_region_init_io(&s->iomem[1], &tusb_async_ops, s, "tusb-async", @@ -785,12 +784,8 @@ static int tusb6010_init(SysBusDevice *dev) sysbus_init_mmio_region(dev, &s->iomem[0]); sysbus_init_mmio_region(dev, &s->iomem[1]); sysbus_init_irq(dev, &s->irq); - qdev_init_gpio_in(&dev->qdev, tusb6010_irq, __musb_irq_max + 1); - musb_irqs = g_new0(qemu_irq, __musb_irq_max); - for (i = 0; i < __musb_irq_max; i++) { - musb_irqs[i] = qdev_get_gpio_in(&dev->qdev, i + 1); - } - s->musb = musb_init(musb_irqs); + qdev_init_gpio_in(&dev->qdev, tusb6010_irq, musb_irq_max + 1); + s->musb = musb_init(&dev->qdev, 1); return 0; } diff --git a/hw/unin_pci.c b/hw/unin_pci.c index f896f8c76b..600cd1e5bd 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -41,7 +41,6 @@ static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; typedef struct UNINState { SysBusDevice busdev; PCIHostState host_state; - ReadWriteHandler data_handler; } UNINState; static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) @@ -100,67 +99,70 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr) return retval; } -static void unin_data_write(ReadWriteHandler *handler, - pcibus_t addr, uint32_t val, int len) +static void unin_data_write(void *opaque, target_phys_addr_t addr, + uint64_t val, unsigned len) { - UNINState *s = container_of(handler, UNINState, data_handler); - UNIN_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); + UNINState *s = opaque; + UNIN_DPRINTF("write addr %" TARGET_FMT_plx " len %d val %"PRIx64"\n", + addr, len, val); pci_data_write(s->host_state.bus, unin_get_config_reg(s->host_state.config_reg, addr), val, len); } -static uint32_t unin_data_read(ReadWriteHandler *handler, - pcibus_t addr, int len) +static uint64_t unin_data_read(void *opaque, target_phys_addr_t addr, + unsigned len) { - UNINState *s = container_of(handler, UNINState, data_handler); + UNINState *s = opaque; uint32_t val; val = pci_data_read(s->host_state.bus, unin_get_config_reg(s->host_state.config_reg, addr), len); - UNIN_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); + UNIN_DPRINTF("read addr %" TARGET_FMT_plx " len %d val %x\n", + addr, len, val); return val; } +static const MemoryRegionOps unin_data_ops = { + .read = unin_data_read, + .write = unin_data_write, + .endianness = DEVICE_LITTLE_ENDIAN, +}; + static int pci_unin_main_init_device(SysBusDevice *dev) { UNINState *s; - int pci_mem_config, pci_mem_data; /* Use values found on a real PowerMac */ /* Uninorth main bus */ s = FROM_SYSBUS(UNINState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - s->data_handler.read = unin_data_read; - s->data_handler.write = unin_data_write; - pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &unin_data_ops, s, + "pci-conf-data", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); qemu_register_reset(pci_unin_reset, &s->host_state); return 0; } + static int pci_u3_agp_init_device(SysBusDevice *dev) { UNINState *s; - int pci_mem_config, pci_mem_data; /* Uninorth U3 AGP bus */ s = FROM_SYSBUS(UNINState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - s->data_handler.read = unin_data_read; - s->data_handler.write = unin_data_write; - pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &unin_data_ops, s, + "pci-conf-data", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); qemu_register_reset(pci_unin_reset, &s->host_state); @@ -170,34 +172,32 @@ static int pci_u3_agp_init_device(SysBusDevice *dev) static int pci_unin_agp_init_device(SysBusDevice *dev) { UNINState *s; - int pci_mem_config, pci_mem_data; /* Uninorth AGP bus */ s = FROM_SYSBUS(UNINState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - pci_mem_data = pci_host_data_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops, + &s->host_state, "pci-conf-data", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); return 0; } static int pci_unin_internal_init_device(SysBusDevice *dev) { UNINState *s; - int pci_mem_config, pci_mem_data; /* Uninorth internal bus */ s = FROM_SYSBUS(UNINState, dev); - pci_mem_config = pci_host_conf_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - pci_mem_data = pci_host_data_register_mmio(&s->host_state, - DEVICE_LITTLE_ENDIAN); - sysbus_init_mmio(dev, 0x1000, pci_mem_config); - sysbus_init_mmio(dev, 0x1000, pci_mem_data); + memory_region_init_io(&s->host_state.conf_mem, &pci_host_conf_le_ops, + &s->host_state, "pci-conf-idx", 0x1000); + memory_region_init_io(&s->host_state.data_mem, &pci_host_data_le_ops, + &s->host_state, "pci-conf-data", 0x1000); + sysbus_init_mmio_region(dev, &s->host_state.conf_mem); + sysbus_init_mmio_region(dev, &s->host_state.data_mem); return 0; } diff --git a/hw/usb-bus.c b/hw/usb-bus.c index c0bbc7c6b0..93f640d370 100644 --- a/hw/usb-bus.c +++ b/hw/usb-bus.c @@ -3,6 +3,7 @@ #include "qdev.h" #include "sysemu.h" #include "monitor.h" +#include "trace.h" static void usb_bus_dev_print(Monitor *mon, DeviceState *qdev, int indent); @@ -73,9 +74,13 @@ static int usb_qdev_init(DeviceState *qdev, DeviceInfo *base) dev->info = info; dev->auto_attach = 1; QLIST_INIT(&dev->strings); - rc = dev->info->init(dev); - if (rc == 0 && dev->auto_attach) + rc = usb_claim_port(dev); + if (rc == 0) { + rc = dev->info->init(dev); + } + if (rc == 0 && dev->auto_attach) { rc = usb_device_attach(dev); + } return rc; } @@ -89,6 +94,9 @@ static int usb_qdev_exit(DeviceState *qdev) if (dev->info->handle_destroy) { dev->info->handle_destroy(dev); } + if (dev->port) { + usb_release_port(dev); + } return 0; } @@ -205,21 +213,13 @@ void usb_unregister_port(USBBus *bus, USBPort *port) bus->nfree--; } -static int do_attach(USBDevice *dev) +int usb_claim_port(USBDevice *dev) { USBBus *bus = usb_bus_from_device(dev); USBPort *port; - if (dev->attached) { - error_report("Error: tried to attach usb device %s twice\n", - dev->product_desc); - return -1; - } - if (bus->nfree == 0) { - error_report("Error: tried to attach usb device %s to a bus with no free ports\n", - dev->product_desc); - return -1; - } + assert(dev->port == NULL); + if (dev->port_path) { QTAILQ_FOREACH(port, &bus->free, next) { if (strcmp(port->path, dev->port_path) == 0) { @@ -227,68 +227,86 @@ static int do_attach(USBDevice *dev) } } if (port == NULL) { - error_report("Error: usb port %s (bus %s) not found\n", - dev->port_path, bus->qbus.name); + error_report("Error: usb port %s (bus %s) not found (in use?)\n", + dev->port_path, bus->qbus.name); return -1; } } else { + if (bus->nfree == 1 && strcmp(dev->qdev.info->name, "usb-hub") != 0) { + /* Create a new hub and chain it on */ + usb_create_simple(bus, "usb-hub"); + } + if (bus->nfree == 0) { + error_report("Error: tried to attach usb device %s to a bus " + "with no free ports\n", dev->product_desc); + return -1; + } port = QTAILQ_FIRST(&bus->free); } - if (!(port->speedmask & dev->speedmask)) { - error_report("Warning: speed mismatch trying to attach usb device %s to bus %s\n", - dev->product_desc, bus->qbus.name); - return -1; - } + trace_usb_port_claim(bus->busnr, port->path); - dev->attached++; QTAILQ_REMOVE(&bus->free, port, next); bus->nfree--; - usb_attach(port, dev); + dev->port = port; + port->dev = dev; QTAILQ_INSERT_TAIL(&bus->used, port, next); bus->nused++; - return 0; } -int usb_device_attach(USBDevice *dev) +void usb_release_port(USBDevice *dev) { USBBus *bus = usb_bus_from_device(dev); + USBPort *port = dev->port; - if (bus->nfree == 1 && dev->port_path == NULL) { - /* Create a new hub and chain it on - (unless a physical port location is specified). */ - usb_create_simple(bus, "usb-hub"); - } - return do_attach(dev); + assert(port != NULL); + trace_usb_port_release(bus->busnr, port->path); + + QTAILQ_REMOVE(&bus->used, port, next); + bus->nused--; + + dev->port = NULL; + port->dev = NULL; + + QTAILQ_INSERT_TAIL(&bus->free, port, next); + bus->nfree++; } -int usb_device_detach(USBDevice *dev) +int usb_device_attach(USBDevice *dev) { USBBus *bus = usb_bus_from_device(dev); - USBPort *port; + USBPort *port = dev->port; - if (!dev->attached) { - error_report("Error: tried to detach unattached usb device %s\n", - dev->product_desc); + assert(port != NULL); + assert(!dev->attached); + trace_usb_port_attach(bus->busnr, port->path); + + if (!(port->speedmask & dev->speedmask)) { + error_report("Warning: speed mismatch trying to attach " + "usb device %s to bus %s\n", + dev->product_desc, bus->qbus.name); return -1; } - dev->attached--; - QTAILQ_FOREACH(port, &bus->used, next) { - if (port->dev == dev) - break; - } - assert(port != NULL); + dev->attached++; + usb_attach(port); - QTAILQ_REMOVE(&bus->used, port, next); - bus->nused--; + return 0; +} + +int usb_device_detach(USBDevice *dev) +{ + USBBus *bus = usb_bus_from_device(dev); + USBPort *port = dev->port; - usb_attach(port, NULL); + assert(port != NULL); + assert(dev->attached); + trace_usb_port_detach(bus->busnr, port->path); - QTAILQ_INSERT_TAIL(&bus->free, port, next); - bus->nfree++; + usb_detach(port); + dev->attached--; return 0; } diff --git a/hw/usb-ccid.c b/hw/usb-ccid.c index c2f9241014..cd349f3f17 100644 --- a/hw/usb-ccid.c +++ b/hw/usb-ccid.c @@ -37,6 +37,7 @@ #include "qemu-common.h" #include "qemu-error.h" #include "usb.h" +#include "usb-desc.h" #include "monitor.h" #include "hw/ccid.h" @@ -306,56 +307,7 @@ typedef struct USBCCIDState { * 0dc3:1004 Athena Smartcard Solutions, Inc. */ -static const uint8_t qemu_ccid_dev_descriptor[] = { - 0x12, /* u8 bLength; */ - USB_DT_DEVICE, /* u8 bDescriptorType; Device */ - 0x10, 0x01, /* u16 bcdUSB; v1.1 */ - - 0x00, /* u8 bDeviceClass; */ - 0x00, /* u8 bDeviceSubClass; */ - 0x00, /* u8 bDeviceProtocol; [ low/full speeds only ] */ - 0x40, /* u8 bMaxPacketSize0; 8 Bytes (valid: 8,16,32,64) */ - - /* Vendor and product id are arbitrary. */ - /* u16 idVendor */ - CCID_VENDOR_ID & 0xff, CCID_VENDOR_ID >> 8, - /* u16 idProduct */ - CCID_PRODUCT_ID & 0xff, CCID_PRODUCT_ID >> 8, - /* u16 bcdDevice */ - CCID_DEVICE_VERSION & 0xff, CCID_DEVICE_VERSION >> 8, - 0x01, /* u8 iManufacturer; */ - 0x02, /* u8 iProduct; */ - 0x03, /* u8 iSerialNumber; */ - 0x01, /* u8 bNumConfigurations; */ -}; - -static const uint8_t qemu_ccid_config_descriptor[] = { - - /* one configuration */ - 0x09, /* u8 bLength; */ - USB_DT_CONFIG, /* u8 bDescriptorType; Configuration */ - 0x5d, 0x00, /* u16 wTotalLength; 9+9+54+7+7+7 */ - 0x01, /* u8 bNumInterfaces; (1) */ - 0x01, /* u8 bConfigurationValue; */ - 0x00, /* u8 iConfiguration; */ - 0xe0, /* u8 bmAttributes; - Bit 7: must be set, - 6: Self-powered, - 5: Remote wakeup, - 4..0: resvd */ - 100/2, /* u8 MaxPower; 50 == 100mA */ - - /* one interface */ - 0x09, /* u8 if_bLength; */ - USB_DT_INTERFACE, /* u8 if_bDescriptorType; Interface */ - 0x00, /* u8 if_bInterfaceNumber; */ - 0x00, /* u8 if_bAlternateSetting; */ - 0x03, /* u8 if_bNumEndpoints; */ - 0x0b, /* u8 if_bInterfaceClass; Smart Card Device Class */ - 0x00, /* u8 if_bInterfaceSubClass; Subclass code */ - 0x00, /* u8 if_bInterfaceProtocol; Protocol code */ - 0x04, /* u8 if_iInterface; Index of string descriptor */ - +static const uint8_t qemu_ccid_descriptor[] = { /* Smart Card Device Class Descriptor */ 0x36, /* u8 bLength; */ 0x21, /* u8 bDescriptorType; Functional */ @@ -439,38 +391,81 @@ static const uint8_t qemu_ccid_config_descriptor[] = { * 02h PIN Modification */ 0x01, /* u8 bMaxCCIDBusySlots; */ +}; - /* Interrupt-IN endpoint */ - 0x07, /* u8 ep_bLength; */ - /* u8 ep_bDescriptorType; Endpoint */ - USB_DT_ENDPOINT, - /* u8 ep_bEndpointAddress; IN Endpoint 1 */ - 0x80 | CCID_INT_IN_EP, - 0x03, /* u8 ep_bmAttributes; Interrupt */ - /* u16 ep_wMaxPacketSize; */ - CCID_MAX_PACKET_SIZE & 0xff, (CCID_MAX_PACKET_SIZE >> 8), - 0xff, /* u8 ep_bInterval; */ - - /* Bulk-In endpoint */ - 0x07, /* u8 ep_bLength; */ - /* u8 ep_bDescriptorType; Endpoint */ - USB_DT_ENDPOINT, - /* u8 ep_bEndpointAddress; IN Endpoint 2 */ - 0x80 | CCID_BULK_IN_EP, - 0x02, /* u8 ep_bmAttributes; Bulk */ - 0x40, 0x00, /* u16 ep_wMaxPacketSize; */ - 0x00, /* u8 ep_bInterval; */ - - /* Bulk-Out endpoint */ - 0x07, /* u8 ep_bLength; */ - /* u8 ep_bDescriptorType; Endpoint */ - USB_DT_ENDPOINT, - /* u8 ep_bEndpointAddress; OUT Endpoint 3 */ - CCID_BULK_OUT_EP, - 0x02, /* u8 ep_bmAttributes; Bulk */ - 0x40, 0x00, /* u16 ep_wMaxPacketSize; */ - 0x00, /* u8 ep_bInterval; */ +enum { + STR_MANUFACTURER = 1, + STR_PRODUCT, + STR_SERIALNUMBER, + STR_INTERFACE, +}; +static const USBDescStrings desc_strings = { + [STR_MANUFACTURER] = "QEMU " QEMU_VERSION, + [STR_PRODUCT] = "QEMU USB CCID", + [STR_SERIALNUMBER] = "1", + [STR_INTERFACE] = "CCID Interface", +}; + +static const USBDescIface desc_iface0 = { + .bInterfaceNumber = 0, + .bNumEndpoints = 3, + .bInterfaceClass = 0x0b, + .bInterfaceSubClass = 0x00, + .bInterfaceProtocol = 0x00, + .iInterface = STR_INTERFACE, + .ndesc = 1, + .descs = (USBDescOther[]) { + { + /* smartcard descriptor */ + .data = qemu_ccid_descriptor, + }, + }, + .eps = (USBDescEndpoint[]) { + { + .bEndpointAddress = USB_DIR_IN | CCID_INT_IN_EP, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .bInterval = 255, + .wMaxPacketSize = 64, + },{ + .bEndpointAddress = USB_DIR_IN | CCID_BULK_IN_EP, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = 64, + },{ + .bEndpointAddress = USB_DIR_OUT | CCID_BULK_OUT_EP, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = 64, + }, + } +}; + +static const USBDescDevice desc_device = { + .bcdUSB = 0x0110, + .bMaxPacketSize0 = 64, + .bNumConfigurations = 1, + .confs = (USBDescConfig[]) { + { + .bNumInterfaces = 1, + .bConfigurationValue = 1, + .bmAttributes = 0xa0, + .bMaxPower = 50, + .nif = 1, + .ifs = &desc_iface0, + }, + }, +}; + +static const USBDesc desc_ccid = { + .id = { + .idVendor = CCID_VENDOR_ID, + .idProduct = CCID_PRODUCT_ID, + .bcdDevice = CCID_DEVICE_VERSION, + .iManufacturer = STR_MANUFACTURER, + .iProduct = STR_PRODUCT, + .iSerialNumber = STR_SERIALNUMBER, + }, + .full = &desc_device, + .str = desc_strings, }; static bool ccid_has_pending_answers(USBCCIDState *s) @@ -610,87 +605,12 @@ static int ccid_handle_control(USBDevice *dev, USBPacket *p, int request, int ret = 0; DPRINTF(s, 1, "got control %x, value %x\n", request, value); + ret = usb_desc_handle_control(dev, p, request, value, index, length, data); + if (ret >= 0) { + return ret; + } + switch (request) { - case DeviceRequest | USB_REQ_GET_STATUS: - data[0] = (1 << USB_DEVICE_SELF_POWERED) | - (dev->remote_wakeup << USB_DEVICE_REMOTE_WAKEUP); - data[1] = 0x00; - ret = 2; - break; - case DeviceOutRequest | USB_REQ_CLEAR_FEATURE: - if (value == USB_DEVICE_REMOTE_WAKEUP) { - dev->remote_wakeup = 0; - } else { - goto fail; - } - ret = 0; - break; - case DeviceOutRequest | USB_REQ_SET_FEATURE: - if (value == USB_DEVICE_REMOTE_WAKEUP) { - dev->remote_wakeup = 1; - } else { - goto fail; - } - ret = 0; - break; - case DeviceOutRequest | USB_REQ_SET_ADDRESS: - dev->addr = value; - ret = 0; - break; - case DeviceRequest | USB_REQ_GET_DESCRIPTOR: - switch (value >> 8) { - case USB_DT_DEVICE: - memcpy(data, qemu_ccid_dev_descriptor, - sizeof(qemu_ccid_dev_descriptor)); - ret = sizeof(qemu_ccid_dev_descriptor); - break; - case USB_DT_CONFIG: - memcpy(data, qemu_ccid_config_descriptor, - sizeof(qemu_ccid_config_descriptor)); - ret = sizeof(qemu_ccid_config_descriptor); - break; - case USB_DT_STRING: - switch (value & 0xff) { - case 0: - /* language ids */ - data[0] = 4; - data[1] = 3; - data[2] = 0x09; - data[3] = 0x04; - ret = 4; - break; - case 1: - /* vendor description */ - ret = set_usb_string(data, CCID_VENDOR_DESCRIPTION); - break; - case 2: - /* product description */ - ret = set_usb_string(data, CCID_PRODUCT_DESCRIPTION); - break; - case 3: - /* serial number */ - ret = set_usb_string(data, CCID_SERIAL_NUMBER_STRING); - break; - case 4: - /* interface name */ - ret = set_usb_string(data, CCID_INTERFACE_NAME); - break; - default: - goto fail; - } - break; - default: - goto fail; - } - break; - case DeviceRequest | USB_REQ_GET_CONFIGURATION: - data[0] = 1; - ret = 1; - break; - case DeviceOutRequest | USB_REQ_SET_CONFIGURATION: - /* Only one configuration - we just ignore the request */ - ret = 0; - break; case DeviceRequest | USB_REQ_GET_INTERFACE: data[0] = 0; ret = 1; @@ -698,9 +618,6 @@ static int ccid_handle_control(USBDevice *dev, USBPacket *p, int request, case InterfaceOutRequest | USB_REQ_SET_INTERFACE: ret = 0; break; - case EndpointOutRequest | USB_REQ_CLEAR_FEATURE: - ret = 0; - break; /* Class specific requests. */ case InterfaceOutClass | CCID_CONTROL_ABORT: @@ -716,7 +633,6 @@ static int ccid_handle_control(USBDevice *dev, USBPacket *p, int request, ret = USB_RET_STALL; break; default: -fail: DPRINTF(s, 1, "got unsupported/bogus control %x, value %x\n", request, value); ret = USB_RET_STALL; @@ -895,6 +811,7 @@ static void ccid_on_slot_change(USBCCIDState *s, bool full) s->bmSlotICCState |= SLOT_0_CHANGED_MASK; } s->notify_slot_change = true; + usb_wakeup(&s->dev); } static void ccid_write_data_block_error( @@ -1075,6 +992,7 @@ static int ccid_handle_data(USBDevice *dev, USBPacket *p) break; default: DPRINTF(s, 1, "Bad endpoint\n"); + ret = USB_RET_STALL; break; } break; @@ -1256,6 +1174,7 @@ static int ccid_initfn(USBDevice *dev) { USBCCIDState *s = DO_UPCAST(USBCCIDState, dev, dev); + usb_desc_init(dev); qbus_create_inplace(&s->bus.qbus, &ccid_bus_info, &dev->qdev, NULL); s->bus.qbus.allow_hotplug = 1; s->card = NULL; @@ -1381,6 +1300,7 @@ static struct USBDeviceInfo ccid_info = { .qdev.desc = "CCID Rev 1.1 smartcard reader", .qdev.size = sizeof(USBCCIDState), .init = ccid_initfn, + .usb_desc = &desc_ccid, .handle_packet = usb_generic_handle_packet, .handle_reset = ccid_handle_reset, .handle_control = ccid_handle_control, diff --git a/hw/usb-desc.h b/hw/usb-desc.h index 9d7ed599ce..5c14e4abdc 100644 --- a/hw/usb-desc.h +++ b/hw/usb-desc.h @@ -75,7 +75,7 @@ struct USBDescEndpoint { struct USBDescOther { uint8_t length; - uint8_t *data; + const uint8_t *data; }; typedef const char *USBDescStrings[256]; diff --git a/hw/usb-ehci.c b/hw/usb-ehci.c index 47a7fb9de4..e9e0789795 100644 --- a/hw/usb-ehci.c +++ b/hw/usb-ehci.c @@ -149,6 +149,7 @@ typedef enum { EST_FETCHENTRY, EST_FETCHQH, EST_FETCHITD, + EST_FETCHSITD, EST_ADVANCEQUEUE, EST_FETCHQTD, EST_EXECUTE, @@ -646,6 +647,13 @@ static void ehci_trace_itd(EHCIState *s, target_phys_addr_t addr, EHCIitd *itd) get_field(itd->bufptr[0], ITD_BUFPTR_DEVADDR)); } +static void ehci_trace_sitd(EHCIState *s, target_phys_addr_t addr, + EHCIsitd *sitd) +{ + trace_usb_ehci_sitd(addr, sitd->next, + (bool)(sitd->results & SITD_RESULTS_ACTIVE)); +} + /* queue management */ static EHCIQueue *ehci_alloc_queue(EHCIState *ehci, int async) @@ -849,8 +857,8 @@ static void ehci_reset(void *opaque) */ for(i = 0; i < NB_PORTS; i++) { devs[i] = s->ports[i].dev; - if (devs[i]) { - usb_attach(&s->ports[i], NULL); + if (devs[i] && devs[i]->attached) { + usb_detach(&s->ports[i]); } } @@ -870,8 +878,8 @@ static void ehci_reset(void *opaque) } else { s->portsc[i] = PORTSC_PPOWER; } - if (devs[i]) { - usb_attach(&s->ports[i], devs[i]); + if (devs[i] && devs[i]->attached) { + usb_attach(&s->ports[i]); } } ehci_queues_rip_all(s); @@ -937,15 +945,15 @@ static void handle_port_owner_write(EHCIState *s, int port, uint32_t owner) return; } - if (dev) { - usb_attach(&s->ports[port], NULL); + if (dev && dev->attached) { + usb_detach(&s->ports[port]); } *portsc &= ~PORTSC_POWNER; *portsc |= owner; - if (dev) { - usb_attach(&s->ports[port], dev); + if (dev && dev->attached) { + usb_attach(&s->ports[port]); } } @@ -969,8 +977,8 @@ static void handle_port_status_write(EHCIState *s, int port, uint32_t val) if (!(val & PORTSC_PRESET) &&(*portsc & PORTSC_PRESET)) { trace_usb_ehci_port_reset(port, 0); - if (dev) { - usb_attach(&s->ports[port], dev); + if (dev && dev->attached) { + usb_attach(&s->ports[port]); usb_send_msg(dev, USB_MSG_RESET); *portsc &= ~PORTSC_CSC; } @@ -979,7 +987,7 @@ static void handle_port_status_write(EHCIState *s, int port, uint32_t val) * Table 2.16 Set the enable bit(and enable bit change) to indicate * to SW that this port has a high speed device attached */ - if (dev && (dev->speedmask & USB_SPEED_MASK_HIGH)) { + if (dev && dev->attached && (dev->speedmask & USB_SPEED_MASK_HIGH)) { val |= PORTSC_PED; } } @@ -1584,8 +1592,13 @@ static int ehci_state_fetchentry(EHCIState *ehci, int async) again = 1; break; + case NLPTR_TYPE_STITD: + ehci_set_state(ehci, async, EST_FETCHSITD); + again = 1; + break; + default: - // TODO: handle siTD and FSTN types + /* TODO: handle FSTN type */ fprintf(stderr, "FETCHENTRY: entry at %X is of type %d " "which is not supported yet\n", entry, NLPTR_TYPE_GET(entry)); return -1; @@ -1701,6 +1714,30 @@ static int ehci_state_fetchitd(EHCIState *ehci, int async) return 1; } +static int ehci_state_fetchsitd(EHCIState *ehci, int async) +{ + uint32_t entry; + EHCIsitd sitd; + + assert(!async); + entry = ehci_get_fetch_addr(ehci, async); + + get_dwords(NLPTR_GET(entry), (uint32_t *)&sitd, + sizeof(EHCIsitd) >> 2); + ehci_trace_sitd(ehci, entry, &sitd); + + if (!(sitd.results & SITD_RESULTS_ACTIVE)) { + /* siTD is not active, nothing to do */; + } else { + /* TODO: split transfers are not implemented */ + fprintf(stderr, "WARNING: Skipping active siTD\n"); + } + + ehci_set_fetch_addr(ehci, async, sitd.next); + ehci_set_state(ehci, async, EST_FETCHENTRY); + return 1; +} + /* Section 4.10.2 - paragraph 3 */ static int ehci_state_advqueue(EHCIQueue *q, int async) { @@ -1976,6 +2013,10 @@ static void ehci_advance_state(EHCIState *ehci, again = ehci_state_fetchitd(ehci, async); break; + case EST_FETCHSITD: + again = ehci_state_fetchsitd(ehci, async); + break; + case EST_ADVANCEQUEUE: again = ehci_state_advqueue(q, async); break; diff --git a/hw/usb-hub.c b/hw/usb-hub.c index c49c547d0c..286e3ad85d 100644 --- a/hw/usb-hub.c +++ b/hw/usb-hub.c @@ -213,16 +213,6 @@ static void usb_hub_complete(USBPort *port, USBPacket *packet) usb_packet_complete(&s->dev, packet); } -static void usb_hub_handle_attach(USBDevice *dev) -{ - USBHubState *s = DO_UPCAST(USBHubState, dev, dev); - int i; - - for (i = 0; i < NUM_PORTS; i++) { - usb_port_location(&s->ports[i].port, dev->port, i+1); - } -} - static void usb_hub_handle_reset(USBDevice *dev) { /* XXX: do it */ @@ -499,6 +489,7 @@ static int usb_hub_initfn(USBDevice *dev) usb_register_port(usb_bus_from_device(dev), &port->port, s, i, &usb_hub_port_ops, USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); + usb_port_location(&port->port, dev->port, i+1); port->wPortStatus = PORT_STAT_POWER; port->wPortChange = 0; } @@ -537,7 +528,6 @@ static struct USBDeviceInfo hub_info = { .usb_desc = &desc_hub, .init = usb_hub_initfn, .handle_packet = usb_hub_handle_packet, - .handle_attach = usb_hub_handle_attach, .handle_reset = usb_hub_handle_reset, .handle_control = usb_hub_handle_control, .handle_data = usb_hub_handle_data, diff --git a/hw/usb-musb.c b/hw/usb-musb.c index 799fa6e187..01e2e7c389 100644 --- a/hw/usb-musb.c +++ b/hw/usb-musb.c @@ -314,7 +314,7 @@ struct MUSBEndPoint { }; struct MUSBState { - qemu_irq *irqs; + qemu_irq irqs[musb_irq_max]; USBBus bus; USBPort port; @@ -340,14 +340,12 @@ struct MUSBState { MUSBEndPoint ep[16]; }; -struct MUSBState *musb_init(qemu_irq *irqs) +void musb_reset(MUSBState *s) { - MUSBState *s = g_malloc0(sizeof(*s)); int i; - s->irqs = irqs; - s->faddr = 0x00; + s->devctl = 0; s->power = MGC_M_POWER_HSENAB; s->tx_intr = 0x0000; s->rx_intr = 0x0000; @@ -357,6 +355,10 @@ struct MUSBState *musb_init(qemu_irq *irqs) s->mask = 0x06; s->idx = 0; + s->setup_len = 0; + s->session = 0; + memset(s->buf, 0, sizeof(s->buf)); + /* TODO: _DW */ s->ep[0].config = MGC_M_CONFIGDATA_SOFTCONE | MGC_M_CONFIGDATA_DYNFIFO; for (i = 0; i < 16; i ++) { @@ -368,8 +370,20 @@ struct MUSBState *musb_init(qemu_irq *irqs) usb_packet_init(&s->ep[i].packey[0].p); usb_packet_init(&s->ep[i].packey[1].p); } +} + +struct MUSBState *musb_init(DeviceState *parent_device, int gpio_base) +{ + MUSBState *s = g_malloc0(sizeof(*s)); + int i; + + for (i = 0; i < musb_irq_max; i++) { + s->irqs[i] = qdev_get_gpio_in(parent_device, gpio_base + i); + } + + musb_reset(s); - usb_bus_new(&s->bus, &musb_bus_ops, NULL /* FIXME */); + usb_bus_new(&s->bus, &musb_bus_ops, parent_device); usb_register_port(&s->bus, &s->port, s, 0, &musb_port_ops, USB_SPEED_MASK_LOW | USB_SPEED_MASK_FULL); diff --git a/hw/usb-ohci.c b/hw/usb-ohci.c index d30db3f92f..503ca2d31f 100644 --- a/hw/usb-ohci.c +++ b/hw/usb-ohci.c @@ -448,8 +448,8 @@ static void ohci_reset(void *opaque) { port = &ohci->rhport[i]; port->ctrl = 0; - if (port->port.dev) { - usb_attach(&port->port, port->port.dev); + if (port->port.dev && port->port.dev->attached) { + usb_attach(&port->port); } } if (ohci->async_td) { diff --git a/hw/usb-uhci.c b/hw/usb-uhci.c index 6ca7ca81eb..64f7b36c00 100644 --- a/hw/usb-uhci.c +++ b/hw/usb-uhci.c @@ -340,8 +340,8 @@ static void uhci_reset(void *opaque) for(i = 0; i < NB_PORTS; i++) { port = &s->ports[i]; port->ctrl = 0x0080; - if (port->port.dev) { - usb_attach(&port->port, port->port.dev); + if (port->port.dev && port->port.dev->attached) { + usb_attach(&port->port); } } @@ -446,7 +446,7 @@ static void uhci_ioport_writew(void *opaque, uint32_t addr, uint32_t val) for(i = 0; i < NB_PORTS; i++) { port = &s->ports[i]; dev = port->port.dev; - if (dev) { + if (dev && dev->attached) { usb_send_msg(dev, USB_MSG_RESET); } } @@ -486,7 +486,7 @@ static void uhci_ioport_writew(void *opaque, uint32_t addr, uint32_t val) return; port = &s->ports[n]; dev = port->port.dev; - if (dev) { + if (dev && dev->attached) { /* port reset */ if ( (val & UHCI_PORT_RESET) && !(port->ctrl & UHCI_PORT_RESET) ) { @@ -660,8 +660,9 @@ static int uhci_broadcast_packet(UHCIState *s, USBPacket *p) UHCIPort *port = &s->ports[i]; USBDevice *dev = port->port.dev; - if (dev && (port->ctrl & UHCI_PORT_EN)) + if (dev && dev->attached && (port->ctrl & UHCI_PORT_EN)) { ret = usb_handle_packet(dev, p); + } } DPRINTF("uhci: packet exit. ret %d len %zd\n", ret, p->iov.size); @@ -27,26 +27,23 @@ #include "usb.h" #include "iov.h" -void usb_attach(USBPort *port, USBDevice *dev) +void usb_attach(USBPort *port) { - if (dev != NULL) { - /* attach */ - if (port->dev) { - usb_attach(port, NULL); - } - dev->port = port; - port->dev = dev; - port->ops->attach(port); - usb_send_msg(dev, USB_MSG_ATTACH); - } else { - /* detach */ - dev = port->dev; - assert(dev); - port->ops->detach(port); - usb_send_msg(dev, USB_MSG_DETACH); - dev->port = NULL; - port->dev = NULL; - } + USBDevice *dev = port->dev; + + assert(dev != NULL); + assert(dev->attached); + port->ops->attach(port); + usb_send_msg(dev, USB_MSG_ATTACH); +} + +void usb_detach(USBPort *port) +{ + USBDevice *dev = port->dev; + + assert(dev != NULL); + port->ops->detach(port); + usb_send_msg(dev, USB_MSG_DETACH); } void usb_wakeup(USBDevice *dev) @@ -338,8 +335,8 @@ void usb_packet_complete(USBDevice *dev, USBPacket *p) { /* Note: p->owner != dev is possible in case dev is a hub */ assert(p->owner != NULL); - dev->port->ops->complete(dev->port, p); p->owner = NULL; + dev->port->ops->complete(dev->port, p); } /* Cancel an active packet. The packed must have been deferred by @@ -304,7 +304,8 @@ int usb_handle_packet(USBDevice *dev, USBPacket *p); void usb_packet_complete(USBDevice *dev, USBPacket *p); void usb_cancel_packet(USBPacket * p); -void usb_attach(USBPort *port, USBDevice *dev); +void usb_attach(USBPort *port); +void usb_detach(USBPort *port); void usb_wakeup(USBDevice *dev); int usb_generic_handle_packet(USBDevice *s, USBPacket *p); void usb_generic_async_ctrl_complete(USBDevice *s, USBPacket *p); @@ -337,11 +338,13 @@ enum musb_irq_source_e { musb_irq_tx, musb_set_vbus, musb_set_session, - __musb_irq_max, + /* Add new interrupts here */ + musb_irq_max, /* total number of interrupts defined */ }; typedef struct MUSBState MUSBState; -MUSBState *musb_init(qemu_irq *irqs); +MUSBState *musb_init(DeviceState *parent_device, int gpio_base); +void musb_reset(MUSBState *s); uint32_t musb_core_intr_get(MUSBState *s); void musb_core_intr_clear(MUSBState *s, uint32_t mask); void musb_set_size(MUSBState *s, int epnum, int size, int is_tx); @@ -378,6 +381,8 @@ int usb_register_companion(const char *masterbus, USBPort *ports[], void *opaque, USBPortOps *ops, int speedmask); void usb_port_location(USBPort *downstream, USBPort *upstream, int portnr); void usb_unregister_port(USBBus *bus, USBPort *port); +int usb_claim_port(USBDevice *dev); +void usb_release_port(USBDevice *dev); int usb_device_attach(USBDevice *dev); int usb_device_detach(USBDevice *dev); int usb_device_delete_addr(int busnr, int addr); diff --git a/hw/virtex_ml507.c b/hw/virtex_ml507.c index 333050cdac..7459b0bbe9 100644 --- a/hw/virtex_ml507.c +++ b/hw/virtex_ml507.c @@ -196,7 +196,6 @@ static void virtex_init(ram_addr_t ram_size, target_phys_addr_t ram_base = 0; DriveInfo *dinfo; ram_addr_t phys_ram; - ram_addr_t phys_flash; qemu_irq irq[32], *cpu_irq; clk_setup_t clk_setup[7]; int kernel_size; @@ -215,9 +214,8 @@ static void virtex_init(ram_addr_t ram_size, phys_ram = qemu_ram_alloc(NULL, "ram", ram_size); cpu_register_physical_memory(ram_base, ram_size, phys_ram | IO_MEM_RAM); - phys_flash = qemu_ram_alloc(NULL, "virtex.flash", FLASH_SIZE); dinfo = drive_get(IF_PFLASH, 0, 0); - pflash_cfi01_register(0xfc000000, phys_flash, + pflash_cfi01_register(0xfc000000, NULL, "virtex.flash", FLASH_SIZE, dinfo ? dinfo->bdrv : NULL, (64 * 1024), FLASH_SIZE >> 16, 1, 0x89, 0x18, 0x0000, 0x0, 1); @@ -305,7 +305,7 @@ static void z2_init(ram_addr_t ram_size, } if (!pflash_cfi01_register(Z2_FLASH_BASE, - qemu_ram_alloc(NULL, "z2.flash0", Z2_FLASH_SIZE), + NULL, "z2.flash0", Z2_FLASH_SIZE, dinfo->bdrv, sector_len, Z2_FLASH_SIZE / sector_len, 4, 0, 0, 0, 0, be)) { diff --git a/iohandler.c b/iohandler.c index 5ef66fb6e8..4cc1c5ade6 100644 --- a/iohandler.c +++ b/iohandler.c @@ -93,10 +93,6 @@ static gboolean fd_trampoline(GIOChannel *chan, GIOCondition cond, gpointer opaq { IOTrampoline *tramp = opaque; - if (tramp->opaque == NULL) { - return FALSE; - } - if ((cond & G_IO_IN) && tramp->fd_read) { tramp->fd_read(tramp->opaque); } @@ -119,9 +115,10 @@ int qemu_set_fd_handler(int fd, if (tramp->tag != 0) { g_io_channel_unref(tramp->chan); g_source_remove(tramp->tag); + tramp->tag = 0; } - if (opaque) { + if (fd_read || fd_write || opaque) { GIOCondition cond = 0; tramp->fd_read = fd_read; diff --git a/libcacard/Makefile b/libcacard/Makefile index bf052bcc12..81d9eb5206 100644 --- a/libcacard/Makefile +++ b/libcacard/Makefile @@ -56,7 +56,7 @@ install-libcacard: libcacard.pc libcacard.la vscclient $(INSTALL_DIR) "$(DESTDIR)$(libcacard_includedir)" $(INSTALL_DIR) "$(DESTDIR)$(bindir)" $(LIBTOOL) --mode=install $(INSTALL_PROG) vscclient "$(DESTDIR)$(bindir)" - $(LIBTOOL) --mode=install $(INSTALL_PROG) libcacard.la "$(DESTDIR)$(libdir)" + $(LIBTOOL) --mode=install $(INSTALL_DATA) libcacard.la "$(DESTDIR)$(libdir)" $(LIBTOOL) --mode=install $(INSTALL_DATA) libcacard.pc "$(DESTDIR)$(libdir)/pkgconfig" for inc in *.h; do \ $(LIBTOOL) --mode=install $(INSTALL_DATA) $(libcacard_srcpath)/$$inc "$(DESTDIR)$(libcacard_includedir)"; \ diff --git a/rwhandler.c b/rwhandler.c deleted file mode 100644 index bb2238ff1e..0000000000 --- a/rwhandler.c +++ /dev/null @@ -1,87 +0,0 @@ -#include "rwhandler.h" -#include "ioport.h" -#include "cpu-all.h" - -#define RWHANDLER_WRITE(name, len, type) \ -static void name(void *opaque, type addr, uint32_t value) \ -{\ - struct ReadWriteHandler *handler = opaque;\ - handler->write(handler, addr, value, len);\ -} - -#define RWHANDLER_READ(name, len, type) \ -static uint32_t name(void *opaque, type addr) \ -{ \ - struct ReadWriteHandler *handler = opaque; \ - return handler->read(handler, addr, len); \ -} - -RWHANDLER_WRITE(cpu_io_memory_simple_writeb, 1, target_phys_addr_t); -RWHANDLER_READ(cpu_io_memory_simple_readb, 1, target_phys_addr_t); -RWHANDLER_WRITE(cpu_io_memory_simple_writew, 2, target_phys_addr_t); -RWHANDLER_READ(cpu_io_memory_simple_readw, 2, target_phys_addr_t); -RWHANDLER_WRITE(cpu_io_memory_simple_writel, 4, target_phys_addr_t); -RWHANDLER_READ(cpu_io_memory_simple_readl, 4, target_phys_addr_t); - -static CPUWriteMemoryFunc * const cpu_io_memory_simple_write[] = { - &cpu_io_memory_simple_writeb, - &cpu_io_memory_simple_writew, - &cpu_io_memory_simple_writel, -}; - -static CPUReadMemoryFunc * const cpu_io_memory_simple_read[] = { - &cpu_io_memory_simple_readb, - &cpu_io_memory_simple_readw, - &cpu_io_memory_simple_readl, -}; - -int cpu_register_io_memory_simple(struct ReadWriteHandler *handler, int endian) -{ - if (!handler->read || !handler->write) { - return -1; - } - return cpu_register_io_memory(cpu_io_memory_simple_read, - cpu_io_memory_simple_write, - handler, endian); -} - -RWHANDLER_WRITE(ioport_simple_writeb, 1, uint32_t); -RWHANDLER_READ(ioport_simple_readb, 1, uint32_t); -RWHANDLER_WRITE(ioport_simple_writew, 2, uint32_t); -RWHANDLER_READ(ioport_simple_readw, 2, uint32_t); -RWHANDLER_WRITE(ioport_simple_writel, 4, uint32_t); -RWHANDLER_READ(ioport_simple_readl, 4, uint32_t); - -int register_ioport_simple(ReadWriteHandler* handler, - pio_addr_t start, int length, int size) -{ - IOPortWriteFunc *write; - IOPortReadFunc *read; - int r; - switch (size) { - case 1: - write = ioport_simple_writeb; - read = ioport_simple_readb; - break; - case 2: - write = ioport_simple_writew; - read = ioport_simple_readw; - break; - default: - write = ioport_simple_writel; - read = ioport_simple_readl; - } - if (handler->write) { - r = register_ioport_write(start, length, size, write, handler); - if (r < 0) { - return r; - } - } - if (handler->read) { - r = register_ioport_read(start, length, size, read, handler); - if (r < 0) { - return r; - } - } - return 0; -} diff --git a/rwhandler.h b/rwhandler.h deleted file mode 100644 index b2a5790548..0000000000 --- a/rwhandler.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef READ_WRITE_HANDLER_H -#define READ_WRITE_HANDLER_H - -#include "qemu-common.h" -#include "ioport.h" - -typedef struct ReadWriteHandler ReadWriteHandler; - -/* len is guaranteed to be one of 1, 2 or 4, addr is guaranteed to fit in an - * appropriate type (io/memory/etc). They do not need to be range checked. */ -typedef void WriteHandlerFunc(ReadWriteHandler *, pcibus_t addr, - uint32_t value, int len); -typedef uint32_t ReadHandlerFunc(ReadWriteHandler *, pcibus_t addr, int len); - -struct ReadWriteHandler { - WriteHandlerFunc *write; - ReadHandlerFunc *read; -}; - -/* Helpers for when we want to use a single routine with length. */ -/* CPU memory handler: both read and write must be present. */ -int cpu_register_io_memory_simple(ReadWriteHandler *, int endian); -/* io port handler: can supply only read or write handlers. */ -int register_ioport_simple(ReadWriteHandler *, - pio_addr_t start, int length, int size); - -#endif diff --git a/target-i386/op_helper.c b/target-i386/op_helper.c index 1bbc3b56dc..1fc248fa17 100644 --- a/target-i386/op_helper.c +++ b/target-i386/op_helper.c @@ -1970,20 +1970,20 @@ void helper_aas(void) void helper_daa(void) { - int al, af, cf; + int old_al, al, af, cf; int eflags; eflags = helper_cc_compute_all(CC_OP); cf = eflags & CC_C; af = eflags & CC_A; - al = EAX & 0xff; + old_al = al = EAX & 0xff; eflags = 0; if (((al & 0x0f) > 9 ) || af) { al = (al + 6) & 0xff; eflags |= CC_A; } - if ((al > 0x9f) || cf) { + if ((old_al > 0x99) || cf) { al = (al + 0x60) & 0xff; eflags |= CC_C; } diff --git a/target-mips/cpu.h b/target-mips/cpu.h index c5f70fa759..79e25583ff 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -537,6 +537,10 @@ static inline int cpu_mips_hw_interrupts_pending(CPUState *env) if (!(env->CP0_Status & (1 << CP0St_IE)) || (env->CP0_Status & (1 << CP0St_EXL)) || (env->CP0_Status & (1 << CP0St_ERL)) || + /* Note that the TCStatus IXMT field is initialized to zero, + and only MT capable cores can set it to one. So we don't + need to check for MT capabilities here. */ + (env->active_tc.CP0_TCStatus & (1 << CP0TCSt_IXMT)) || (env->hflags & MIPS_HFLAG_DM)) { /* Interrupts are disabled */ return 0; @@ -618,6 +622,14 @@ enum { /* Dummy exception for conditional stores. */ #define EXCP_SC 0x100 +/* + * This is an interrnally generated WAKE request line. + * It is driven by the CPU itself. Raised when the MT + * block wants to wake a VPE from an inactive state and + * cleared when VPE goes from active to inactive. + */ +#define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 + int cpu_mips_exec(CPUMIPSState *s); CPUMIPSState *cpu_mips_init(const char *cpu_model); //~ uint32_t cpu_mips_get_clock (void); @@ -658,6 +670,37 @@ static inline void cpu_set_tls(CPUState *env, target_ulong newtls) env->tls_value = newtls; } +static inline int mips_vpe_active(CPUState *env) +{ + int active = 1; + + /* Check that the VPE is enabled. */ + if (!(env->mvp->CP0_MVPControl & (1 << CP0MVPCo_EVP))) { + active = 0; + } + /* Check that the VPE is actived. */ + if (!(env->CP0_VPEConf0 & (1 << CP0VPEC0_VPA))) { + active = 0; + } + + /* Now verify that there are active thread contexts in the VPE. + + This assumes the CPU model will internally reschedule threads + if the active one goes to sleep. If there are no threads available + the active one will be in a sleeping state, and we can turn off + the entire VPE. */ + if (!(env->active_tc.CP0_TCStatus & (1 << CP0TCSt_A))) { + /* TC is not activated. */ + active = 0; + } + if (env->active_tc.CP0_TCHalt & 1) { + /* TC is in halt state. */ + active = 0; + } + + return active; +} + static inline int cpu_has_work(CPUState *env) { int has_work = 0; @@ -670,6 +713,18 @@ static inline int cpu_has_work(CPUState *env) has_work = 1; } + /* MIPS-MT has the ability to halt the CPU. */ + if (env->CP0_Config3 & (1 << CP0C3_MT)) { + /* The QEMU model will issue an _WAKE request whenever the CPUs + should be woken up. */ + if (env->interrupt_request & CPU_INTERRUPT_WAKE) { + has_work = 1; + } + + if (!mips_vpe_active(env)) { + has_work = 0; + } + } return has_work; } diff --git a/target-mips/helper.c b/target-mips/helper.c index 024caa23c1..1c58e0cc21 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -482,18 +482,18 @@ void do_interrupt (CPUState *env) unsigned int vector; unsigned int pending = (env->CP0_Cause & CP0Ca_IP_mask) >> 8; + pending &= env->CP0_Status >> 8; /* Compute the Vector Spacing. */ spacing = (env->CP0_IntCtl >> CP0IntCtl_VS) & ((1 << 6) - 1); spacing <<= 5; if (env->CP0_Config3 & (1 << CP0C3_VInt)) { /* For VInt mode, the MIPS computes the vector internally. */ - for (vector = 0; vector < 8; vector++) { - if (pending & 1) { + for (vector = 7; vector > 0; vector--) { + if (pending & (1 << vector)) { /* Found it. */ break; } - pending >>= 1; } } else { /* For VEIC mode, the external interrupt controller feeds the diff --git a/target-mips/helper.h b/target-mips/helper.h index 297ab64bda..442f684697 100644 --- a/target-mips/helper.h +++ b/target-mips/helper.h @@ -52,6 +52,8 @@ DEF_HELPER_2(msachiu, tl, tl, tl) DEF_HELPER_0(mfc0_mvpcontrol, tl) DEF_HELPER_0(mfc0_mvpconf0, tl) DEF_HELPER_0(mfc0_mvpconf1, tl) +DEF_HELPER_0(mftc0_vpecontrol, tl) +DEF_HELPER_0(mftc0_vpeconf0, tl) DEF_HELPER_0(mfc0_random, tl) DEF_HELPER_0(mfc0_tcstatus, tl) DEF_HELPER_0(mftc0_tcstatus, tl) @@ -70,6 +72,10 @@ DEF_HELPER_0(mftc0_tcschefback, tl) DEF_HELPER_0(mfc0_count, tl) DEF_HELPER_0(mftc0_entryhi, tl) DEF_HELPER_0(mftc0_status, tl) +DEF_HELPER_0(mftc0_cause, tl) +DEF_HELPER_0(mftc0_epc, tl) +DEF_HELPER_0(mftc0_ebase, tl) +DEF_HELPER_1(mftc0_configx, tl, tl) DEF_HELPER_0(mfc0_lladdr, tl) DEF_HELPER_1(mfc0_watchlo, tl, i32) DEF_HELPER_1(mfc0_watchhi, tl, i32) @@ -88,7 +94,9 @@ DEF_HELPER_1(dmfc0_watchlo, tl, i32) DEF_HELPER_1(mtc0_index, void, tl) DEF_HELPER_1(mtc0_mvpcontrol, void, tl) DEF_HELPER_1(mtc0_vpecontrol, void, tl) +DEF_HELPER_1(mttc0_vpecontrol, void, tl) DEF_HELPER_1(mtc0_vpeconf0, void, tl) +DEF_HELPER_1(mttc0_vpeconf0, void, tl) DEF_HELPER_1(mtc0_vpeconf1, void, tl) DEF_HELPER_1(mtc0_yqmask, void, tl) DEF_HELPER_1(mtc0_vpeopt, void, tl) @@ -127,7 +135,9 @@ DEF_HELPER_1(mttc0_status, void, tl) DEF_HELPER_1(mtc0_intctl, void, tl) DEF_HELPER_1(mtc0_srsctl, void, tl) DEF_HELPER_1(mtc0_cause, void, tl) +DEF_HELPER_1(mttc0_cause, void, tl) DEF_HELPER_1(mtc0_ebase, void, tl) +DEF_HELPER_1(mttc0_ebase, void, tl) DEF_HELPER_1(mtc0_config0, void, tl) DEF_HELPER_1(mtc0_config2, void, tl) DEF_HELPER_1(mtc0_lladdr, void, tl) diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index 056011f1cc..96e40c6018 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -749,6 +749,163 @@ void helper_sdm (target_ulong addr, target_ulong reglist, uint32_t mem_idx) #endif #ifndef CONFIG_USER_ONLY +/* SMP helpers. */ +static int mips_vpe_is_wfi(CPUState *c) +{ + /* If the VPE is halted but otherwise active, it means it's waiting for + an interrupt. */ + return c->halted && mips_vpe_active(c); +} + +static inline void mips_vpe_wake(CPUState *c) +{ + /* Dont set ->halted = 0 directly, let it be done via cpu_has_work + because there might be other conditions that state that c should + be sleeping. */ + cpu_interrupt(c, CPU_INTERRUPT_WAKE); +} + +static inline void mips_vpe_sleep(CPUState *c) +{ + /* The VPE was shut off, really go to bed. + Reset any old _WAKE requests. */ + c->halted = 1; + cpu_reset_interrupt(c, CPU_INTERRUPT_WAKE); +} + +static inline void mips_tc_wake(CPUState *c, int tc) +{ + /* FIXME: TC reschedule. */ + if (mips_vpe_active(c) && !mips_vpe_is_wfi(c)) { + mips_vpe_wake(c); + } +} + +static inline void mips_tc_sleep(CPUState *c, int tc) +{ + /* FIXME: TC reschedule. */ + if (!mips_vpe_active(c)) { + mips_vpe_sleep(c); + } +} + +/* tc should point to an int with the value of the global TC index. + This function will transform it into a local index within the + returned CPUState. + + FIXME: This code assumes that all VPEs have the same number of TCs, + which depends on runtime setup. Can probably be fixed by + walking the list of CPUStates. */ +static CPUState *mips_cpu_map_tc(int *tc) +{ + CPUState *other; + int vpe_idx, nr_threads = env->nr_threads; + int tc_idx = *tc; + + if (!(env->CP0_VPEConf0 & (1 << CP0VPEC0_MVP))) { + /* Not allowed to address other CPUs. */ + *tc = env->current_tc; + return env; + } + + vpe_idx = tc_idx / nr_threads; + *tc = tc_idx % nr_threads; + other = qemu_get_cpu(vpe_idx); + return other ? other : env; +} + +/* The per VPE CP0_Status register shares some fields with the per TC + CP0_TCStatus registers. These fields are wired to the same registers, + so changes to either of them should be reflected on both registers. + + Also, EntryHi shares the bottom 8 bit ASID with TCStauts. + + These helper call synchronizes the regs for a given cpu. */ + +/* Called for updates to CP0_Status. */ +static void sync_c0_status(CPUState *cpu, int tc) +{ + int32_t tcstatus, *tcst; + uint32_t v = cpu->CP0_Status; + uint32_t cu, mx, asid, ksu; + uint32_t mask = ((1 << CP0TCSt_TCU3) + | (1 << CP0TCSt_TCU2) + | (1 << CP0TCSt_TCU1) + | (1 << CP0TCSt_TCU0) + | (1 << CP0TCSt_TMX) + | (3 << CP0TCSt_TKSU) + | (0xff << CP0TCSt_TASID)); + + cu = (v >> CP0St_CU0) & 0xf; + mx = (v >> CP0St_MX) & 0x1; + ksu = (v >> CP0St_KSU) & 0x3; + asid = env->CP0_EntryHi & 0xff; + + tcstatus = cu << CP0TCSt_TCU0; + tcstatus |= mx << CP0TCSt_TMX; + tcstatus |= ksu << CP0TCSt_TKSU; + tcstatus |= asid; + + if (tc == cpu->current_tc) { + tcst = &cpu->active_tc.CP0_TCStatus; + } else { + tcst = &cpu->tcs[tc].CP0_TCStatus; + } + + *tcst &= ~mask; + *tcst |= tcstatus; + compute_hflags(cpu); +} + +/* Called for updates to CP0_TCStatus. */ +static void sync_c0_tcstatus(CPUState *cpu, int tc, target_ulong v) +{ + uint32_t status; + uint32_t tcu, tmx, tasid, tksu; + uint32_t mask = ((1 << CP0St_CU3) + | (1 << CP0St_CU2) + | (1 << CP0St_CU1) + | (1 << CP0St_CU0) + | (1 << CP0St_MX) + | (3 << CP0St_KSU)); + + tcu = (v >> CP0TCSt_TCU0) & 0xf; + tmx = (v >> CP0TCSt_TMX) & 0x1; + tasid = v & 0xff; + tksu = (v >> CP0TCSt_TKSU) & 0x3; + + status = tcu << CP0St_CU0; + status |= tmx << CP0St_MX; + status |= tksu << CP0St_KSU; + + cpu->CP0_Status &= ~mask; + cpu->CP0_Status |= status; + + /* Sync the TASID with EntryHi. */ + cpu->CP0_EntryHi &= ~0xff; + cpu->CP0_EntryHi = tasid; + + compute_hflags(cpu); +} + +/* Called for updates to CP0_EntryHi. */ +static void sync_c0_entryhi(CPUState *cpu, int tc) +{ + int32_t *tcst; + uint32_t asid, v = cpu->CP0_EntryHi; + + asid = v & 0xff; + + if (tc == cpu->current_tc) { + tcst = &cpu->active_tc.CP0_TCStatus; + } else { + tcst = &cpu->tcs[tc].CP0_TCStatus; + } + + *tcst &= ~0xff; + *tcst |= asid; +} + /* CP0 helpers */ target_ulong helper_mfc0_mvpcontrol (void) { @@ -778,11 +935,12 @@ target_ulong helper_mfc0_tcstatus (void) target_ulong helper_mftc0_tcstatus(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCStatus; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCStatus; else - return env->tcs[other_tc].CP0_TCStatus; + return other->tcs[other_tc].CP0_TCStatus; } target_ulong helper_mfc0_tcbind (void) @@ -793,11 +951,12 @@ target_ulong helper_mfc0_tcbind (void) target_ulong helper_mftc0_tcbind(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCBind; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCBind; else - return env->tcs[other_tc].CP0_TCBind; + return other->tcs[other_tc].CP0_TCBind; } target_ulong helper_mfc0_tcrestart (void) @@ -808,11 +967,12 @@ target_ulong helper_mfc0_tcrestart (void) target_ulong helper_mftc0_tcrestart(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.PC; + if (other_tc == other->current_tc) + return other->active_tc.PC; else - return env->tcs[other_tc].PC; + return other->tcs[other_tc].PC; } target_ulong helper_mfc0_tchalt (void) @@ -823,11 +983,12 @@ target_ulong helper_mfc0_tchalt (void) target_ulong helper_mftc0_tchalt(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCHalt; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCHalt; else - return env->tcs[other_tc].CP0_TCHalt; + return other->tcs[other_tc].CP0_TCHalt; } target_ulong helper_mfc0_tccontext (void) @@ -838,11 +999,12 @@ target_ulong helper_mfc0_tccontext (void) target_ulong helper_mftc0_tccontext(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCContext; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCContext; else - return env->tcs[other_tc].CP0_TCContext; + return other->tcs[other_tc].CP0_TCContext; } target_ulong helper_mfc0_tcschedule (void) @@ -853,11 +1015,12 @@ target_ulong helper_mfc0_tcschedule (void) target_ulong helper_mftc0_tcschedule(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCSchedule; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCSchedule; else - return env->tcs[other_tc].CP0_TCSchedule; + return other->tcs[other_tc].CP0_TCSchedule; } target_ulong helper_mfc0_tcschefback (void) @@ -868,11 +1031,12 @@ target_ulong helper_mfc0_tcschefback (void) target_ulong helper_mftc0_tcschefback(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.CP0_TCScheFBack; + if (other_tc == other->current_tc) + return other->active_tc.CP0_TCScheFBack; else - return env->tcs[other_tc].CP0_TCScheFBack; + return other->tcs[other_tc].CP0_TCScheFBack; } target_ulong helper_mfc0_count (void) @@ -883,33 +1047,32 @@ target_ulong helper_mfc0_count (void) target_ulong helper_mftc0_entryhi(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); - int32_t tcstatus; - - if (other_tc == env->current_tc) - tcstatus = env->active_tc.CP0_TCStatus; - else - tcstatus = env->tcs[other_tc].CP0_TCStatus; + CPUState *other = mips_cpu_map_tc(&other_tc); - return (env->CP0_EntryHi & ~0xff) | (tcstatus & 0xff); + return other->CP0_EntryHi; } -target_ulong helper_mftc0_status(void) +target_ulong helper_mftc0_cause(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); - target_ulong t0; - int32_t tcstatus; + int32_t tccause; + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - tcstatus = env->active_tc.CP0_TCStatus; - else - tcstatus = env->tcs[other_tc].CP0_TCStatus; + if (other_tc == other->current_tc) { + tccause = other->CP0_Cause; + } else { + tccause = other->CP0_Cause; + } - t0 = env->CP0_Status & ~0xf1000018; - t0 |= tcstatus & (0xf << CP0TCSt_TCU0); - t0 |= (tcstatus & (1 << CP0TCSt_TMX)) >> (CP0TCSt_TMX - CP0St_MX); - t0 |= (tcstatus & (0x3 << CP0TCSt_TKSU)) >> (CP0TCSt_TKSU - CP0St_KSU); + return tccause; +} - return t0; +target_ulong helper_mftc0_status(void) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + return other->CP0_Status; } target_ulong helper_mfc0_lladdr (void) @@ -940,14 +1103,15 @@ target_ulong helper_mftc0_debug(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); int32_t tcstatus; + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - tcstatus = env->active_tc.CP0_Debug_tcstatus; + if (other_tc == other->current_tc) + tcstatus = other->active_tc.CP0_Debug_tcstatus; else - tcstatus = env->tcs[other_tc].CP0_Debug_tcstatus; + tcstatus = other->tcs[other_tc].CP0_Debug_tcstatus; /* XXX: Might be wrong, check with EJTAG spec. */ - return (env->CP0_Debug & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | + return (other->CP0_Debug & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | (tcstatus & ((1 << CP0DB_SSt) | (1 << CP0DB_Halt))); } @@ -1034,6 +1198,38 @@ void helper_mtc0_vpecontrol (target_ulong arg1) env->CP0_VPEControl = newval; } +void helper_mttc0_vpecontrol(target_ulong arg1) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + uint32_t mask; + uint32_t newval; + + mask = (1 << CP0VPECo_YSI) | (1 << CP0VPECo_GSI) | + (1 << CP0VPECo_TE) | (0xff << CP0VPECo_TargTC); + newval = (other->CP0_VPEControl & ~mask) | (arg1 & mask); + + /* TODO: Enable/disable TCs. */ + + other->CP0_VPEControl = newval; +} + +target_ulong helper_mftc0_vpecontrol(void) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + /* FIXME: Mask away return zero on read bits. */ + return other->CP0_VPEControl; +} + +target_ulong helper_mftc0_vpeconf0(void) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + return other->CP0_VPEConf0; +} + void helper_mtc0_vpeconf0 (target_ulong arg1) { uint32_t mask = 0; @@ -1051,6 +1247,20 @@ void helper_mtc0_vpeconf0 (target_ulong arg1) env->CP0_VPEConf0 = newval; } +void helper_mttc0_vpeconf0(target_ulong arg1) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + uint32_t mask = 0; + uint32_t newval; + + mask |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA); + newval = (other->CP0_VPEConf0 & ~mask) | (arg1 & mask); + + /* TODO: TC exclusive handling due to ERL/EXL. */ + other->CP0_VPEConf0 = newval; +} + void helper_mtc0_vpeconf1 (target_ulong arg1) { uint32_t mask = 0; @@ -1094,21 +1304,20 @@ void helper_mtc0_tcstatus (target_ulong arg1) newval = (env->active_tc.CP0_TCStatus & ~mask) | (arg1 & mask); - // TODO: Sync with CP0_Status. - env->active_tc.CP0_TCStatus = newval; + sync_c0_tcstatus(env, env->current_tc, newval); } void helper_mttc0_tcstatus (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - // TODO: Sync with CP0_Status. - - if (other_tc == env->current_tc) - env->active_tc.CP0_TCStatus = arg1; + if (other_tc == other->current_tc) + other->active_tc.CP0_TCStatus = arg1; else - env->tcs[other_tc].CP0_TCStatus = arg1; + other->tcs[other_tc].CP0_TCStatus = arg1; + sync_c0_tcstatus(other, other_tc, arg1); } void helper_mtc0_tcbind (target_ulong arg1) @@ -1127,15 +1336,16 @@ void helper_mttc0_tcbind (target_ulong arg1) int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); uint32_t mask = (1 << CP0TCBd_TBE); uint32_t newval; + CPUState *other = mips_cpu_map_tc(&other_tc); - if (env->mvp->CP0_MVPControl & (1 << CP0MVPCo_VPC)) + if (other->mvp->CP0_MVPControl & (1 << CP0MVPCo_VPC)) mask |= (1 << CP0TCBd_CurVPE); - if (other_tc == env->current_tc) { - newval = (env->active_tc.CP0_TCBind & ~mask) | (arg1 & mask); - env->active_tc.CP0_TCBind = newval; + if (other_tc == other->current_tc) { + newval = (other->active_tc.CP0_TCBind & ~mask) | (arg1 & mask); + other->active_tc.CP0_TCBind = newval; } else { - newval = (env->tcs[other_tc].CP0_TCBind & ~mask) | (arg1 & mask); - env->tcs[other_tc].CP0_TCBind = newval; + newval = (other->tcs[other_tc].CP0_TCBind & ~mask) | (arg1 & mask); + other->tcs[other_tc].CP0_TCBind = newval; } } @@ -1150,16 +1360,17 @@ void helper_mtc0_tcrestart (target_ulong arg1) void helper_mttc0_tcrestart (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) { - env->active_tc.PC = arg1; - env->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); - env->lladdr = 0ULL; + if (other_tc == other->current_tc) { + other->active_tc.PC = arg1; + other->active_tc.CP0_TCStatus &= ~(1 << CP0TCSt_TDS); + other->lladdr = 0ULL; /* MIPS16 not implemented. */ } else { - env->tcs[other_tc].PC = arg1; - env->tcs[other_tc].CP0_TCStatus &= ~(1 << CP0TCSt_TDS); - env->lladdr = 0ULL; + other->tcs[other_tc].PC = arg1; + other->tcs[other_tc].CP0_TCStatus &= ~(1 << CP0TCSt_TDS); + other->lladdr = 0ULL; /* MIPS16 not implemented. */ } } @@ -1169,18 +1380,30 @@ void helper_mtc0_tchalt (target_ulong arg1) env->active_tc.CP0_TCHalt = arg1 & 0x1; // TODO: Halt TC / Restart (if allocated+active) TC. + if (env->active_tc.CP0_TCHalt & 1) { + mips_tc_sleep(env, env->current_tc); + } else { + mips_tc_wake(env, env->current_tc); + } } void helper_mttc0_tchalt (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); // TODO: Halt TC / Restart (if allocated+active) TC. - if (other_tc == env->current_tc) - env->active_tc.CP0_TCHalt = arg1; + if (other_tc == other->current_tc) + other->active_tc.CP0_TCHalt = arg1; else - env->tcs[other_tc].CP0_TCHalt = arg1; + other->tcs[other_tc].CP0_TCHalt = arg1; + + if (arg1 & 1) { + mips_tc_sleep(other, other_tc); + } else { + mips_tc_wake(other, other_tc); + } } void helper_mtc0_tccontext (target_ulong arg1) @@ -1191,11 +1414,12 @@ void helper_mtc0_tccontext (target_ulong arg1) void helper_mttc0_tccontext (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.CP0_TCContext = arg1; + if (other_tc == other->current_tc) + other->active_tc.CP0_TCContext = arg1; else - env->tcs[other_tc].CP0_TCContext = arg1; + other->tcs[other_tc].CP0_TCContext = arg1; } void helper_mtc0_tcschedule (target_ulong arg1) @@ -1206,11 +1430,12 @@ void helper_mtc0_tcschedule (target_ulong arg1) void helper_mttc0_tcschedule (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.CP0_TCSchedule = arg1; + if (other_tc == other->current_tc) + other->active_tc.CP0_TCSchedule = arg1; else - env->tcs[other_tc].CP0_TCSchedule = arg1; + other->tcs[other_tc].CP0_TCSchedule = arg1; } void helper_mtc0_tcschefback (target_ulong arg1) @@ -1221,11 +1446,12 @@ void helper_mtc0_tcschefback (target_ulong arg1) void helper_mttc0_tcschefback (target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.CP0_TCScheFBack = arg1; + if (other_tc == other->current_tc) + other->active_tc.CP0_TCScheFBack = arg1; else - env->tcs[other_tc].CP0_TCScheFBack = arg1; + other->tcs[other_tc].CP0_TCScheFBack = arg1; } void helper_mtc0_entrylo1 (target_ulong arg1) @@ -1306,8 +1532,7 @@ void helper_mtc0_entryhi (target_ulong arg1) old = env->CP0_EntryHi; env->CP0_EntryHi = val; if (env->CP0_Config3 & (1 << CP0C3_MT)) { - uint32_t tcst = env->active_tc.CP0_TCStatus & ~0xff; - env->active_tc.CP0_TCStatus = tcst | (val & 0xff); + sync_c0_entryhi(env, env->current_tc); } /* If the ASID changes, flush qemu's TLB. */ if ((old & 0xFF) != (val & 0xFF)) @@ -1317,16 +1542,10 @@ void helper_mtc0_entryhi (target_ulong arg1) void helper_mttc0_entryhi(target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); - int32_t tcstatus; + CPUState *other = mips_cpu_map_tc(&other_tc); - env->CP0_EntryHi = (env->CP0_EntryHi & 0xff) | (arg1 & ~0xff); - if (other_tc == env->current_tc) { - tcstatus = (env->active_tc.CP0_TCStatus & ~0xff) | (arg1 & 0xff); - env->active_tc.CP0_TCStatus = tcstatus; - } else { - tcstatus = (env->tcs[other_tc].CP0_TCStatus & ~0xff) | (arg1 & 0xff); - env->tcs[other_tc].CP0_TCStatus = tcstatus; - } + other->CP0_EntryHi = arg1; + sync_c0_entryhi(other, other_tc); } void helper_mtc0_compare (target_ulong arg1) @@ -1342,7 +1561,12 @@ void helper_mtc0_status (target_ulong arg1) val = arg1 & mask; old = env->CP0_Status; env->CP0_Status = (env->CP0_Status & ~mask) | val; - compute_hflags(env); + if (env->CP0_Config3 & (1 << CP0C3_MT)) { + sync_c0_status(env, env->current_tc); + } else { + compute_hflags(env); + } + if (qemu_loglevel_mask(CPU_LOG_EXEC)) { qemu_log("Status %08x (%08x) => %08x (%08x) Cause %08x", old, old & env->CP0_Cause & CP0Ca_IP_mask, @@ -1360,22 +1584,16 @@ void helper_mtc0_status (target_ulong arg1) void helper_mttc0_status(target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); - int32_t tcstatus = env->tcs[other_tc].CP0_TCStatus; - - env->CP0_Status = arg1 & ~0xf1000018; - tcstatus = (tcstatus & ~(0xf << CP0TCSt_TCU0)) | (arg1 & (0xf << CP0St_CU0)); - tcstatus = (tcstatus & ~(1 << CP0TCSt_TMX)) | ((arg1 & (1 << CP0St_MX)) << (CP0TCSt_TMX - CP0St_MX)); - tcstatus = (tcstatus & ~(0x3 << CP0TCSt_TKSU)) | ((arg1 & (0x3 << CP0St_KSU)) << (CP0TCSt_TKSU - CP0St_KSU)); - if (other_tc == env->current_tc) - env->active_tc.CP0_TCStatus = tcstatus; - else - env->tcs[other_tc].CP0_TCStatus = tcstatus; + CPUState *other = mips_cpu_map_tc(&other_tc); + + other->CP0_Status = arg1 & ~0xf1000018; + sync_c0_status(other, other_tc); } void helper_mtc0_intctl (target_ulong arg1) { /* vectored interrupts not implemented, no performance counters. */ - env->CP0_IntCtl = (env->CP0_IntCtl & ~0x000002e0) | (arg1 & 0x000002e0); + env->CP0_IntCtl = (env->CP0_IntCtl & ~0x000003e0) | (arg1 & 0x000003e0); } void helper_mtc0_srsctl (target_ulong arg1) @@ -1384,38 +1602,95 @@ void helper_mtc0_srsctl (target_ulong arg1) env->CP0_SRSCtl = (env->CP0_SRSCtl & ~mask) | (arg1 & mask); } -void helper_mtc0_cause (target_ulong arg1) +static void mtc0_cause(CPUState *cpu, target_ulong arg1) { uint32_t mask = 0x00C00300; - uint32_t old = env->CP0_Cause; + uint32_t old = cpu->CP0_Cause; int i; - if (env->insn_flags & ISA_MIPS32R2) + if (cpu->insn_flags & ISA_MIPS32R2) { mask |= 1 << CP0Ca_DC; + } - env->CP0_Cause = (env->CP0_Cause & ~mask) | (arg1 & mask); + cpu->CP0_Cause = (cpu->CP0_Cause & ~mask) | (arg1 & mask); - if ((old ^ env->CP0_Cause) & (1 << CP0Ca_DC)) { - if (env->CP0_Cause & (1 << CP0Ca_DC)) - cpu_mips_stop_count(env); - else - cpu_mips_start_count(env); + if ((old ^ cpu->CP0_Cause) & (1 << CP0Ca_DC)) { + if (cpu->CP0_Cause & (1 << CP0Ca_DC)) { + cpu_mips_stop_count(cpu); + } else { + cpu_mips_start_count(cpu); + } } /* Set/reset software interrupts */ for (i = 0 ; i < 2 ; i++) { - if ((old ^ env->CP0_Cause) & (1 << (CP0Ca_IP + i))) { - cpu_mips_soft_irq(env, i, env->CP0_Cause & (1 << (CP0Ca_IP + i))); + if ((old ^ cpu->CP0_Cause) & (1 << (CP0Ca_IP + i))) { + cpu_mips_soft_irq(cpu, i, cpu->CP0_Cause & (1 << (CP0Ca_IP + i))); } } } +void helper_mtc0_cause(target_ulong arg1) +{ + mtc0_cause(env, arg1); +} + +void helper_mttc0_cause(target_ulong arg1) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + mtc0_cause(other, arg1); +} + +target_ulong helper_mftc0_epc(void) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + return other->CP0_EPC; +} + +target_ulong helper_mftc0_ebase(void) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + return other->CP0_EBase; +} + void helper_mtc0_ebase (target_ulong arg1) { /* vectored interrupts not implemented */ env->CP0_EBase = (env->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000); } +void helper_mttc0_ebase(target_ulong arg1) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + other->CP0_EBase = (other->CP0_EBase & ~0x3FFFF000) | (arg1 & 0x3FFFF000); +} + +target_ulong helper_mftc0_configx(target_ulong idx) +{ + int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); + + switch (idx) { + case 0: return other->CP0_Config0; + case 1: return other->CP0_Config1; + case 2: return other->CP0_Config2; + case 3: return other->CP0_Config3; + /* 4 and 5 are reserved. */ + case 6: return other->CP0_Config6; + case 7: return other->CP0_Config7; + default: + break; + } + return 0; +} + void helper_mtc0_config0 (target_ulong arg1) { env->CP0_Config0 = (env->CP0_Config0 & 0x81FFFFF8) | (arg1 & 0x00000007); @@ -1471,13 +1746,15 @@ void helper_mttc0_debug(target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); uint32_t val = arg1 & ((1 << CP0DB_SSt) | (1 << CP0DB_Halt)); + CPUState *other = mips_cpu_map_tc(&other_tc); /* XXX: Might be wrong, check with EJTAG spec. */ - if (other_tc == env->current_tc) - env->active_tc.CP0_Debug_tcstatus = val; + if (other_tc == other->current_tc) + other->active_tc.CP0_Debug_tcstatus = val; else - env->tcs[other_tc].CP0_Debug_tcstatus = val; - env->CP0_Debug = (env->CP0_Debug & ((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | + other->tcs[other_tc].CP0_Debug_tcstatus = val; + other->CP0_Debug = (other->CP0_Debug & + ((1 << CP0DB_SSt) | (1 << CP0DB_Halt))) | (arg1 & ~((1 << CP0DB_SSt) | (1 << CP0DB_Halt))); } @@ -1510,101 +1787,111 @@ void helper_mtc0_datahi (target_ulong arg1) target_ulong helper_mftgpr(uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.gpr[sel]; + if (other_tc == other->current_tc) + return other->active_tc.gpr[sel]; else - return env->tcs[other_tc].gpr[sel]; + return other->tcs[other_tc].gpr[sel]; } target_ulong helper_mftlo(uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.LO[sel]; + if (other_tc == other->current_tc) + return other->active_tc.LO[sel]; else - return env->tcs[other_tc].LO[sel]; + return other->tcs[other_tc].LO[sel]; } target_ulong helper_mfthi(uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.HI[sel]; + if (other_tc == other->current_tc) + return other->active_tc.HI[sel]; else - return env->tcs[other_tc].HI[sel]; + return other->tcs[other_tc].HI[sel]; } target_ulong helper_mftacx(uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.ACX[sel]; + if (other_tc == other->current_tc) + return other->active_tc.ACX[sel]; else - return env->tcs[other_tc].ACX[sel]; + return other->tcs[other_tc].ACX[sel]; } target_ulong helper_mftdsp(void) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - return env->active_tc.DSPControl; + if (other_tc == other->current_tc) + return other->active_tc.DSPControl; else - return env->tcs[other_tc].DSPControl; + return other->tcs[other_tc].DSPControl; } void helper_mttgpr(target_ulong arg1, uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.gpr[sel] = arg1; + if (other_tc == other->current_tc) + other->active_tc.gpr[sel] = arg1; else - env->tcs[other_tc].gpr[sel] = arg1; + other->tcs[other_tc].gpr[sel] = arg1; } void helper_mttlo(target_ulong arg1, uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.LO[sel] = arg1; + if (other_tc == other->current_tc) + other->active_tc.LO[sel] = arg1; else - env->tcs[other_tc].LO[sel] = arg1; + other->tcs[other_tc].LO[sel] = arg1; } void helper_mtthi(target_ulong arg1, uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.HI[sel] = arg1; + if (other_tc == other->current_tc) + other->active_tc.HI[sel] = arg1; else - env->tcs[other_tc].HI[sel] = arg1; + other->tcs[other_tc].HI[sel] = arg1; } void helper_mttacx(target_ulong arg1, uint32_t sel) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.ACX[sel] = arg1; + if (other_tc == other->current_tc) + other->active_tc.ACX[sel] = arg1; else - env->tcs[other_tc].ACX[sel] = arg1; + other->tcs[other_tc].ACX[sel] = arg1; } void helper_mttdsp(target_ulong arg1) { int other_tc = env->CP0_VPEControl & (0xff << CP0VPECo_TargTC); + CPUState *other = mips_cpu_map_tc(&other_tc); - if (other_tc == env->current_tc) - env->active_tc.DSPControl = arg1; + if (other_tc == other->current_tc) + other->active_tc.DSPControl = arg1; else - env->tcs[other_tc].DSPControl = arg1; + other->tcs[other_tc].DSPControl = arg1; } /* MIPS MT functions */ @@ -1622,14 +1909,36 @@ target_ulong helper_emt(void) target_ulong helper_dvpe(void) { - // TODO - return 0; + CPUState *other_cpu = first_cpu; + target_ulong prev = env->mvp->CP0_MVPControl; + + do { + /* Turn off all VPEs except the one executing the dvpe. */ + if (other_cpu != env) { + other_cpu->mvp->CP0_MVPControl &= ~(1 << CP0MVPCo_EVP); + mips_vpe_sleep(other_cpu); + } + other_cpu = other_cpu->next_cpu; + } while (other_cpu); + return prev; } target_ulong helper_evpe(void) { - // TODO - return 0; + CPUState *other_cpu = first_cpu; + target_ulong prev = env->mvp->CP0_MVPControl; + + do { + if (other_cpu != env + /* If the VPE is WFI, dont distrub it's sleep. */ + && !mips_vpe_is_wfi(other_cpu)) { + /* Enable the VPE. */ + other_cpu->mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP); + mips_vpe_wake(other_cpu); /* And wake it up. */ + } + other_cpu = other_cpu->next_cpu; + } while (other_cpu); + return prev; } #endif /* !CONFIG_USER_ONLY */ @@ -1977,6 +2286,7 @@ void helper_pmon (int function) void helper_wait (void) { env->halted = 1; + cpu_reset_interrupt(env, CPU_INTERRUPT_WAKE); helper_raise_exception(EXCP_HLT); } diff --git a/target-mips/translate.c b/target-mips/translate.c index 6c4e0d7675..d5b1c765fb 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5537,6 +5537,19 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, tcg_gen_movi_tl(t0, -1); else if (u == 0) { switch (rt) { + case 1: + switch (sel) { + case 1: + gen_helper_mftc0_vpecontrol(t0); + break; + case 2: + gen_helper_mftc0_vpeconf0(t0); + break; + default: + goto die; + break; + } + break; case 2: switch (sel) { case 1: @@ -5583,6 +5596,46 @@ static void gen_mftr(CPUState *env, DisasContext *ctx, int rt, int rd, gen_mfc0(env, ctx, t0, rt, sel); break; } + case 13: + switch (sel) { + case 0: + gen_helper_mftc0_cause(t0); + break; + default: + goto die; + break; + } + break; + case 14: + switch (sel) { + case 0: + gen_helper_mftc0_epc(t0); + break; + default: + goto die; + break; + } + break; + case 15: + switch (sel) { + case 1: + gen_helper_mftc0_ebase(t0); + break; + default: + goto die; + break; + } + break; + case 16: + switch (sel) { + case 0 ... 7: + gen_helper_mftc0_configx(t0, tcg_const_tl(sel)); + break; + default: + goto die; + break; + } + break; case 23: switch (sel) { case 0: @@ -5702,6 +5755,19 @@ static void gen_mttr(CPUState *env, DisasContext *ctx, int rd, int rt, /* NOP */ ; else if (u == 0) { switch (rd) { + case 1: + switch (sel) { + case 1: + gen_helper_mttc0_vpecontrol(t0); + break; + case 2: + gen_helper_mttc0_vpeconf0(t0); + break; + default: + goto die; + break; + } + break; case 2: switch (sel) { case 1: @@ -5748,6 +5814,26 @@ static void gen_mttr(CPUState *env, DisasContext *ctx, int rd, int rt, gen_mtc0(env, ctx, t0, rd, sel); break; } + case 13: + switch (sel) { + case 0: + gen_helper_mttc0_cause(t0); + break; + default: + goto die; + break; + } + break; + case 15: + switch (sel) { + case 1: + gen_helper_mttc0_ebase(t0); + break; + default: + goto die; + break; + } + break; case 23: switch (sel) { case 0: @@ -12727,6 +12813,32 @@ void cpu_reset (CPUMIPSState *env) /* Count register increments in debug mode, EJTAG version 1 */ env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER); env->hflags = MIPS_HFLAG_CP0; + + if (env->CP0_Config3 & (1 << CP0C3_MT)) { + int i; + + /* Only TC0 on VPE 0 starts as active. */ + for (i = 0; i < ARRAY_SIZE(env->tcs); i++) { + env->tcs[i].CP0_TCBind = env->cpu_index << CP0TCBd_CurVPE; + env->tcs[i].CP0_TCHalt = 1; + } + env->active_tc.CP0_TCHalt = 1; + env->halted = 1; + + if (!env->cpu_index) { + /* VPE0 starts up enabled. */ + env->mvp->CP0_MVPControl |= (1 << CP0MVPCo_EVP); + env->CP0_VPEConf0 |= (1 << CP0VPEC0_MVP) | (1 << CP0VPEC0_VPA); + + /* TC0 starts up unhalted. */ + env->halted = 0; + env->active_tc.CP0_TCHalt = 0; + env->tcs[0].CP0_TCHalt = 0; + /* With thread 0 active. */ + env->active_tc.CP0_TCStatus = (1 << CP0TCSt_A); + env->tcs[0].CP0_TCStatus = (1 << CP0TCSt_A); + } + } #endif #if defined(TARGET_MIPS64) if (env->cpu_model->insn_flags & ISA_MIPS3) { diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c index 5bb421562a..c39138f3c5 100644 --- a/target-mips/translate_init.c +++ b/target-mips/translate_init.c @@ -274,7 +274,7 @@ static const mips_def_t mips_defs[] = (0 << CP0C1_DS) | (3 << CP0C1_DL) | (1 << CP0C1_DA) | (1 << CP0C1_CA), .CP0_Config2 = MIPS_CONFIG2, - .CP0_Config3 = MIPS_CONFIG3 | (0 << CP0C3_VInt) | (1 << CP0C3_MT), + .CP0_Config3 = MIPS_CONFIG3 | (1 << CP0C3_VInt) | (1 << CP0C3_MT), .CP0_LLAddr_rw_bitmask = 0, .CP0_LLAddr_shift = 0, .SYNCI_Step = 32, @@ -580,7 +580,7 @@ static void mvp_init (CPUMIPSState *env, const mips_def_t *def) // (1 << CP0MVPC0_TCA) | (0x1 << CP0MVPC0_PVPE) | // (0x04 << CP0MVPC0_PTC); (1 << CP0MVPC0_TCA) | (0x0 << CP0MVPC0_PVPE) | - (0x04 << CP0MVPC0_PTC); + (0x00 << CP0MVPC0_PTC); #if !defined(CONFIG_USER_ONLY) /* Usermode has no TLB support */ env->mvp->CP0_MVPConf0 |= (env->tlb->nb_tlb << CP0MVPC0_PTLBE); diff --git a/trace-events b/trace-events index 08ffedfdd1..3fdd60faa4 100644 --- a/trace-events +++ b/trace-events @@ -209,6 +209,12 @@ sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva %"PRIx64" => pa %"PRIx64" iopte = %x" sun4m_iommu_bad_addr(uint64_t addr) "bad addr %"PRIx64"" +# hw/usb-bus.c +usb_port_claim(int bus, const char *port) "bus %d, port %s" +usb_port_attach(int bus, const char *port) "bus %d, port %s" +usb_port_detach(int bus, const char *port) "bus %d, port %s" +usb_port_release(int bus, const char *port) "bus %d, port %s" + # hw/usb-ehci.c usb_ehci_reset(void) "=== RESET ===" usb_ehci_mmio_readl(uint32_t addr, const char *str, uint32_t val) "rd mmio %04x [%s] = %x" @@ -223,6 +229,7 @@ usb_ehci_qtd_ptrs(void *q, uint32_t addr, uint32_t nxt, uint32_t altnext) "q %p usb_ehci_qtd_fields(uint32_t addr, int tbytes, int cpage, int cerr, int pid) "QTD @ %08x - tbytes %d, cpage %d, cerr %d, pid %d" usb_ehci_qtd_bits(uint32_t addr, int ioc, int active, int halt, int babble, int xacterr) "QTD @ %08x - ioc %d, active %d, halt %d, babble %d, xacterr %d" usb_ehci_itd(uint32_t addr, uint32_t nxt, uint32_t mplen, uint32_t mult, uint32_t ep, uint32_t devaddr) "ITD @ %08x: next %08x - mplen %d, mult %d, ep %d, dev %d" +usb_ehci_sitd(uint32_t addr, uint32_t nxt, uint32_t active) "ITD @ %08x: next %08x - active %d" usb_ehci_port_attach(uint32_t port, const char *device) "attach port #%d - %s" usb_ehci_port_detach(uint32_t port) "detach port #%d" usb_ehci_port_reset(uint32_t port, int enable) "reset port #%d - %d" @@ -240,6 +247,31 @@ usb_set_config(int addr, int config, int ret) "dev %d, config %d, ret %d" usb_clear_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" usb_set_device_feature(int addr, int feature, int ret) "dev %d, feature %d, ret %d" +# usb-linux.c +usb_host_open_started(int bus, int addr) "dev %d:%d" +usb_host_open_success(int bus, int addr) "dev %d:%d" +usb_host_open_failure(int bus, int addr) "dev %d:%d" +usb_host_disconnect(int bus, int addr) "dev %d:%d" +usb_host_close(int bus, int addr) "dev %d:%d" +usb_host_set_address(int bus, int addr, int config) "dev %d:%d, address %d" +usb_host_set_config(int bus, int addr, int config) "dev %d:%d, config %d" +usb_host_set_interface(int bus, int addr, int interface, int alt) "dev %d:%d, interface %d, alt %d" +usb_host_claim_interfaces(int bus, int addr, int config, int nif) "dev %d:%d, config %d, nif %d" +usb_host_release_interfaces(int bus, int addr) "dev %d:%d" +usb_host_req_control(int bus, int addr, int req, int value, int index) "dev %d:%d, req 0x%x, value %d, index %d" +usb_host_req_data(int bus, int addr, int in, int ep, int size) "dev %d:%d, in %d, ep %d, size %d" +usb_host_req_complete(int bus, int addr, int status) "dev %d:%d, status %d" +usb_host_urb_submit(int bus, int addr, void *aurb, int length, int more) "dev %d:%d, aurb %p, length %d, more %d" +usb_host_urb_complete(int bus, int addr, void *aurb, int status, int length, int more) "dev %d:%d, aurb %p, status %d, length %d, more %d" +usb_host_ep_set_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" +usb_host_ep_clear_halt(int bus, int addr, int ep) "dev %d:%d, ep %d" +usb_host_ep_start_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" +usb_host_ep_stop_iso(int bus, int addr, int ep) "dev %d:%d, ep %d" +usb_host_reset(int bus, int addr) "dev %d:%d" +usb_host_auto_scan_enabled(void) +usb_host_auto_scan_disabled(void) +usb_host_claim_port(int bus, int hub, int port) "bus %d, hub addr %d, port %d" + # hw/scsi-bus.c scsi_req_alloc(int target, int lun, int tag) "target %d lun %d tag %d" scsi_req_data(int target, int lun, int tag, int len) "target %d lun %d tag %d len %d" diff --git a/usb-linux.c b/usb-linux.c index 2e20f8e935..2075c4c67a 100644 --- a/usb-linux.c +++ b/usb-linux.c @@ -34,6 +34,7 @@ #include "qemu-timer.h" #include "monitor.h" #include "sysemu.h" +#include "trace.h" #include <dirent.h> #include <sys/ioctl.h> @@ -53,7 +54,7 @@ struct usb_ctrltransfer { void *data; }; -typedef int USBScanFunc(void *opaque, int bus_num, int addr, char *port, +typedef int USBScanFunc(void *opaque, int bus_num, int addr, const char *port, int class_id, int vendor_id, int product_id, const char *product_name, int speed); @@ -114,6 +115,7 @@ struct USBAutoFilter { typedef struct USBHostDevice { USBDevice dev; int fd; + int hub_fd; uint8_t descr[8192]; int descr_len; @@ -123,7 +125,8 @@ typedef struct USBHostDevice { uint32_t iso_urb_count; Notifier exit; - struct endp_data endp_table[MAX_ENDPOINTS]; + struct endp_data ep_in[MAX_ENDPOINTS]; + struct endp_data ep_out[MAX_ENDPOINTS]; QLIST_HEAD(, AsyncURB) aurbs; /* Host side address */ @@ -131,6 +134,7 @@ typedef struct USBHostDevice { int addr; char port[MAX_PORTLEN]; struct USBAutoFilter match; + int seen, errcount; QTAILQ_ENTRY(USBHostDevice) next; } USBHostDevice; @@ -142,95 +146,107 @@ static int parse_filter(const char *spec, struct USBAutoFilter *f); static void usb_host_auto_check(void *unused); static int usb_host_read_file(char *line, size_t line_size, const char *device_file, const char *device_name); +static int usb_linux_update_endp_table(USBHostDevice *s); -static struct endp_data *get_endp(USBHostDevice *s, int ep) +static struct endp_data *get_endp(USBHostDevice *s, int pid, int ep) { - return s->endp_table + ep - 1; + struct endp_data *eps = pid == USB_TOKEN_IN ? s->ep_in : s->ep_out; + assert(pid == USB_TOKEN_IN || pid == USB_TOKEN_OUT); + assert(ep > 0 && ep <= MAX_ENDPOINTS); + return eps + ep - 1; } -static int is_isoc(USBHostDevice *s, int ep) +static int is_isoc(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->type == USBDEVFS_URB_TYPE_ISO; + return get_endp(s, pid, ep)->type == USBDEVFS_URB_TYPE_ISO; } -static int is_valid(USBHostDevice *s, int ep) +static int is_valid(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->type != INVALID_EP_TYPE; + return get_endp(s, pid, ep)->type != INVALID_EP_TYPE; } -static int is_halted(USBHostDevice *s, int ep) +static int is_halted(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->halted; + return get_endp(s, pid, ep)->halted; } -static void clear_halt(USBHostDevice *s, int ep) +static void clear_halt(USBHostDevice *s, int pid, int ep) { - get_endp(s, ep)->halted = 0; + trace_usb_host_ep_clear_halt(s->bus_num, s->addr, ep); + get_endp(s, pid, ep)->halted = 0; } -static void set_halt(USBHostDevice *s, int ep) +static void set_halt(USBHostDevice *s, int pid, int ep) { - get_endp(s, ep)->halted = 1; + if (ep != 0) { + trace_usb_host_ep_set_halt(s->bus_num, s->addr, ep); + get_endp(s, pid, ep)->halted = 1; + } } -static int is_iso_started(USBHostDevice *s, int ep) +static int is_iso_started(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->iso_started; + return get_endp(s, pid, ep)->iso_started; } -static void clear_iso_started(USBHostDevice *s, int ep) +static void clear_iso_started(USBHostDevice *s, int pid, int ep) { - get_endp(s, ep)->iso_started = 0; + trace_usb_host_ep_stop_iso(s->bus_num, s->addr, ep); + get_endp(s, pid, ep)->iso_started = 0; } -static void set_iso_started(USBHostDevice *s, int ep) +static void set_iso_started(USBHostDevice *s, int pid, int ep) { - struct endp_data *e = get_endp(s, ep); + struct endp_data *e = get_endp(s, pid, ep); + + trace_usb_host_ep_start_iso(s->bus_num, s->addr, ep); if (!e->iso_started) { e->iso_started = 1; e->inflight = 0; } } -static int change_iso_inflight(USBHostDevice *s, int ep, int value) +static int change_iso_inflight(USBHostDevice *s, int pid, int ep, int value) { - struct endp_data *e = get_endp(s, ep); + struct endp_data *e = get_endp(s, pid, ep); e->inflight += value; return e->inflight; } -static void set_iso_urb(USBHostDevice *s, int ep, AsyncURB *iso_urb) +static void set_iso_urb(USBHostDevice *s, int pid, int ep, AsyncURB *iso_urb) { - get_endp(s, ep)->iso_urb = iso_urb; + get_endp(s, pid, ep)->iso_urb = iso_urb; } -static AsyncURB *get_iso_urb(USBHostDevice *s, int ep) +static AsyncURB *get_iso_urb(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->iso_urb; + return get_endp(s, pid, ep)->iso_urb; } -static void set_iso_urb_idx(USBHostDevice *s, int ep, int i) +static void set_iso_urb_idx(USBHostDevice *s, int pid, int ep, int i) { - get_endp(s, ep)->iso_urb_idx = i; + get_endp(s, pid, ep)->iso_urb_idx = i; } -static int get_iso_urb_idx(USBHostDevice *s, int ep) +static int get_iso_urb_idx(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->iso_urb_idx; + return get_endp(s, pid, ep)->iso_urb_idx; } -static void set_iso_buffer_used(USBHostDevice *s, int ep, int i) +static void set_iso_buffer_used(USBHostDevice *s, int pid, int ep, int i) { - get_endp(s, ep)->iso_buffer_used = i; + get_endp(s, pid, ep)->iso_buffer_used = i; } -static int get_iso_buffer_used(USBHostDevice *s, int ep) +static int get_iso_buffer_used(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->iso_buffer_used; + return get_endp(s, pid, ep)->iso_buffer_used; } -static void set_max_packet_size(USBHostDevice *s, int ep, uint8_t *descriptor) +static void set_max_packet_size(USBHostDevice *s, int pid, int ep, + uint8_t *descriptor) { int raw = descriptor[4] + (descriptor[5] << 8); int size, microframes; @@ -241,12 +257,12 @@ static void set_max_packet_size(USBHostDevice *s, int ep, uint8_t *descriptor) case 2: microframes = 3; break; default: microframes = 1; break; } - get_endp(s, ep)->max_packet_size = size * microframes; + get_endp(s, pid, ep)->max_packet_size = size * microframes; } -static int get_max_packet_size(USBHostDevice *s, int ep) +static int get_max_packet_size(USBHostDevice *s, int pid, int ep) { - return get_endp(s, ep)->max_packet_size; + return get_endp(s, pid, ep)->max_packet_size; } /* @@ -285,8 +301,6 @@ static void async_free(AsyncURB *aurb) static void do_disconnect(USBHostDevice *s) { - printf("husb: device %d.%d disconnected\n", - s->bus_num, s->addr); usb_host_close(s); usb_host_auto_check(NULL); } @@ -308,12 +322,15 @@ static void async_complete(void *opaque) } return; } - if (errno == ENODEV && !s->closing) { - do_disconnect(s); + if (errno == ENODEV) { + if (!s->closing) { + trace_usb_host_disconnect(s->bus_num, s->addr); + do_disconnect(s); + } return; } - DPRINTF("husb: async. reap urb failed errno %d\n", errno); + perror("USBDEVFS_REAPURBNDELAY"); return; } @@ -324,19 +341,24 @@ static void async_complete(void *opaque) anything else (it is handled further in usb_host_handle_iso_data) */ if (aurb->iso_frame_idx == -1) { int inflight; + int pid = (aurb->urb.endpoint & USB_DIR_IN) ? + USB_TOKEN_IN : USB_TOKEN_OUT; + int ep = aurb->urb.endpoint & 0xf; if (aurb->urb.status == -EPIPE) { - set_halt(s, aurb->urb.endpoint & 0xf); + set_halt(s, pid, ep); } aurb->iso_frame_idx = 0; urbs++; - inflight = change_iso_inflight(s, aurb->urb.endpoint & 0xf, -1); - if (inflight == 0 && is_iso_started(s, aurb->urb.endpoint & 0xf)) { + inflight = change_iso_inflight(s, pid, ep, -1); + if (inflight == 0 && is_iso_started(s, pid, ep)) { fprintf(stderr, "husb: out of buffers for iso stream\n"); } continue; } p = aurb->packet; + trace_usb_host_urb_complete(s->bus_num, s->addr, aurb, aurb->urb.status, + aurb->urb.actual_length, aurb->more); if (p) { switch (aurb->urb.status) { @@ -345,7 +367,7 @@ static void async_complete(void *opaque) break; case -EPIPE: - set_halt(s, p->devep); + set_halt(s, p->pid, p->devep); p->result = USB_RET_STALL; break; @@ -355,8 +377,10 @@ static void async_complete(void *opaque) } if (aurb->urb.type == USBDEVFS_URB_TYPE_CONTROL) { + trace_usb_host_req_complete(s->bus_num, s->addr, p->result); usb_generic_async_ctrl_complete(&s->dev, p); } else if (!aurb->more) { + trace_usb_host_req_complete(s->bus_num, s->addr, p->result); usb_packet_complete(&s->dev, p); } } @@ -394,8 +418,11 @@ static int usb_host_claim_interfaces(USBHostDevice *dev, int configuration) int interface, nb_interfaces; int ret, i; - if (configuration == 0) /* address state - ignore */ + if (configuration == 0) { /* address state - ignore */ + dev->ninterfaces = 0; + dev->configuration = 0; return 1; + } DPRINTF("husb: claiming interfaces. config %d\n", configuration); @@ -418,9 +445,9 @@ static int usb_host_claim_interfaces(USBHostDevice *dev, int configuration) } config_descr_len = dev->descr[i]; - printf("husb: config #%d need %d\n", dev->descr[i + 5], configuration); + DPRINTF("husb: config #%d need %d\n", dev->descr[i + 5], configuration); - if (configuration < 0 || configuration == dev->descr[i + 5]) { + if (configuration == dev->descr[i + 5]) { configuration = dev->descr[i + 5]; break; } @@ -457,17 +484,12 @@ static int usb_host_claim_interfaces(USBHostDevice *dev, int configuration) op = "USBDEVFS_CLAIMINTERFACE"; ret = ioctl(dev->fd, USBDEVFS_CLAIMINTERFACE, &interface); if (ret < 0) { - if (errno == EBUSY) { - printf("husb: update iface. device already grabbed\n"); - } else { - perror("husb: failed to claim interface"); - } goto fail; } } - printf("husb: %d interfaces claimed for configuration %d\n", - nb_interfaces, configuration); + trace_usb_host_claim_interfaces(dev->bus_num, dev->addr, + nb_interfaces, configuration); dev->ninterfaces = nb_interfaces; dev->configuration = configuration; @@ -485,16 +507,15 @@ static int usb_host_release_interfaces(USBHostDevice *s) { int ret, i; - DPRINTF("husb: releasing interfaces\n"); + trace_usb_host_release_interfaces(s->bus_num, s->addr); for (i = 0; i < s->ninterfaces; i++) { ret = ioctl(s->fd, USBDEVFS_RELEASEINTERFACE, &i); if (ret < 0) { - perror("husb: failed to release interface"); + perror("USBDEVFS_RELEASEINTERFACE"); return 0; } } - return 1; } @@ -502,11 +523,12 @@ static void usb_host_handle_reset(USBDevice *dev) { USBHostDevice *s = DO_UPCAST(USBHostDevice, dev, dev); - DPRINTF("husb: reset device %u.%u\n", s->bus_num, s->addr); + trace_usb_host_reset(s->bus_num, s->addr); ioctl(s->fd, USBDEVFS_RESET); - usb_host_claim_interfaces(s, s->configuration); + usb_host_claim_interfaces(s, 0); + usb_linux_update_endp_table(s); } static void usb_host_handle_destroy(USBDevice *dev) @@ -514,19 +536,20 @@ static void usb_host_handle_destroy(USBDevice *dev) USBHostDevice *s = (USBHostDevice *)dev; usb_host_close(s); + if (s->hub_fd != -1) { + close(s->hub_fd); + } QTAILQ_REMOVE(&hostdevs, s, next); qemu_remove_exit_notifier(&s->exit); } -static int usb_linux_update_endp_table(USBHostDevice *s); - /* iso data is special, we need to keep enough urbs in flight to make sure that the controller never runs out of them, otherwise the device will likely suffer a buffer underrun / overrun. */ -static AsyncURB *usb_host_alloc_iso(USBHostDevice *s, uint8_t ep, int in) +static AsyncURB *usb_host_alloc_iso(USBHostDevice *s, int pid, uint8_t ep) { AsyncURB *aurb; - int i, j, len = get_max_packet_size(s, ep); + int i, j, len = get_max_packet_size(s, pid, ep); aurb = g_malloc0(s->iso_urb_count * sizeof(*aurb)); for (i = 0; i < s->iso_urb_count; i++) { @@ -538,23 +561,23 @@ static AsyncURB *usb_host_alloc_iso(USBHostDevice *s, uint8_t ep, int in) aurb[i].urb.number_of_packets = ISO_FRAME_DESC_PER_URB; for (j = 0 ; j < ISO_FRAME_DESC_PER_URB; j++) aurb[i].urb.iso_frame_desc[j].length = len; - if (in) { + if (pid == USB_TOKEN_IN) { aurb[i].urb.endpoint |= 0x80; /* Mark as fully consumed (idle) */ aurb[i].iso_frame_idx = ISO_FRAME_DESC_PER_URB; } } - set_iso_urb(s, ep, aurb); + set_iso_urb(s, pid, ep, aurb); return aurb; } -static void usb_host_stop_n_free_iso(USBHostDevice *s, uint8_t ep) +static void usb_host_stop_n_free_iso(USBHostDevice *s, int pid, uint8_t ep) { AsyncURB *aurb; int i, ret, killed = 0, free = 1; - aurb = get_iso_urb(s, ep); + aurb = get_iso_urb(s, pid, ep); if (!aurb) { return; } @@ -564,7 +587,7 @@ static void usb_host_stop_n_free_iso(USBHostDevice *s, uint8_t ep) if (aurb[i].iso_frame_idx == -1) { ret = ioctl(s->fd, USBDEVFS_DISCARDURB, &aurb[i]); if (ret < 0) { - printf("husb: discard isoc in urb failed errno %d\n", errno); + perror("USBDEVFS_DISCARDURB"); free = 0; continue; } @@ -585,9 +608,9 @@ static void usb_host_stop_n_free_iso(USBHostDevice *s, uint8_t ep) g_free(aurb); else printf("husb: leaking iso urbs because of discard failure\n"); - set_iso_urb(s, ep, NULL); - set_iso_urb_idx(s, ep, 0); - clear_iso_started(s, ep); + set_iso_urb(s, pid, ep, NULL); + set_iso_urb_idx(s, pid, ep, 0); + clear_iso_started(s, pid, ep); } static int urb_status_to_usb_ret(int status) @@ -606,16 +629,16 @@ static int usb_host_handle_iso_data(USBHostDevice *s, USBPacket *p, int in) int i, j, ret, max_packet_size, offset, len = 0; uint8_t *buf; - max_packet_size = get_max_packet_size(s, p->devep); + max_packet_size = get_max_packet_size(s, p->pid, p->devep); if (max_packet_size == 0) return USB_RET_NAK; - aurb = get_iso_urb(s, p->devep); + aurb = get_iso_urb(s, p->pid, p->devep); if (!aurb) { - aurb = usb_host_alloc_iso(s, p->devep, in); + aurb = usb_host_alloc_iso(s, p->pid, p->devep); } - i = get_iso_urb_idx(s, p->devep); + i = get_iso_urb_idx(s, p->pid, p->devep); j = aurb[i].iso_frame_idx; if (j >= 0 && j < ISO_FRAME_DESC_PER_URB) { if (in) { @@ -642,7 +665,7 @@ static int usb_host_handle_iso_data(USBHostDevice *s, USBPacket *p, int in) } } else { len = p->iov.size; - offset = (j == 0) ? 0 : get_iso_buffer_used(s, p->devep); + offset = (j == 0) ? 0 : get_iso_buffer_used(s, p->pid, p->devep); /* Check the frame fits */ if (len > max_packet_size) { @@ -654,33 +677,33 @@ static int usb_host_handle_iso_data(USBHostDevice *s, USBPacket *p, int in) usb_packet_copy(p, aurb[i].urb.buffer + offset, len); aurb[i].urb.iso_frame_desc[j].length = len; offset += len; - set_iso_buffer_used(s, p->devep, offset); + set_iso_buffer_used(s, p->pid, p->devep, offset); /* Start the stream once we have buffered enough data */ - if (!is_iso_started(s, p->devep) && i == 1 && j == 8) { - set_iso_started(s, p->devep); + if (!is_iso_started(s, p->pid, p->devep) && i == 1 && j == 8) { + set_iso_started(s, p->pid, p->devep); } } aurb[i].iso_frame_idx++; if (aurb[i].iso_frame_idx == ISO_FRAME_DESC_PER_URB) { i = (i + 1) % s->iso_urb_count; - set_iso_urb_idx(s, p->devep, i); + set_iso_urb_idx(s, p->pid, p->devep, i); } } else { if (in) { - set_iso_started(s, p->devep); + set_iso_started(s, p->pid, p->devep); } else { DPRINTF("hubs: iso out error no free buffer, dropping packet\n"); } } - if (is_iso_started(s, p->devep)) { + if (is_iso_started(s, p->pid, p->devep)) { /* (Re)-submit all fully consumed / filled urbs */ for (i = 0; i < s->iso_urb_count; i++) { if (aurb[i].iso_frame_idx == ISO_FRAME_DESC_PER_URB) { ret = ioctl(s->fd, USBDEVFS_SUBMITURB, &aurb[i]); if (ret < 0) { - printf("husb error submitting iso urb %d: %d\n", i, errno); + perror("USBDEVFS_SUBMITURB"); if (!in || len == 0) { switch(errno) { case ETIMEDOUT: @@ -694,7 +717,7 @@ static int usb_host_handle_iso_data(USBHostDevice *s, USBPacket *p, int in) break; } aurb[i].iso_frame_idx = -1; - change_iso_inflight(s, p->devep, +1); + change_iso_inflight(s, p->pid, p->devep, 1); } } } @@ -711,7 +734,12 @@ static int usb_host_handle_data(USBDevice *dev, USBPacket *p) uint8_t *pbuf; uint8_t ep; - if (!is_valid(s, p->devep)) { + trace_usb_host_req_data(s->bus_num, s->addr, + p->pid == USB_TOKEN_IN, + p->devep, p->iov.size); + + if (!is_valid(s, p->pid, p->devep)) { + trace_usb_host_req_complete(s->bus_num, s->addr, USB_RET_NAK); return USB_RET_NAK; } @@ -721,17 +749,18 @@ static int usb_host_handle_data(USBDevice *dev, USBPacket *p) ep = p->devep; } - if (is_halted(s, p->devep)) { - ret = ioctl(s->fd, USBDEVFS_CLEAR_HALT, &ep); + if (is_halted(s, p->pid, p->devep)) { + unsigned int arg = ep; + ret = ioctl(s->fd, USBDEVFS_CLEAR_HALT, &arg); if (ret < 0) { - DPRINTF("husb: failed to clear halt. ep 0x%x errno %d\n", - ep, errno); + perror("USBDEVFS_CLEAR_HALT"); + trace_usb_host_req_complete(s->bus_num, s->addr, USB_RET_NAK); return USB_RET_NAK; } - clear_halt(s, p->devep); + clear_halt(s, p->pid, p->devep); } - if (is_isoc(s, p->devep)) { + if (is_isoc(s, p->pid, p->devep)) { return usb_host_handle_iso_data(s, p, p->pid == USB_TOKEN_IN); } @@ -767,20 +796,24 @@ static int usb_host_handle_data(USBDevice *dev, USBPacket *p) aurb->more = 1; } + trace_usb_host_urb_submit(s->bus_num, s->addr, aurb, + urb->buffer_length, aurb->more); ret = ioctl(s->fd, USBDEVFS_SUBMITURB, urb); DPRINTF("husb: data submit: ep 0x%x, len %u, more %d, packet %p, aurb %p\n", urb->endpoint, urb->buffer_length, aurb->more, p, aurb); if (ret < 0) { - DPRINTF("husb: submit failed. errno %d\n", errno); + perror("USBDEVFS_SUBMITURB"); async_free(aurb); switch(errno) { case ETIMEDOUT: + trace_usb_host_req_complete(s->bus_num, s->addr, USB_RET_NAK); return USB_RET_NAK; case EPIPE: default: + trace_usb_host_req_complete(s->bus_num, s->addr, USB_RET_STALL); return USB_RET_STALL; } } @@ -800,13 +833,15 @@ static int ctrl_error(void) static int usb_host_set_address(USBHostDevice *s, int addr) { - DPRINTF("husb: ctrl set addr %u\n", addr); + trace_usb_host_set_address(s->bus_num, s->addr, addr); s->dev.addr = addr; return 0; } static int usb_host_set_config(USBHostDevice *s, int config) { + trace_usb_host_set_config(s->bus_num, s->addr, config); + usb_host_release_interfaces(s); int ret = ioctl(s->fd, USBDEVFS_SETCONFIGURATION, &config); @@ -817,6 +852,7 @@ static int usb_host_set_config(USBHostDevice *s, int config) return ctrl_error(); } usb_host_claim_interfaces(s, config); + usb_linux_update_endp_table(s); return 0; } @@ -825,9 +861,14 @@ static int usb_host_set_interface(USBHostDevice *s, int iface, int alt) struct usbdevfs_setinterface si; int i, ret; + trace_usb_host_set_interface(s->bus_num, s->addr, iface, alt); + for (i = 1; i <= MAX_ENDPOINTS; i++) { - if (is_isoc(s, i)) { - usb_host_stop_n_free_iso(s, i); + if (is_isoc(s, USB_TOKEN_IN, i)) { + usb_host_stop_n_free_iso(s, USB_TOKEN_IN, i); + } + if (is_isoc(s, USB_TOKEN_OUT, i)) { + usb_host_stop_n_free_iso(s, USB_TOKEN_OUT, i); } } @@ -859,8 +900,7 @@ static int usb_host_handle_control(USBDevice *dev, USBPacket *p, */ /* Note request is (bRequestType << 8) | bRequest */ - DPRINTF("husb: ctrl type 0x%x req 0x%x val 0x%x index %u len %u\n", - request >> 8, request & 0xff, value, index, length); + trace_usb_host_req_control(s->bus_num, s->addr, request, value, index); switch (request) { case DeviceOutRequest | USB_REQ_SET_ADDRESS: @@ -900,6 +940,8 @@ static int usb_host_handle_control(USBDevice *dev, USBPacket *p, urb->usercontext = s; + trace_usb_host_urb_submit(s->bus_num, s->addr, aurb, + urb->buffer_length, aurb->more); ret = ioctl(s->fd, USBDEVFS_SUBMITURB, urb); DPRINTF("husb: submit ctrl. len %u aurb %p\n", urb->buffer_length, aurb); @@ -920,51 +962,6 @@ static int usb_host_handle_control(USBDevice *dev, USBPacket *p, return USB_RET_ASYNC; } -static int usb_linux_get_configuration(USBHostDevice *s) -{ - uint8_t configuration; - struct usb_ctrltransfer ct; - int ret; - - if (usb_fs_type == USB_FS_SYS) { - char device_name[32], line[1024]; - int configuration; - - sprintf(device_name, "%d-%s", s->bus_num, s->port); - - if (!usb_host_read_file(line, sizeof(line), "bConfigurationValue", - device_name)) { - goto usbdevfs; - } - if (sscanf(line, "%d", &configuration) != 1) { - goto usbdevfs; - } - return configuration; - } - -usbdevfs: - ct.bRequestType = USB_DIR_IN; - ct.bRequest = USB_REQ_GET_CONFIGURATION; - ct.wValue = 0; - ct.wIndex = 0; - ct.wLength = 1; - ct.data = &configuration; - ct.timeout = 50; - - ret = ioctl(s->fd, USBDEVFS_CONTROL, &ct); - if (ret < 0) { - perror("usb_linux_get_configuration"); - return -1; - } - - /* in address state */ - if (configuration == 0) { - return -1; - } - - return configuration; -} - static uint8_t usb_linux_get_alt_setting(USBHostDevice *s, uint8_t configuration, uint8_t interface) { @@ -1010,16 +1007,19 @@ usbdevfs: static int usb_linux_update_endp_table(USBHostDevice *s) { uint8_t *descriptors; - uint8_t devep, type, configuration, alt_interface; - int interface, length, i; + uint8_t devep, type, alt_interface; + int interface, length, i, ep, pid; + struct endp_data *epd; - for (i = 0; i < MAX_ENDPOINTS; i++) - s->endp_table[i].type = INVALID_EP_TYPE; + for (i = 0; i < MAX_ENDPOINTS; i++) { + s->ep_in[i].type = INVALID_EP_TYPE; + s->ep_out[i].type = INVALID_EP_TYPE; + } - i = usb_linux_get_configuration(s); - if (i < 0) - return 1; - configuration = i; + if (s->configuration == 0) { + /* not configured yet -- leave all endpoints disabled */ + return 0; + } /* get the desired configuration, interface, and endpoint descriptors * from device description */ @@ -1028,8 +1028,9 @@ static int usb_linux_update_endp_table(USBHostDevice *s) i = 0; if (descriptors[i + 1] != USB_DT_CONFIG || - descriptors[i + 5] != configuration) { - DPRINTF("invalid descriptor data - configuration\n"); + descriptors[i + 5] != s->configuration) { + fprintf(stderr, "invalid descriptor data - configuration %d\n", + s->configuration); return 1; } i += descriptors[i]; @@ -1043,7 +1044,8 @@ static int usb_linux_update_endp_table(USBHostDevice *s) } interface = descriptors[i + 2]; - alt_interface = usb_linux_get_alt_setting(s, configuration, interface); + alt_interface = usb_linux_get_alt_setting(s, s->configuration, + interface); /* the current interface descriptor is the active interface * and has endpoints */ @@ -1066,7 +1068,9 @@ static int usb_linux_update_endp_table(USBHostDevice *s) } devep = descriptors[i + 2]; - if ((devep & 0x0f) == 0) { + pid = (devep & USB_DIR_IN) ? USB_TOKEN_IN : USB_TOKEN_OUT; + ep = devep & 0xf; + if (ep == 0) { fprintf(stderr, "usb-linux: invalid ep descriptor, ep == 0\n"); return 1; } @@ -1077,7 +1081,7 @@ static int usb_linux_update_endp_table(USBHostDevice *s) break; case 0x01: type = USBDEVFS_URB_TYPE_ISO; - set_max_packet_size(s, (devep & 0xf), descriptors + i); + set_max_packet_size(s, pid, ep, descriptors + i); break; case 0x02: type = USBDEVFS_URB_TYPE_BULK; @@ -1089,8 +1093,10 @@ static int usb_linux_update_endp_table(USBHostDevice *s) DPRINTF("usb_host: malformed endpoint type\n"); type = USBDEVFS_URB_TYPE_BULK; } - s->endp_table[(devep & 0xf) - 1].type = type; - s->endp_table[(devep & 0xf) - 1].halted = 0; + epd = get_endp(s, pid, ep); + assert(epd->type == INVALID_EP_TYPE); + epd->type = type; + epd->halted = 0; i += descriptors[i]; } @@ -1135,15 +1141,17 @@ static int usb_linux_full_speed_compat(USBHostDevice *dev) } static int usb_host_open(USBHostDevice *dev, int bus_num, - int addr, char *port, const char *prod_name, int speed) + int addr, const char *port, + const char *prod_name, int speed) { int fd = -1, ret; char buf[1024]; + trace_usb_host_open_started(bus_num, addr); + if (dev->fd != -1) { goto fail; } - printf("husb: open device %d.%d\n", bus_num, addr); if (!usb_host_device_path) { perror("husb: USB Host Device Path not set"); @@ -1182,13 +1190,8 @@ static int usb_host_open(USBHostDevice *dev, int bus_num, #endif - /* - * Initial configuration is -1 which makes us claim first - * available config. We used to start with 1, which does not - * always work. I've seen devices where first config starts - * with 2. - */ - if (!usb_host_claim_interfaces(dev, -1)) { + /* start unconfigured -- we'll wait for the guest to set a configuration */ + if (!usb_host_claim_interfaces(dev, 0)) { goto fail; } @@ -1218,7 +1221,7 @@ static int usb_host_open(USBHostDevice *dev, int bus_num, dev->dev.speedmask |= USB_SPEED_MASK_FULL; } - printf("husb: grabbed usb device %d.%d\n", bus_num, addr); + trace_usb_host_open_success(bus_num, addr); if (!prod_name || prod_name[0] == '\0') { snprintf(dev->dev.product_desc, sizeof(dev->dev.product_desc), @@ -1239,6 +1242,7 @@ static int usb_host_open(USBHostDevice *dev, int bus_num, return 0; fail: + trace_usb_host_open_failure(bus_num, addr); if (dev->fd != -1) { close(dev->fd); dev->fd = -1; @@ -1254,11 +1258,16 @@ static int usb_host_close(USBHostDevice *dev) return -1; } + trace_usb_host_close(dev->bus_num, dev->addr); + qemu_set_fd_handler(dev->fd, NULL, NULL, NULL); dev->closing = 1; for (i = 1; i <= MAX_ENDPOINTS; i++) { - if (is_isoc(dev, i)) { - usb_host_stop_n_free_iso(dev, i); + if (is_isoc(dev, USB_TOKEN_IN, i)) { + usb_host_stop_n_free_iso(dev, USB_TOKEN_IN, i); + } + if (is_isoc(dev, USB_TOKEN_OUT, i)) { + usb_host_stop_n_free_iso(dev, USB_TOKEN_OUT, i); } } async_complete(dev); @@ -1285,17 +1294,76 @@ static int usb_host_initfn(USBDevice *dev) dev->auto_attach = 0; s->fd = -1; + s->hub_fd = -1; + QTAILQ_INSERT_TAIL(&hostdevs, s, next); s->exit.notify = usb_host_exit_notifier; qemu_add_exit_notifier(&s->exit); usb_host_auto_check(NULL); + +#ifdef USBDEVFS_CLAIM_PORT + if (s->match.bus_num != 0 && s->match.port != NULL) { + char *h, hub_name[64], line[1024]; + int hub_addr, portnr, ret; + + snprintf(hub_name, sizeof(hub_name), "%d-%s", + s->match.bus_num, s->match.port); + + /* try strip off last ".$portnr" to get hub */ + h = strrchr(hub_name, '.'); + if (h != NULL) { + portnr = atoi(h+1); + *h = '\0'; + } else { + /* no dot in there -> it is the root hub */ + snprintf(hub_name, sizeof(hub_name), "usb%d", + s->match.bus_num); + portnr = atoi(s->match.port); + } + + if (!usb_host_read_file(line, sizeof(line), "devnum", + hub_name)) { + goto out; + } + if (sscanf(line, "%d", &hub_addr) != 1) { + goto out; + } + + if (!usb_host_device_path) { + goto out; + } + snprintf(line, sizeof(line), "%s/%03d/%03d", + usb_host_device_path, s->match.bus_num, hub_addr); + s->hub_fd = open(line, O_RDWR | O_NONBLOCK); + if (s->hub_fd < 0) { + goto out; + } + + ret = ioctl(s->hub_fd, USBDEVFS_CLAIM_PORT, &portnr); + if (ret < 0) { + close(s->hub_fd); + s->hub_fd = -1; + goto out; + } + + trace_usb_host_claim_port(s->match.bus_num, hub_addr, portnr); + } +out: +#endif + return 0; } +static const VMStateDescription vmstate_usb_host = { + .name = "usb-host", + .unmigratable = 1, +}; + static struct USBDeviceInfo usb_host_dev_info = { .product_desc = "USB Host Device", .qdev.name = "usb-host", .qdev.size = sizeof(USBHostDevice), + .qdev.vmsd = &vmstate_usb_host, .init = usb_host_initfn, .handle_packet = usb_generic_handle_packet, .cancel_packet = usb_host_async_cancel, @@ -1421,7 +1489,8 @@ static int usb_host_scan_dev(void *opaque, USBScanFunc *func) FILE *f = NULL; char line[1024]; char buf[1024]; - int bus_num, addr, speed, device_count, class_id, product_id, vendor_id; + int bus_num, addr, speed, device_count; + int class_id, product_id, vendor_id, port; char product_name[512]; int ret = 0; @@ -1437,7 +1506,7 @@ static int usb_host_scan_dev(void *opaque, USBScanFunc *func) } device_count = 0; - bus_num = addr = class_id = product_id = vendor_id = 0; + bus_num = addr = class_id = product_id = vendor_id = port = 0; speed = -1; /* Can't get the speed from /[proc|dev]/bus/usb/devices */ for(;;) { if (fgets(line, sizeof(line), f) == NULL) { @@ -1459,6 +1528,10 @@ static int usb_host_scan_dev(void *opaque, USBScanFunc *func) goto fail; } bus_num = atoi(buf); + if (get_tag_value(buf, sizeof(buf), line, "Port=", " ") < 0) { + goto fail; + } + port = atoi(buf); if (get_tag_value(buf, sizeof(buf), line, "Dev#=", " ") < 0) { goto fail; } @@ -1504,7 +1577,12 @@ static int usb_host_scan_dev(void *opaque, USBScanFunc *func) } if (device_count && (vendor_id || product_id)) { /* Add the last device. */ - ret = func(opaque, bus_num, addr, 0, class_id, vendor_id, + if (port > 0) { + snprintf(buf, sizeof(buf), "%d", port); + } else { + snprintf(buf, sizeof(buf), "?"); + } + ret = func(opaque, bus_num, addr, buf, class_id, vendor_id, product_id, product_name, speed); } the_end: @@ -1713,7 +1791,8 @@ static int usb_host_scan(void *opaque, USBScanFunc *func) static QEMUTimer *usb_auto_timer; -static int usb_host_auto_scan(void *opaque, int bus_num, int addr, char *port, +static int usb_host_auto_scan(void *opaque, int bus_num, + int addr, const char *port, int class_id, int vendor_id, int product_id, const char *product_name, int speed) { @@ -1745,6 +1824,10 @@ static int usb_host_auto_scan(void *opaque, int bus_num, int addr, char *port, continue; } /* We got a match */ + s->seen++; + if (s->errcount >= 3) { + return 0; + } /* Already attached ? */ if (s->fd != -1) { @@ -1752,7 +1835,9 @@ static int usb_host_auto_scan(void *opaque, int bus_num, int addr, char *port, } DPRINTF("husb: auto open: bus_num %d addr %d\n", bus_num, addr); - usb_host_open(s, bus_num, addr, port, product_name, speed); + if (usb_host_open(s, bus_num, addr, port, product_name, speed) < 0) { + s->errcount++; + } break; } @@ -1770,12 +1855,17 @@ static void usb_host_auto_check(void *unused) if (s->fd == -1) { unconnected++; } + if (s->seen == 0) { + s->errcount = 0; + } + s->seen = 0; } if (unconnected == 0) { /* nothing to watch */ if (usb_auto_timer) { qemu_del_timer(usb_auto_timer); + trace_usb_host_auto_scan_disabled(); } return; } @@ -1785,6 +1875,7 @@ static void usb_host_auto_check(void *unused) if (!usb_auto_timer) { return; } + trace_usb_host_auto_scan_enabled(); } qemu_mod_timer(usb_auto_timer, qemu_get_clock_ms(rt_clock) + 2000); } @@ -1875,7 +1966,8 @@ static const char *usb_class_str(uint8_t class) return p->class_name; } -static void usb_info_device(Monitor *mon, int bus_num, int addr, char *port, +static void usb_info_device(Monitor *mon, int bus_num, + int addr, const char *port, int class_id, int vendor_id, int product_id, const char *product_name, int speed) @@ -1916,7 +2008,7 @@ static void usb_info_device(Monitor *mon, int bus_num, int addr, char *port, } static int usb_host_info_device(void *opaque, int bus_num, int addr, - char *path, int class_id, + const char *path, int class_id, int vendor_id, int product_id, const char *product_name, int speed) |