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-rw-r--r--hw/mips/cputimer.c9
-rw-r--r--target-mips/translate.c2
2 files changed, 8 insertions, 3 deletions
diff --git a/hw/mips/cputimer.c b/hw/mips/cputimer.c
index c8b4b000cd..6900a745c6 100644
--- a/hw/mips/cputimer.c
+++ b/hw/mips/cputimer.c
@@ -85,7 +85,12 @@ uint32_t cpu_mips_get_count (CPUMIPSState *env)
void cpu_mips_store_count (CPUMIPSState *env, uint32_t count)
{
- if (env->CP0_Cause & (1 << CP0Ca_DC))
+ /*
+ * This gets called from cpu_state_reset(), potentially before timer init.
+ * So env->timer may be NULL, which is also the case with KVM enabled so
+ * treat timer as disabled in that case.
+ */
+ if (env->CP0_Cause & (1 << CP0Ca_DC) || !env->timer)
env->CP0_Count = count;
else {
/* Store new count register */
@@ -142,6 +147,4 @@ static void mips_timer_cb (void *opaque)
void cpu_mips_clock_init (CPUMIPSState *env)
{
env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &mips_timer_cb, env);
- env->CP0_Compare = 0;
- cpu_mips_store_count(env, 1);
}
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 76deb7b138..d95ab9efe7 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -16043,6 +16043,8 @@ void cpu_state_reset(CPUMIPSState *env)
/* Count register increments in debug mode, EJTAG version 1 */
env->CP0_Debug = (1 << CP0DB_CNT) | (0x1 << CP0DB_VER);
+ cpu_mips_store_count(env, 1);
+
if (env->CP0_Config3 & (1 << CP0C3_MT)) {
int i;