diff options
| -rw-r--r-- | hw/arm-misc.h | 1 | ||||
| -rw-r--r-- | hw/arm_gic.c | 2 | ||||
| -rw-r--r-- | hw/armv7m_nvic.c | 9 | ||||
| -rw-r--r-- | hw/stellaris.c | 8 |
4 files changed, 9 insertions, 11 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h index f8011182dd..9c9537974c 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -27,6 +27,7 @@ void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, int board_id, target_phys_addr_t loader_start); /* armv7m_nvic.c */ +int system_clock_scale; qemu_irq *armv7m_nvic_init(CPUState *env); #endif /* !ARM_MISC_H */ diff --git a/hw/arm_gic.c b/hw/arm_gic.c index 774b79bf86..82577301b0 100644 --- a/hw/arm_gic.c +++ b/hw/arm_gic.c @@ -638,7 +638,7 @@ static void gic_reset(gic_state *s) s->cpu_enabled[i] = 0; #endif } - for (i = 0; i < 15; i++) { + for (i = 0; i < 16; i++) { GIC_SET_ENABLED(i); GIC_SET_TRIGGER(i); } diff --git a/hw/armv7m_nvic.c b/hw/armv7m_nvic.c index 99ea9873a7..fc60487dee 100644 --- a/hw/armv7m_nvic.c +++ b/hw/armv7m_nvic.c @@ -48,14 +48,15 @@ typedef struct { #define SYSTICK_CLKSOURCE (1 << 2) #define SYSTICK_COUNTFLAG (1 << 16) -/* Conversion factor from qemu timer to SysTick frequencies. - QEMU uses a base of 1GHz, so these give 20MHz and 1MHz for core and - reference frequencies. */ +/* Multiplication factor to convert from system clock ticks to qemu timer + ticks. */ +int system_clock_scale; +/* Conversion factor from qemu timer to SysTick frequencies. */ static inline int64_t systick_scale(nvic_state *s) { if (s->systick.control & SYSTICK_CLKSOURCE) - return 50; + return system_clock_scale; else return 1000; } diff --git a/hw/stellaris.c b/hw/stellaris.c index b7a0374527..7936e0cc2a 100644 --- a/hw/stellaris.c +++ b/hw/stellaris.c @@ -42,10 +42,6 @@ typedef const struct { /* General purpose timer module. */ -/* Multiplication factor to convert from GPTM timer ticks to qemu timer - ticks. */ -static int stellaris_clock_scale; - typedef struct gptm_state { uint32_t config; uint32_t mode[2]; @@ -90,7 +86,7 @@ static void gptm_reload(gptm_state *s, int n, int reset) /* 32-bit CountDown. */ uint32_t count; count = s->load[0] | (s->load[1] << 16); - tick += (int64_t)count * stellaris_clock_scale; + tick += (int64_t)count * system_clock_scale; } else if (s->config == 1) { /* 32-bit RTC. 1Hz tick. */ tick += ticks_per_sec; @@ -480,7 +476,7 @@ static void ssys_write(void *opaque, target_phys_addr_t offset, uint32_t value) s->int_status |= (1 << 6); } s->rcc = value; - stellaris_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1); + system_clock_scale = 5 * (((s->rcc >> 23) & 0xf) + 1); break; case 0x100: /* RCGC0 */ s->rcgc[0] = value; |