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-rw-r--r--hw/i386/pc_piix.c7
-rw-r--r--hw/i386/pc_q35.c7
-rw-r--r--hw/misc/pvpanic.c5
-rw-r--r--include/hw/i386/pc.h1
4 files changed, 0 insertions, 20 deletions
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 094c4212e6..2111f0192c 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -57,7 +57,6 @@ static const int ide_iobase[MAX_IDE_BUS] = { 0x1f0, 0x170 };
static const int ide_iobase2[MAX_IDE_BUS] = { 0x3f6, 0x376 };
static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
-static bool has_pvpanic;
static bool has_pci_info;
static bool has_acpi_build = true;
@@ -229,10 +228,6 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pc_pci_device_init(pci_bus);
}
-
- if (has_pvpanic) {
- pvpanic_init(isa_bus);
- }
}
static void pc_init_pci(QEMUMachineInitArgs *args)
@@ -250,13 +245,11 @@ static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_5(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
- has_pvpanic = true;
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
{
pc_compat_1_5(args);
- has_pvpanic = false;
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 1af8e2b943..600fc02ebe 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -47,7 +47,6 @@
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
-static bool has_pvpanic;
static bool has_pci_info;
static bool has_acpi_build = true;
@@ -216,10 +215,6 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
if (pci_enabled) {
pc_pci_device_init(host_bus);
}
-
- if (has_pvpanic) {
- pvpanic_init(isa_bus);
- }
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)
@@ -232,13 +227,11 @@ static void pc_compat_1_6(QEMUMachineInitArgs *args)
static void pc_compat_1_5(QEMUMachineInitArgs *args)
{
pc_compat_1_6(args);
- has_pvpanic = true;
}
static void pc_compat_1_4(QEMUMachineInitArgs *args)
{
pc_compat_1_5(args);
- has_pvpanic = false;
x86_cpu_compat_set_features("n270", FEAT_1_ECX, 0, CPUID_EXT_MOVBE);
x86_cpu_compat_set_features("Westmere", FEAT_1_ECX, 0, CPUID_EXT_PCLMULQDQ);
}
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 226e2983d3..5377feed69 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -112,11 +112,6 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
isa_register_ioport(d, &s->io, s->ioport);
}
-void pvpanic_init(ISABus *bus)
-{
- isa_create_simple(bus, TYPE_ISA_PVPANIC_DEVICE);
-}
-
#define PVPANIC_IOPORT_PROP "ioport"
uint16_t pvpanic_port(void)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 57e8d16180..09652fb22c 100644
--- a/include/hw/i386/pc.h
+++ b/include/hw/i386/pc.h
@@ -235,7 +235,6 @@ void pc_system_firmware_init(MemoryRegion *rom_memory,
bool isapc_ram_fw);
/* pvpanic.c */
-void pvpanic_init(ISABus *bus);
uint16_t pvpanic_port(void);
/* e820 types */