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-rw-r--r--hw/ppc_newworld.c7
-rw-r--r--hw/ppc_oldworld.c7
-rw-r--r--target-ppc/cpu.h3
3 files changed, 2 insertions, 15 deletions
diff --git a/hw/ppc_newworld.c b/hw/ppc_newworld.c
index 1379847219..022f761c4e 100644
--- a/hw/ppc_newworld.c
+++ b/hw/ppc_newworld.c
@@ -125,13 +125,6 @@ static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size,
qemu_register_reset(&cpu_ppc_reset, env);
envs[i] = env;
}
- if (env->nip < 0xFFF80000) {
- /* Special test for PowerPC 601:
- * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
- * But the NVRAM is located at 0xFFF04000...
- */
- cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
- }
/* allocate RAM */
ram_offset = qemu_ram_alloc(ram_size);
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index a6dfc3529e..3589812104 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -152,13 +152,6 @@ static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size,
qemu_register_reset(&cpu_ppc_reset, env);
envs[i] = env;
}
- if (env->nip < 0xFFF80000) {
- /* Special test for PowerPC 601:
- * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
- * But the NVRAM is located at 0xFFF04000...
- */
- cpu_abort(env, "G3 Beige Mac hardware can not handle 1 MB BIOS\n");
- }
/* allocate RAM */
if (ram_size > (2047 << 20)) {
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h
index 006f58d799..80ee76c73a 100644
--- a/target-ppc/cpu.h
+++ b/target-ppc/cpu.h
@@ -66,7 +66,8 @@
#define TARGET_HAS_ICE 1
-#if defined (TARGET_PPC64)
+/* Load a 32 bit BIOS also on 64 bit machines */
+#if defined (TARGET_PPC64) && defined(CONFIG_USER_ONLY)
#define ELF_MACHINE EM_PPC64
#else
#define ELF_MACHINE EM_PPC