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-rw-r--r--hw/omap.h1
-rw-r--r--hw/omap_tap.c33
2 files changed, 19 insertions, 15 deletions
diff --git a/hw/omap.h b/hw/omap.h
index f2f738303c..1da6787eee 100644
--- a/hw/omap.h
+++ b/hw/omap.h
@@ -827,6 +827,7 @@ struct omap_mpu_state_s {
MemoryRegion pwl_iomem;
MemoryRegion pwt_iomem;
MemoryRegion mpui_io_iomem;
+ MemoryRegion tap_iomem;
MemoryRegion imif_ram;
MemoryRegion emiff_ram;
diff --git a/hw/omap_tap.c b/hw/omap_tap.c
index e6852889ba..1b4820cebe 100644
--- a/hw/omap_tap.c
+++ b/hw/omap_tap.c
@@ -22,10 +22,15 @@
#include "omap.h"
/* TEST-Chip-level TAP */
-static uint32_t omap_tap_read(void *opaque, target_phys_addr_t addr)
+static uint64_t omap_tap_read(void *opaque, target_phys_addr_t addr,
+ unsigned size)
{
struct omap_mpu_state_s *s = (struct omap_mpu_state_s *) opaque;
+ if (size != 4) {
+ return omap_badwidth_read32(opaque, addr);
+ }
+
switch (addr) {
case 0x204: /* IDCODE_reg */
switch (s->mpu_model) {
@@ -87,27 +92,25 @@ static uint32_t omap_tap_read(void *opaque, target_phys_addr_t addr)
}
static void omap_tap_write(void *opaque, target_phys_addr_t addr,
- uint32_t value)
+ uint64_t value, unsigned size)
{
+ if (size != 4) {
+ return omap_badwidth_write32(opaque, addr, value);
+ }
+
OMAP_BAD_REG(addr);
}
-static CPUReadMemoryFunc * const omap_tap_readfn[] = {
- omap_badwidth_read32,
- omap_badwidth_read32,
- omap_tap_read,
-};
-
-static CPUWriteMemoryFunc * const omap_tap_writefn[] = {
- omap_badwidth_write32,
- omap_badwidth_write32,
- omap_tap_write,
+static const MemoryRegionOps omap_tap_ops = {
+ .read = omap_tap_read,
+ .write = omap_tap_write,
+ .endianness = DEVICE_NATIVE_ENDIAN,
};
void omap_tap_init(struct omap_target_agent_s *ta,
struct omap_mpu_state_s *mpu)
{
- omap_l4_attach(ta, 0, cpu_register_io_memory(
- omap_tap_readfn, omap_tap_writefn, mpu,
- DEVICE_NATIVE_ENDIAN));
+ memory_region_init_io(&mpu->tap_iomem, &omap_tap_ops, mpu, "omap.tap",
+ omap_l4_region_size(ta, 0));
+ omap_l4_attach_region(ta, 0, &mpu->tap_iomem);
}