diff options
| -rw-r--r-- | target-sparc/cc_helper.c | 66 | ||||
| -rw-r--r-- | target-sparc/cpu.h | 56 | ||||
| -rw-r--r-- | target-sparc/cpu_init.c | 2 | ||||
| -rw-r--r-- | target-sparc/fop_helper.c | 68 | ||||
| -rw-r--r-- | target-sparc/helper.c | 16 | ||||
| -rw-r--r-- | target-sparc/int32_helper.c | 6 | ||||
| -rw-r--r-- | target-sparc/int64_helper.c | 12 | ||||
| -rw-r--r-- | target-sparc/ldst_helper.c | 16 | ||||
| -rw-r--r-- | target-sparc/machine.c | 4 | ||||
| -rw-r--r-- | target-sparc/mmu_helper.c | 28 | ||||
| -rw-r--r-- | target-sparc/op_helper.c | 4 | ||||
| -rw-r--r-- | target-sparc/translate.c | 80 | ||||
| -rw-r--r-- | target-sparc/win_helper.c | 58 |
13 files changed, 208 insertions, 208 deletions
diff --git a/target-sparc/cc_helper.c b/target-sparc/cc_helper.c index 04bd2cf9c7..63bab077d6 100644 --- a/target-sparc/cc_helper.c +++ b/target-sparc/cc_helper.c @@ -20,12 +20,12 @@ #include "cpu.h" #include "helper.h" -static uint32_t compute_all_flags(CPUState *env) +static uint32_t compute_all_flags(CPUSPARCState *env) { return env->psr & PSR_ICC; } -static uint32_t compute_C_flags(CPUState *env) +static uint32_t compute_C_flags(CPUSPARCState *env) { return env->psr & PSR_CARRY; } @@ -43,12 +43,12 @@ static inline uint32_t get_NZ_icc(int32_t dst) } #ifdef TARGET_SPARC64 -static uint32_t compute_all_flags_xcc(CPUState *env) +static uint32_t compute_all_flags_xcc(CPUSPARCState *env) { return env->xcc & PSR_ICC; } -static uint32_t compute_C_flags_xcc(CPUState *env) +static uint32_t compute_C_flags_xcc(CPUSPARCState *env) { return env->xcc & PSR_CARRY; } @@ -76,7 +76,7 @@ static inline uint32_t get_V_div_icc(target_ulong src2) return ret; } -static uint32_t compute_all_div(CPUState *env) +static uint32_t compute_all_div(CPUSPARCState *env) { uint32_t ret; @@ -85,7 +85,7 @@ static uint32_t compute_all_div(CPUState *env) return ret; } -static uint32_t compute_C_div(CPUState *env) +static uint32_t compute_C_div(CPUSPARCState *env) { return 0; } @@ -155,7 +155,7 @@ static inline uint32_t get_V_add_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_add_xcc(CPUState *env) +static uint32_t compute_all_add_xcc(CPUSPARCState *env) { uint32_t ret; @@ -165,13 +165,13 @@ static uint32_t compute_all_add_xcc(CPUState *env) return ret; } -static uint32_t compute_C_add_xcc(CPUState *env) +static uint32_t compute_C_add_xcc(CPUSPARCState *env) { return get_C_add_xcc(CC_DST, CC_SRC); } #endif -static uint32_t compute_all_add(CPUState *env) +static uint32_t compute_all_add(CPUSPARCState *env) { uint32_t ret; @@ -181,13 +181,13 @@ static uint32_t compute_all_add(CPUState *env) return ret; } -static uint32_t compute_C_add(CPUState *env) +static uint32_t compute_C_add(CPUSPARCState *env) { return get_C_add_icc(CC_DST, CC_SRC); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_addx_xcc(CPUState *env) +static uint32_t compute_all_addx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -197,7 +197,7 @@ static uint32_t compute_all_addx_xcc(CPUState *env) return ret; } -static uint32_t compute_C_addx_xcc(CPUState *env) +static uint32_t compute_C_addx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -206,7 +206,7 @@ static uint32_t compute_C_addx_xcc(CPUState *env) } #endif -static uint32_t compute_all_addx(CPUState *env) +static uint32_t compute_all_addx(CPUSPARCState *env) { uint32_t ret; @@ -216,7 +216,7 @@ static uint32_t compute_all_addx(CPUState *env) return ret; } -static uint32_t compute_C_addx(CPUState *env) +static uint32_t compute_C_addx(CPUSPARCState *env) { uint32_t ret; @@ -234,7 +234,7 @@ static inline uint32_t get_V_tag_icc(target_ulong src1, target_ulong src2) return ret; } -static uint32_t compute_all_tadd(CPUState *env) +static uint32_t compute_all_tadd(CPUSPARCState *env) { uint32_t ret; @@ -245,7 +245,7 @@ static uint32_t compute_all_tadd(CPUState *env) return ret; } -static uint32_t compute_all_taddtv(CPUState *env) +static uint32_t compute_all_taddtv(CPUSPARCState *env) { uint32_t ret; @@ -320,7 +320,7 @@ static inline uint32_t get_V_sub_xcc(target_ulong dst, target_ulong src1, return ret; } -static uint32_t compute_all_sub_xcc(CPUState *env) +static uint32_t compute_all_sub_xcc(CPUSPARCState *env) { uint32_t ret; @@ -330,13 +330,13 @@ static uint32_t compute_all_sub_xcc(CPUState *env) return ret; } -static uint32_t compute_C_sub_xcc(CPUState *env) +static uint32_t compute_C_sub_xcc(CPUSPARCState *env) { return get_C_sub_xcc(CC_SRC, CC_SRC2); } #endif -static uint32_t compute_all_sub(CPUState *env) +static uint32_t compute_all_sub(CPUSPARCState *env) { uint32_t ret; @@ -346,13 +346,13 @@ static uint32_t compute_all_sub(CPUState *env) return ret; } -static uint32_t compute_C_sub(CPUState *env) +static uint32_t compute_C_sub(CPUSPARCState *env) { return get_C_sub_icc(CC_SRC, CC_SRC2); } #ifdef TARGET_SPARC64 -static uint32_t compute_all_subx_xcc(CPUState *env) +static uint32_t compute_all_subx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -362,7 +362,7 @@ static uint32_t compute_all_subx_xcc(CPUState *env) return ret; } -static uint32_t compute_C_subx_xcc(CPUState *env) +static uint32_t compute_C_subx_xcc(CPUSPARCState *env) { uint32_t ret; @@ -371,7 +371,7 @@ static uint32_t compute_C_subx_xcc(CPUState *env) } #endif -static uint32_t compute_all_subx(CPUState *env) +static uint32_t compute_all_subx(CPUSPARCState *env) { uint32_t ret; @@ -381,7 +381,7 @@ static uint32_t compute_all_subx(CPUState *env) return ret; } -static uint32_t compute_C_subx(CPUState *env) +static uint32_t compute_C_subx(CPUSPARCState *env) { uint32_t ret; @@ -389,7 +389,7 @@ static uint32_t compute_C_subx(CPUState *env) return ret; } -static uint32_t compute_all_tsub(CPUState *env) +static uint32_t compute_all_tsub(CPUSPARCState *env) { uint32_t ret; @@ -400,7 +400,7 @@ static uint32_t compute_all_tsub(CPUState *env) return ret; } -static uint32_t compute_all_tsubtv(CPUState *env) +static uint32_t compute_all_tsubtv(CPUSPARCState *env) { uint32_t ret; @@ -409,26 +409,26 @@ static uint32_t compute_all_tsubtv(CPUState *env) return ret; } -static uint32_t compute_all_logic(CPUState *env) +static uint32_t compute_all_logic(CPUSPARCState *env) { return get_NZ_icc(CC_DST); } -static uint32_t compute_C_logic(CPUState *env) +static uint32_t compute_C_logic(CPUSPARCState *env) { return 0; } #ifdef TARGET_SPARC64 -static uint32_t compute_all_logic_xcc(CPUState *env) +static uint32_t compute_all_logic_xcc(CPUSPARCState *env) { return get_NZ_xcc(CC_DST); } #endif typedef struct CCTable { - uint32_t (*compute_all)(CPUState *env); /* return all the flags */ - uint32_t (*compute_c)(CPUState *env); /* return the C flag */ + uint32_t (*compute_all)(CPUSPARCState *env); /* return all the flags */ + uint32_t (*compute_c)(CPUSPARCState *env); /* return the C flag */ } CCTable; static const CCTable icc_table[CC_OP_NB] = { @@ -463,7 +463,7 @@ static const CCTable xcc_table[CC_OP_NB] = { }; #endif -void helper_compute_psr(CPUState *env) +void helper_compute_psr(CPUSPARCState *env) { uint32_t new_psr; @@ -476,7 +476,7 @@ void helper_compute_psr(CPUState *env) CC_OP = CC_OP_FLAGS; } -uint32_t helper_compute_C_icc(CPUState *env) +uint32_t helper_compute_C_icc(CPUSPARCState *env) { uint32_t ret; diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 8098669704..2c2cea7ac5 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -501,7 +501,7 @@ struct CPUSPARCState { sparc_def_t *def; void *irq_manager; - void (*qemu_irq_ack)(CPUState *env, void *irq_manager, int intno); + void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); /* Leon3 cache control */ uint32_t cache_control; @@ -517,10 +517,10 @@ int cpu_sparc_handle_mmu_fault(CPUSPARCState *env1, target_ulong address, int rw int mmu_idx); #define cpu_handle_mmu_fault cpu_sparc_handle_mmu_fault target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev); -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env); +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env); #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) -int target_memory_rw_debug(CPUState *env, target_ulong addr, +int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, uint8_t *buf, int len, int is_write); #define TARGET_CPU_MEMORY_RW_DEBUG #endif @@ -533,22 +533,22 @@ void gen_intermediate_code_init(CPUSPARCState *env); int cpu_sparc_exec(CPUSPARCState *s); /* win_helper.c */ -target_ulong cpu_get_psr(CPUState *env1); -void cpu_put_psr(CPUState *env1, target_ulong val); +target_ulong cpu_get_psr(CPUSPARCState *env1); +void cpu_put_psr(CPUSPARCState *env1, target_ulong val); #ifdef TARGET_SPARC64 -target_ulong cpu_get_ccr(CPUState *env1); -void cpu_put_ccr(CPUState *env1, target_ulong val); -target_ulong cpu_get_cwp64(CPUState *env1); -void cpu_put_cwp64(CPUState *env1, int cwp); -void cpu_change_pstate(CPUState *env1, uint32_t new_pstate); +target_ulong cpu_get_ccr(CPUSPARCState *env1); +void cpu_put_ccr(CPUSPARCState *env1, target_ulong val); +target_ulong cpu_get_cwp64(CPUSPARCState *env1); +void cpu_put_cwp64(CPUSPARCState *env1, int cwp); +void cpu_change_pstate(CPUSPARCState *env1, uint32_t new_pstate); #endif -int cpu_cwp_inc(CPUState *env1, int cwp); -int cpu_cwp_dec(CPUState *env1, int cwp); -void cpu_set_cwp(CPUState *env1, int new_cwp); +int cpu_cwp_inc(CPUSPARCState *env1, int cwp); +int cpu_cwp_dec(CPUSPARCState *env1, int cwp); +void cpu_set_cwp(CPUSPARCState *env1, int new_cwp); /* int_helper.c */ -void do_interrupt(CPUState *env); -void leon3_irq_manager(CPUState *env, void *irq_manager, int intno); +void do_interrupt(CPUSPARCState *env); +void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno); /* sun4m.c, sun4u.c */ void cpu_check_irqs(CPUSPARCState *env); @@ -577,10 +577,10 @@ static inline int tlb_compare_context(const SparcTLBEntry *tlb, /* cpu-exec.c */ #if !defined(CONFIG_USER_ONLY) -void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, +void cpu_unassigned_access(CPUSPARCState *env1, target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size); #if defined(TARGET_SPARC64) -target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, +target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, int mmu_idx); #endif @@ -617,23 +617,23 @@ int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); #endif #if defined (TARGET_SPARC64) -static inline int cpu_has_hypervisor(CPUState *env1) +static inline int cpu_has_hypervisor(CPUSPARCState *env1) { return env1->def->features & CPU_FEATURE_HYPV; } -static inline int cpu_hypervisor_mode(CPUState *env1) +static inline int cpu_hypervisor_mode(CPUSPARCState *env1) { return cpu_has_hypervisor(env1) && (env1->hpstate & HS_PRIV); } -static inline int cpu_supervisor_mode(CPUState *env1) +static inline int cpu_supervisor_mode(CPUSPARCState *env1) { return env1->pstate & PS_PRIV; } #endif -static inline int cpu_mmu_index(CPUState *env1) +static inline int cpu_mmu_index(CPUSPARCState *env1) { #if defined(CONFIG_USER_ONLY) return MMU_USER_IDX; @@ -652,7 +652,7 @@ static inline int cpu_mmu_index(CPUState *env1) #endif } -static inline int cpu_interrupts_enabled(CPUState *env1) +static inline int cpu_interrupts_enabled(CPUSPARCState *env1) { #if !defined (TARGET_SPARC64) if (env1->psret != 0) @@ -665,7 +665,7 @@ static inline int cpu_interrupts_enabled(CPUState *env1) return 0; } -static inline int cpu_pil_allowed(CPUState *env1, int pil) +static inline int cpu_pil_allowed(CPUSPARCState *env1, int pil) { #if !defined(TARGET_SPARC64) /* level 15 is non-maskable on sparc v8 */ @@ -676,7 +676,7 @@ static inline int cpu_pil_allowed(CPUState *env1, int pil) } #if defined(CONFIG_USER_ONLY) -static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) +static inline void cpu_clone_regs(CPUSPARCState *env, target_ulong newsp) { if (newsp) env->regwptr[22] = newsp; @@ -694,13 +694,13 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) void cpu_tick_set_count(CPUTimer *timer, uint64_t count); uint64_t cpu_tick_get_count(CPUTimer *timer); void cpu_tick_set_limit(CPUTimer *timer, uint64_t limit); -trap_state* cpu_tsptr(CPUState* env); +trap_state* cpu_tsptr(CPUSPARCState* env); #endif #define TB_FLAG_FPU_ENABLED (1 << 4) #define TB_FLAG_AM_ENABLED (1 << 5) -static inline void cpu_get_tb_cpu_state(CPUState *env, target_ulong *pc, +static inline void cpu_get_tb_cpu_state(CPUSPARCState *env, target_ulong *pc, target_ulong *cs_base, int *flags) { *pc = env->pc; @@ -745,7 +745,7 @@ static inline bool tb_am_enabled(int tb_flags) #endif } -static inline bool cpu_has_work(CPUState *env1) +static inline bool cpu_has_work(CPUSPARCState *env1) { return (env1->interrupt_request & CPU_INTERRUPT_HARD) && cpu_interrupts_enabled(env1); @@ -753,7 +753,7 @@ static inline bool cpu_has_work(CPUState *env1) #include "exec-all.h" -static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb) +static inline void cpu_pc_from_tb(CPUSPARCState *env, TranslationBlock *tb) { env->pc = tb->pc; env->npc = tb->cs_base; diff --git a/target-sparc/cpu_init.c b/target-sparc/cpu_init.c index bb8b76178f..29132fb995 100644 --- a/target-sparc/cpu_init.c +++ b/target-sparc/cpu_init.c @@ -780,7 +780,7 @@ static void cpu_print_cc(FILE *f, fprintf_function cpu_fprintf, #define REGS_PER_LINE 8 #endif -void cpu_dump_state(CPUState *env, FILE *f, fprintf_function cpu_fprintf, +void cpu_dump_state(CPUSPARCState *env, FILE *f, fprintf_function cpu_fprintf, int flags) { int i, x; diff --git a/target-sparc/fop_helper.c b/target-sparc/fop_helper.c index c7a2512117..9c64ef89fe 100644 --- a/target-sparc/fop_helper.c +++ b/target-sparc/fop_helper.c @@ -23,7 +23,7 @@ #define QT0 (env->qt0) #define QT1 (env->qt1) -static void check_ieee_exceptions(CPUState *env) +static void check_ieee_exceptions(CPUSPARCState *env) { target_ulong status; @@ -57,15 +57,15 @@ static void check_ieee_exceptions(CPUState *env) } } -static inline void clear_float_exceptions(CPUState *env) +static inline void clear_float_exceptions(CPUSPARCState *env) { set_float_exception_flags(0, &env->fp_status); } -#define F_HELPER(name, p) void helper_f##name##p(CPUState *env) +#define F_HELPER(name, p) void helper_f##name##p(CPUSPARCState *env) #define F_BINOP(name) \ - float32 helper_f ## name ## s (CPUState *env, float32 src1, \ + float32 helper_f ## name ## s (CPUSPARCState *env, float32 src1, \ float32 src2) \ { \ float32 ret; \ @@ -74,7 +74,7 @@ static inline void clear_float_exceptions(CPUState *env) check_ieee_exceptions(env); \ return ret; \ } \ - float64 helper_f ## name ## d (CPUState * env, float64 src1,\ + float64 helper_f ## name ## d (CPUSPARCState * env, float64 src1,\ float64 src2) \ { \ float64 ret; \ @@ -96,7 +96,7 @@ F_BINOP(mul); F_BINOP(div); #undef F_BINOP -float64 helper_fsmuld(CPUState *env, float32 src1, float32 src2) +float64 helper_fsmuld(CPUSPARCState *env, float32 src1, float32 src2) { float64 ret; clear_float_exceptions(env); @@ -107,7 +107,7 @@ float64 helper_fsmuld(CPUState *env, float32 src1, float32 src2) return ret; } -void helper_fdmulq(CPUState *env, float64 src1, float64 src2) +void helper_fdmulq(CPUSPARCState *env, float64 src1, float64 src2) { clear_float_exceptions(env); QT0 = float128_mul(float64_to_float128(src1, &env->fp_status), @@ -134,7 +134,7 @@ F_HELPER(neg, q) #endif /* Integer to float conversion. */ -float32 helper_fitos(CPUState *env, int32_t src) +float32 helper_fitos(CPUSPARCState *env, int32_t src) { /* Inexact error possible converting int to float. */ float32 ret; @@ -144,20 +144,20 @@ float32 helper_fitos(CPUState *env, int32_t src) return ret; } -float64 helper_fitod(CPUState *env, int32_t src) +float64 helper_fitod(CPUSPARCState *env, int32_t src) { /* No possible exceptions converting int to double. */ return int32_to_float64(src, &env->fp_status); } -void helper_fitoq(CPUState *env, int32_t src) +void helper_fitoq(CPUSPARCState *env, int32_t src) { /* No possible exceptions converting int to long double. */ QT0 = int32_to_float128(src, &env->fp_status); } #ifdef TARGET_SPARC64 -float32 helper_fxtos(CPUState *env, int64_t src) +float32 helper_fxtos(CPUSPARCState *env, int64_t src) { float32 ret; clear_float_exceptions(env); @@ -166,7 +166,7 @@ float32 helper_fxtos(CPUState *env, int64_t src) return ret; } -float64 helper_fxtod(CPUState *env, int64_t src) +float64 helper_fxtod(CPUSPARCState *env, int64_t src) { float64 ret; clear_float_exceptions(env); @@ -175,7 +175,7 @@ float64 helper_fxtod(CPUState *env, int64_t src) return ret; } -void helper_fxtoq(CPUState *env, int64_t src) +void helper_fxtoq(CPUSPARCState *env, int64_t src) { /* No possible exceptions converting long long to long double. */ QT0 = int64_to_float128(src, &env->fp_status); @@ -184,7 +184,7 @@ void helper_fxtoq(CPUState *env, int64_t src) #undef F_HELPER /* floating point conversion */ -float32 helper_fdtos(CPUState *env, float64 src) +float32 helper_fdtos(CPUSPARCState *env, float64 src) { float32 ret; clear_float_exceptions(env); @@ -193,7 +193,7 @@ float32 helper_fdtos(CPUState *env, float64 src) return ret; } -float64 helper_fstod(CPUState *env, float32 src) +float64 helper_fstod(CPUSPARCState *env, float32 src) { float64 ret; clear_float_exceptions(env); @@ -202,7 +202,7 @@ float64 helper_fstod(CPUState *env, float32 src) return ret; } -float32 helper_fqtos(CPUState *env) +float32 helper_fqtos(CPUSPARCState *env) { float32 ret; clear_float_exceptions(env); @@ -211,14 +211,14 @@ float32 helper_fqtos(CPUState *env) return ret; } -void helper_fstoq(CPUState *env, float32 src) +void helper_fstoq(CPUSPARCState *env, float32 src) { clear_float_exceptions(env); QT0 = float32_to_float128(src, &env->fp_status); check_ieee_exceptions(env); } -float64 helper_fqtod(CPUState *env) +float64 helper_fqtod(CPUSPARCState *env) { float64 ret; clear_float_exceptions(env); @@ -227,7 +227,7 @@ float64 helper_fqtod(CPUState *env) return ret; } -void helper_fdtoq(CPUState *env, float64 src) +void helper_fdtoq(CPUSPARCState *env, float64 src) { clear_float_exceptions(env); QT0 = float64_to_float128(src, &env->fp_status); @@ -235,7 +235,7 @@ void helper_fdtoq(CPUState *env, float64 src) } /* Float to integer conversion. */ -int32_t helper_fstoi(CPUState *env, float32 src) +int32_t helper_fstoi(CPUSPARCState *env, float32 src) { int32_t ret; clear_float_exceptions(env); @@ -244,7 +244,7 @@ int32_t helper_fstoi(CPUState *env, float32 src) return ret; } -int32_t helper_fdtoi(CPUState *env, float64 src) +int32_t helper_fdtoi(CPUSPARCState *env, float64 src) { int32_t ret; clear_float_exceptions(env); @@ -253,7 +253,7 @@ int32_t helper_fdtoi(CPUState *env, float64 src) return ret; } -int32_t helper_fqtoi(CPUState *env) +int32_t helper_fqtoi(CPUSPARCState *env) { int32_t ret; clear_float_exceptions(env); @@ -263,7 +263,7 @@ int32_t helper_fqtoi(CPUState *env) } #ifdef TARGET_SPARC64 -int64_t helper_fstox(CPUState *env, float32 src) +int64_t helper_fstox(CPUSPARCState *env, float32 src) { int64_t ret; clear_float_exceptions(env); @@ -272,7 +272,7 @@ int64_t helper_fstox(CPUState *env, float32 src) return ret; } -int64_t helper_fdtox(CPUState *env, float64 src) +int64_t helper_fdtox(CPUSPARCState *env, float64 src) { int64_t ret; clear_float_exceptions(env); @@ -281,7 +281,7 @@ int64_t helper_fdtox(CPUState *env, float64 src) return ret; } -int64_t helper_fqtox(CPUState *env) +int64_t helper_fqtox(CPUSPARCState *env) { int64_t ret; clear_float_exceptions(env); @@ -302,13 +302,13 @@ float64 helper_fabsd(float64 src) return float64_abs(src); } -void helper_fabsq(CPUState *env) +void helper_fabsq(CPUSPARCState *env) { QT0 = float128_abs(QT1); } #endif -float32 helper_fsqrts(CPUState *env, float32 src) +float32 helper_fsqrts(CPUSPARCState *env, float32 src) { float32 ret; clear_float_exceptions(env); @@ -317,7 +317,7 @@ float32 helper_fsqrts(CPUState *env, float32 src) return ret; } -float64 helper_fsqrtd(CPUState *env, float64 src) +float64 helper_fsqrtd(CPUSPARCState *env, float64 src) { float64 ret; clear_float_exceptions(env); @@ -326,7 +326,7 @@ float64 helper_fsqrtd(CPUState *env, float64 src) return ret; } -void helper_fsqrtq(CPUState *env) +void helper_fsqrtq(CPUSPARCState *env) { clear_float_exceptions(env); QT0 = float128_sqrt(QT1, &env->fp_status); @@ -334,7 +334,7 @@ void helper_fsqrtq(CPUState *env) } #define GEN_FCMP(name, size, reg1, reg2, FS, E) \ - void glue(helper_, name) (CPUState *env) \ + void glue(helper_, name) (CPUSPARCState *env) \ { \ env->fsr &= FSR_FTT_NMASK; \ if (E && (glue(size, _is_any_nan)(reg1) || \ @@ -370,7 +370,7 @@ void helper_fsqrtq(CPUState *env) } \ } #define GEN_FCMP_T(name, size, FS, E) \ - void glue(helper_, name)(CPUState *env, size src1, size src2) \ + void glue(helper_, name)(CPUSPARCState *env, size src1, size src2) \ { \ env->fsr &= FSR_FTT_NMASK; \ if (E && (glue(size, _is_any_nan)(src1) || \ @@ -443,7 +443,7 @@ GEN_FCMP(fcmpeq_fcc3, float128, QT0, QT1, 26, 1); #undef GEN_FCMP_T #undef GEN_FCMP -static inline void set_fsr(CPUState *env) +static inline void set_fsr(CPUSPARCState *env) { int rnd_mode; @@ -465,14 +465,14 @@ static inline void set_fsr(CPUState *env) set_float_rounding_mode(rnd_mode, &env->fp_status); } -void helper_ldfsr(CPUState *env, uint32_t new_fsr) +void helper_ldfsr(CPUSPARCState *env, uint32_t new_fsr) { env->fsr = (new_fsr & FSR_LDFSR_MASK) | (env->fsr & FSR_LDFSR_OLDMASK); set_fsr(env); } #ifdef TARGET_SPARC64 -void helper_ldxfsr(CPUState *env, uint64_t new_fsr) +void helper_ldxfsr(CPUSPARCState *env, uint64_t new_fsr) { env->fsr = (new_fsr & FSR_LDXFSR_MASK) | (env->fsr & FSR_LDXFSR_OLDMASK); set_fsr(env); diff --git a/target-sparc/helper.c b/target-sparc/helper.c index 037a72ce4e..65e1740e19 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -22,13 +22,13 @@ #include "helper.h" #include "sysemu.h" -void helper_raise_exception(CPUState *env, int tt) +void helper_raise_exception(CPUSPARCState *env, int tt) { env->exception_index = tt; cpu_loop_exit(env); } -void helper_debug(CPUState *env) +void helper_debug(CPUSPARCState *env) { env->exception_index = EXCP_DEBUG; cpu_loop_exit(env); @@ -64,7 +64,7 @@ void helper_tick_set_limit(void *opaque, uint64_t limit) } #endif -static target_ulong helper_udiv_common(CPUState *env, target_ulong a, +static target_ulong helper_udiv_common(CPUSPARCState *env, target_ulong a, target_ulong b, int cc) { int overflow = 0; @@ -92,17 +92,17 @@ static target_ulong helper_udiv_common(CPUState *env, target_ulong a, return x0; } -target_ulong helper_udiv(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_udiv(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_udiv_common(env, a, b, 0); } -target_ulong helper_udiv_cc(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_udiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_udiv_common(env, a, b, 1); } -static target_ulong helper_sdiv_common(CPUState *env, target_ulong a, +static target_ulong helper_sdiv_common(CPUSPARCState *env, target_ulong a, target_ulong b, int cc) { int overflow = 0; @@ -130,12 +130,12 @@ static target_ulong helper_sdiv_common(CPUState *env, target_ulong a, return x0; } -target_ulong helper_sdiv(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_sdiv(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_sdiv_common(env, a, b, 0); } -target_ulong helper_sdiv_cc(CPUState *env, target_ulong a, target_ulong b) +target_ulong helper_sdiv_cc(CPUSPARCState *env, target_ulong a, target_ulong b) { return helper_sdiv_common(env, a, b, 1); } diff --git a/target-sparc/int32_helper.c b/target-sparc/int32_helper.c index ac9d01ecba..5e33d50e23 100644 --- a/target-sparc/int32_helper.c +++ b/target-sparc/int32_helper.c @@ -58,7 +58,7 @@ static const char * const excp_names[0x80] = { }; #endif -void do_interrupt(CPUState *env) +void do_interrupt(CPUSPARCState *env) { int cwp, intno = env->exception_index; @@ -132,7 +132,7 @@ void do_interrupt(CPUState *env) } #if !defined(CONFIG_USER_ONLY) -static void leon3_cache_control_int(CPUState *env) +static void leon3_cache_control_int(CPUSPARCState *env) { uint32_t state = 0; @@ -161,7 +161,7 @@ static void leon3_cache_control_int(CPUState *env) } } -void leon3_irq_manager(CPUState *env, void *irq_manager, int intno) +void leon3_irq_manager(CPUSPARCState *env, void *irq_manager, int intno) { leon3_irq_ack(irq_manager, intno); leon3_cache_control_int(env); diff --git a/target-sparc/int64_helper.c b/target-sparc/int64_helper.c index 1d471db999..5e3eff76dd 100644 --- a/target-sparc/int64_helper.c +++ b/target-sparc/int64_helper.c @@ -59,7 +59,7 @@ static const char * const excp_names[0x80] = { }; #endif -void do_interrupt(CPUState *env) +void do_interrupt(CPUSPARCState *env) { int intno = env->exception_index; trap_state *tsptr; @@ -160,12 +160,12 @@ void do_interrupt(CPUState *env) env->exception_index = -1; } -trap_state *cpu_tsptr(CPUState* env) +trap_state *cpu_tsptr(CPUSPARCState* env) { return &env->ts[env->tl & MAXTL_MASK]; } -static bool do_modify_softint(CPUState *env, uint32_t value) +static bool do_modify_softint(CPUSPARCState *env, uint32_t value) { if (env->softint != value) { env->softint = value; @@ -179,21 +179,21 @@ static bool do_modify_softint(CPUState *env, uint32_t value) return false; } -void helper_set_softint(CPUState *env, uint64_t value) +void helper_set_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, env->softint | (uint32_t)value)) { trace_int_helper_set_softint(env->softint); } } -void helper_clear_softint(CPUState *env, uint64_t value) +void helper_clear_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, env->softint & (uint32_t)~value)) { trace_int_helper_clear_softint(env->softint); } } -void helper_write_softint(CPUState *env, uint64_t value) +void helper_write_softint(CPUSPARCState *env, uint64_t value) { if (do_modify_softint(env, (uint32_t)value)) { trace_int_helper_write_softint(env->softint); diff --git a/target-sparc/ldst_helper.c b/target-sparc/ldst_helper.c index b59707ecd2..48d433c571 100644 --- a/target-sparc/ldst_helper.c +++ b/target-sparc/ldst_helper.c @@ -129,7 +129,7 @@ static uint64_t ultrasparc_tag_target(uint64_t tag_access_register) static void replace_tlb_entry(SparcTLBEntry *tlb, uint64_t tlb_tag, uint64_t tlb_tte, - CPUState *env1) + CPUSPARCState *env1) { target_ulong mask, size, va, offset; @@ -152,7 +152,7 @@ static void replace_tlb_entry(SparcTLBEntry *tlb, } static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, - const char *strmmu, CPUState *env1) + const char *strmmu, CPUSPARCState *env1) { unsigned int i; target_ulong mask; @@ -213,7 +213,7 @@ static void demap_tlb(SparcTLBEntry *tlb, target_ulong demap_addr, static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, uint64_t tlb_tag, uint64_t tlb_tte, - const char *strmmu, CPUState *env1) + const char *strmmu, CPUSPARCState *env1) { unsigned int i, replace_used; @@ -263,7 +263,7 @@ static void replace_tlb_1bit_lru(SparcTLBEntry *tlb, #endif -static inline target_ulong address_mask(CPUState *env1, target_ulong addr) +static inline target_ulong address_mask(CPUSPARCState *env1, target_ulong addr) { #ifdef TARGET_SPARC64 if (AM_CHECK(env1)) { @@ -300,7 +300,7 @@ static inline int is_translating_asi(int asi) #endif } -static inline target_ulong asi_address_mask(CPUState *env1, +static inline target_ulong asi_address_mask(CPUSPARCState *env1, int asi, target_ulong addr) { if (is_translating_asi(asi)) { @@ -323,7 +323,7 @@ void helper_check_align(target_ulong addr, uint32_t align) #if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) && \ defined(DEBUG_MXCC) -static void dump_mxcc(CPUState *env) +static void dump_mxcc(CPUSPARCState *env) { printf("mxccdata: %016" PRIx64 " %016" PRIx64 " %016" PRIx64 " %016" PRIx64 "\n", @@ -2358,10 +2358,10 @@ static void do_unassigned_access(target_phys_addr_t addr, int is_write, #endif #if !defined(CONFIG_USER_ONLY) -void cpu_unassigned_access(CPUState *env1, target_phys_addr_t addr, +void cpu_unassigned_access(CPUSPARCState *env1, target_phys_addr_t addr, int is_write, int is_exec, int is_asi, int size) { - CPUState *saved_env; + CPUSPARCState *saved_env; saved_env = env; env = env1; diff --git a/target-sparc/machine.c b/target-sparc/machine.c index 235b088a45..eb4d87f158 100644 --- a/target-sparc/machine.c +++ b/target-sparc/machine.c @@ -6,7 +6,7 @@ void cpu_save(QEMUFile *f, void *opaque) { - CPUState *env = opaque; + CPUSPARCState *env = opaque; int i; uint32_t tmp; @@ -111,7 +111,7 @@ void cpu_save(QEMUFile *f, void *opaque) int cpu_load(QEMUFile *f, void *opaque, int version_id) { - CPUState *env = opaque; + CPUSPARCState *env = opaque; int i; uint32_t tmp; diff --git a/target-sparc/mmu_helper.c b/target-sparc/mmu_helper.c index bdff1c3254..11fb9f5de6 100644 --- a/target-sparc/mmu_helper.c +++ b/target-sparc/mmu_helper.c @@ -25,7 +25,7 @@ #if defined(CONFIG_USER_ONLY) -int cpu_sparc_handle_mmu_fault(CPUState *env1, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env1, target_ulong address, int rw, int mmu_idx) { if (rw & 2) { @@ -76,7 +76,7 @@ static const int perm_table[2][8] = { } }; -static int get_physical_address(CPUState *env, target_phys_addr_t *physical, +static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int mmu_idx, target_ulong *page_size) @@ -198,7 +198,7 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, } /* Perform address translation */ -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, int mmu_idx) { target_phys_addr_t paddr; @@ -244,7 +244,7 @@ int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, } } -target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) +target_ulong mmu_probe(CPUSPARCState *env, target_ulong address, int mmulev) { target_phys_addr_t pde_ptr; uint32_t pde; @@ -310,7 +310,7 @@ target_ulong mmu_probe(CPUState *env, target_ulong address, int mmulev) return 0; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) { target_ulong va, va1, va2; unsigned int n, m, o; @@ -354,7 +354,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) * reads (and only reads) in stack frames as if windows were flushed. We assume * that the sparc ABI is followed. */ -int target_memory_rw_debug(CPUState *env, target_ulong addr, +int target_memory_rw_debug(CPUSPARCState *env, target_ulong addr, uint8_t *buf, int len, int is_write) { int i; @@ -479,7 +479,7 @@ static inline int ultrasparc_tag_match(SparcTLBEntry *tlb, return 0; } -static int get_physical_address_data(CPUState *env, +static int get_physical_address_data(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int rw, int mmu_idx) { @@ -598,7 +598,7 @@ static int get_physical_address_data(CPUState *env, return 1; } -static int get_physical_address_code(CPUState *env, +static int get_physical_address_code(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, target_ulong address, int mmu_idx) { @@ -667,7 +667,7 @@ static int get_physical_address_code(CPUState *env, return 1; } -static int get_physical_address(CPUState *env, target_phys_addr_t *physical, +static int get_physical_address(CPUSPARCState *env, target_phys_addr_t *physical, int *prot, int *access_index, target_ulong address, int rw, int mmu_idx, target_ulong *page_size) @@ -701,7 +701,7 @@ static int get_physical_address(CPUState *env, target_phys_addr_t *physical, } /* Perform address translation */ -int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, +int cpu_sparc_handle_mmu_fault(CPUSPARCState *env, target_ulong address, int rw, int mmu_idx) { target_ulong virt_addr, vaddr; @@ -727,7 +727,7 @@ int cpu_sparc_handle_mmu_fault(CPUState *env, target_ulong address, int rw, return 1; } -void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) +void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUSPARCState *env) { unsigned int i; const char *mask; @@ -813,7 +813,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUState *env) #endif /* TARGET_SPARC64 */ -static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, +static int cpu_sparc_get_phys_page(CPUSPARCState *env, target_phys_addr_t *phys, target_ulong addr, int rw, int mmu_idx) { target_ulong page_size; @@ -824,7 +824,7 @@ static int cpu_sparc_get_phys_page(CPUState *env, target_phys_addr_t *phys, } #if defined(TARGET_SPARC64) -target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, +target_phys_addr_t cpu_get_phys_page_nofault(CPUSPARCState *env, target_ulong addr, int mmu_idx) { target_phys_addr_t phys_addr; @@ -836,7 +836,7 @@ target_phys_addr_t cpu_get_phys_page_nofault(CPUState *env, target_ulong addr, } #endif -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) +target_phys_addr_t cpu_get_phys_page_debug(CPUSPARCState *env, target_ulong addr) { target_phys_addr_t phys_addr; int mmu_idx = cpu_mmu_index(env); diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index 02b660ddf9..1aff12516e 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -54,11 +54,11 @@ static void do_unaligned_access(target_ulong addr, int is_write, int is_user, NULL, it means that the function was called in C code (i.e. not from generated code or from helper.c) */ /* XXX: fix it to restore all registers */ -void tlb_fill(CPUState *env1, target_ulong addr, int is_write, int mmu_idx, +void tlb_fill(CPUSPARCState *env1, target_ulong addr, int is_write, int mmu_idx, void *retaddr) { int ret; - CPUState *saved_env; + CPUSPARCState *saved_env; saved_env = env; env = env1; diff --git a/target-sparc/translate.c b/target-sparc/translate.c index d26111209e..ef176e94b3 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -2209,7 +2209,7 @@ static inline void gen_load_trap_state_at_tl(TCGv_ptr r_tsptr, TCGv_ptr cpu_env) /* calculate offset to current trap state from env->ts, reuse r_tl */ tcg_gen_muli_i32(r_tl, r_tl, sizeof (trap_state)); - tcg_gen_addi_ptr(r_tsptr, cpu_env, offsetof(CPUState, ts)); + tcg_gen_addi_ptr(r_tsptr, cpu_env, offsetof(CPUSPARCState, ts)); /* tsptr = env->ts[env->tl & MAXTL_MASK] */ { @@ -2600,7 +2600,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_movl_TN_reg(rd, cpu_dst); @@ -2639,7 +2639,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_get_count(cpu_dst, r_tickptr); tcg_temp_free_ptr(r_tickptr); gen_movl_TN_reg(rd, cpu_dst); @@ -2752,7 +2752,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_get_count(cpu_tmp0, r_tickptr); gen_movl_TN_reg(rd, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); @@ -3712,7 +3712,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_set_limit(r_tickptr, cpu_tick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -3730,7 +3730,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_set_count(r_tickptr, cpu_dst); tcg_temp_free_ptr(r_tickptr); @@ -3748,7 +3748,7 @@ static void disas_sparc_insn(DisasContext * dc) cpu_src2); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, stick)); + offsetof(CPUSPARCState, stick)); gen_helper_tick_set_limit(r_tickptr, cpu_stick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -3857,7 +3857,7 @@ static void disas_sparc_insn(DisasContext * dc) r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, tick)); + offsetof(CPUSPARCState, tick)); gen_helper_tick_set_count(r_tickptr, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); @@ -3985,7 +3985,7 @@ static void disas_sparc_insn(DisasContext * dc) tcg_gen_mov_tl(cpu_hstick_cmpr, cpu_tmp0); r_tickptr = tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, - offsetof(CPUState, hstick)); + offsetof(CPUSPARCState, hstick)); gen_helper_tick_set_limit(r_tickptr, cpu_hstick_cmpr); tcg_temp_free_ptr(r_tickptr); @@ -5045,13 +5045,13 @@ static void disas_sparc_insn(DisasContext * dc) case 0x25: /* stfsr, V9 stxfsr */ #ifdef TARGET_SPARC64 gen_address_mask(dc, cpu_addr); - tcg_gen_ld_i64(cpu_tmp64, cpu_env, offsetof(CPUState, fsr)); + tcg_gen_ld_i64(cpu_tmp64, cpu_env, offsetof(CPUSPARCState, fsr)); if (rd == 1) tcg_gen_qemu_st64(cpu_tmp64, cpu_addr, dc->mem_idx); else tcg_gen_qemu_st32(cpu_tmp64, cpu_addr, dc->mem_idx); #else - tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUState, fsr)); + tcg_gen_ld_i32(cpu_tmp32, cpu_env, offsetof(CPUSPARCState, fsr)); tcg_gen_qemu_st32(cpu_tmp32, cpu_addr, dc->mem_idx); #endif break; @@ -5403,75 +5403,75 @@ void gen_intermediate_code_init(CPUSPARCState *env) cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); cpu_regwptr = tcg_global_mem_new_ptr(TCG_AREG0, - offsetof(CPUState, regwptr), + offsetof(CPUSPARCState, regwptr), "regwptr"); #ifdef TARGET_SPARC64 - cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, xcc), + cpu_xcc = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, xcc), "xcc"); - cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, asi), + cpu_asi = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, asi), "asi"); - cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, fprs), + cpu_fprs = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, fprs), "fprs"); - cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, gsr), + cpu_gsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, gsr), "gsr"); cpu_tick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, tick_cmpr), + offsetof(CPUSPARCState, tick_cmpr), "tick_cmpr"); cpu_stick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, stick_cmpr), + offsetof(CPUSPARCState, stick_cmpr), "stick_cmpr"); cpu_hstick_cmpr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, hstick_cmpr), + offsetof(CPUSPARCState, hstick_cmpr), "hstick_cmpr"); - cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, hintp), + cpu_hintp = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hintp), "hintp"); - cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, htba), + cpu_htba = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, htba), "htba"); - cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, hver), + cpu_hver = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, hver), "hver"); cpu_ssr = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, ssr), "ssr"); + offsetof(CPUSPARCState, ssr), "ssr"); cpu_ver = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, version), "ver"); + offsetof(CPUSPARCState, version), "ver"); cpu_softint = tcg_global_mem_new_i32(TCG_AREG0, - offsetof(CPUState, softint), + offsetof(CPUSPARCState, softint), "softint"); #else - cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, wim), + cpu_wim = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, wim), "wim"); #endif - cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cond), + cpu_cond = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cond), "cond"); - cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_src), + cpu_cc_src = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_src), "cc_src"); cpu_cc_src2 = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, cc_src2), + offsetof(CPUSPARCState, cc_src2), "cc_src2"); - cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, cc_dst), + cpu_cc_dst = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, cc_dst), "cc_dst"); - cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, cc_op), + cpu_cc_op = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, cc_op), "cc_op"); - cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUState, psr), + cpu_psr = tcg_global_mem_new_i32(TCG_AREG0, offsetof(CPUSPARCState, psr), "psr"); - cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, fsr), + cpu_fsr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, fsr), "fsr"); - cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, pc), + cpu_pc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, pc), "pc"); - cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, npc), + cpu_npc = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, npc), "npc"); - cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, y), "y"); + cpu_y = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, y), "y"); #ifndef CONFIG_USER_ONLY - cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUState, tbr), + cpu_tbr = tcg_global_mem_new(TCG_AREG0, offsetof(CPUSPARCState, tbr), "tbr"); #endif for (i = 1; i < 8; i++) { cpu_gregs[i] = tcg_global_mem_new(TCG_AREG0, - offsetof(CPUState, gregs[i]), + offsetof(CPUSPARCState, gregs[i]), gregnames[i]); } for (i = 0; i < TARGET_DPREGS; i++) { cpu_fpr[i] = tcg_global_mem_new_i64(TCG_AREG0, - offsetof(CPUState, fpr[i]), + offsetof(CPUSPARCState, fpr[i]), fregnames[i]); } @@ -5482,7 +5482,7 @@ void gen_intermediate_code_init(CPUSPARCState *env) } } -void restore_state_to_opc(CPUState *env, TranslationBlock *tb, int pc_pos) +void restore_state_to_opc(CPUSPARCState *env, TranslationBlock *tb, int pc_pos) { target_ulong npc; env->pc = gen_opc_pc[pc_pos]; diff --git a/target-sparc/win_helper.c b/target-sparc/win_helper.c index a68c649e7e..3e82eb71d6 100644 --- a/target-sparc/win_helper.c +++ b/target-sparc/win_helper.c @@ -33,7 +33,7 @@ static inline void memcpy32(target_ulong *dst, const target_ulong *src) dst[7] = src[7]; } -void cpu_set_cwp(CPUState *env, int new_cwp) +void cpu_set_cwp(CPUSPARCState *env, int new_cwp) { /* put the modified wrap registers at their proper location */ if (env->cwp == env->nwindows - 1) { @@ -48,7 +48,7 @@ void cpu_set_cwp(CPUState *env, int new_cwp) env->regwptr = env->regbase + (new_cwp * 16); } -target_ulong cpu_get_psr(CPUState *env) +target_ulong cpu_get_psr(CPUSPARCState *env) { helper_compute_psr(env); @@ -64,7 +64,7 @@ target_ulong cpu_get_psr(CPUState *env) #endif } -void cpu_put_psr(CPUState *env, target_ulong val) +void cpu_put_psr(CPUSPARCState *env, target_ulong val) { env->psr = val & PSR_ICC; #if !defined(TARGET_SPARC64) @@ -83,7 +83,7 @@ void cpu_put_psr(CPUState *env, target_ulong val) env->cc_op = CC_OP_FLAGS; } -int cpu_cwp_inc(CPUState *env, int cwp) +int cpu_cwp_inc(CPUSPARCState *env, int cwp) { if (unlikely(cwp >= env->nwindows)) { cwp -= env->nwindows; @@ -91,7 +91,7 @@ int cpu_cwp_inc(CPUState *env, int cwp) return cwp; } -int cpu_cwp_dec(CPUState *env, int cwp) +int cpu_cwp_dec(CPUSPARCState *env, int cwp) { if (unlikely(cwp < 0)) { cwp += env->nwindows; @@ -100,7 +100,7 @@ int cpu_cwp_dec(CPUState *env, int cwp) } #ifndef TARGET_SPARC64 -void helper_rett(CPUState *env) +void helper_rett(CPUSPARCState *env) { unsigned int cwp; @@ -119,7 +119,7 @@ void helper_rett(CPUState *env) /* XXX: use another pointer for %iN registers to avoid slow wrapping handling ? */ -void helper_save(CPUState *env) +void helper_save(CPUSPARCState *env) { uint32_t cwp; @@ -130,7 +130,7 @@ void helper_save(CPUState *env) cpu_set_cwp(env, cwp); } -void helper_restore(CPUState *env) +void helper_restore(CPUSPARCState *env) { uint32_t cwp; @@ -141,7 +141,7 @@ void helper_restore(CPUState *env) cpu_set_cwp(env, cwp); } -void helper_wrpsr(CPUState *env, target_ulong new_psr) +void helper_wrpsr(CPUSPARCState *env, target_ulong new_psr) { if ((new_psr & PSR_CWP) >= env->nwindows) { helper_raise_exception(env, TT_ILL_INSN); @@ -150,7 +150,7 @@ void helper_wrpsr(CPUState *env, target_ulong new_psr) } } -target_ulong helper_rdpsr(CPUState *env) +target_ulong helper_rdpsr(CPUSPARCState *env) { return cpu_get_psr(env); } @@ -158,7 +158,7 @@ target_ulong helper_rdpsr(CPUState *env) #else /* XXX: use another pointer for %iN registers to avoid slow wrapping handling ? */ -void helper_save(CPUState *env) +void helper_save(CPUSPARCState *env) { uint32_t cwp; @@ -180,7 +180,7 @@ void helper_save(CPUState *env) } } -void helper_restore(CPUState *env) +void helper_restore(CPUSPARCState *env) { uint32_t cwp; @@ -197,7 +197,7 @@ void helper_restore(CPUState *env) } } -void helper_flushw(CPUState *env) +void helper_flushw(CPUSPARCState *env) { if (env->cansave != env->nwindows - 2) { helper_raise_exception(env, TT_SPILL | (env->otherwin != 0 ? @@ -207,7 +207,7 @@ void helper_flushw(CPUState *env) } } -void helper_saved(CPUState *env) +void helper_saved(CPUSPARCState *env) { env->cansave++; if (env->otherwin == 0) { @@ -217,7 +217,7 @@ void helper_saved(CPUState *env) } } -void helper_restored(CPUState *env) +void helper_restored(CPUSPARCState *env) { env->canrestore++; if (env->cleanwin < env->nwindows - 1) { @@ -230,7 +230,7 @@ void helper_restored(CPUState *env) } } -target_ulong cpu_get_ccr(CPUState *env) +target_ulong cpu_get_ccr(CPUSPARCState *env) { target_ulong psr; @@ -239,19 +239,19 @@ target_ulong cpu_get_ccr(CPUState *env) return ((env->xcc >> 20) << 4) | ((psr & PSR_ICC) >> 20); } -void cpu_put_ccr(CPUState *env, target_ulong val) +void cpu_put_ccr(CPUSPARCState *env, target_ulong val) { env->xcc = (val >> 4) << 20; env->psr = (val & 0xf) << 20; CC_OP = CC_OP_FLAGS; } -target_ulong cpu_get_cwp64(CPUState *env) +target_ulong cpu_get_cwp64(CPUSPARCState *env) { return env->nwindows - 1 - env->cwp; } -void cpu_put_cwp64(CPUState *env, int cwp) +void cpu_put_cwp64(CPUSPARCState *env, int cwp) { if (unlikely(cwp >= env->nwindows || cwp < 0)) { cwp %= env->nwindows; @@ -259,29 +259,29 @@ void cpu_put_cwp64(CPUState *env, int cwp) cpu_set_cwp(env, env->nwindows - 1 - cwp); } -target_ulong helper_rdccr(CPUState *env) +target_ulong helper_rdccr(CPUSPARCState *env) { return cpu_get_ccr(env); } -void helper_wrccr(CPUState *env, target_ulong new_ccr) +void helper_wrccr(CPUSPARCState *env, target_ulong new_ccr) { cpu_put_ccr(env, new_ccr); } /* CWP handling is reversed in V9, but we still use the V8 register order. */ -target_ulong helper_rdcwp(CPUState *env) +target_ulong helper_rdcwp(CPUSPARCState *env) { return cpu_get_cwp64(env); } -void helper_wrcwp(CPUState *env, target_ulong new_cwp) +void helper_wrcwp(CPUSPARCState *env, target_ulong new_cwp) { cpu_put_cwp64(env, new_cwp); } -static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate) +static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate) { switch (pstate) { default: @@ -298,7 +298,7 @@ static inline uint64_t *get_gregset(CPUState *env, uint32_t pstate) } } -void cpu_change_pstate(CPUState *env, uint32_t new_pstate) +void cpu_change_pstate(CPUSPARCState *env, uint32_t new_pstate) { uint32_t pstate_regs, new_pstate_regs; uint64_t *src, *dst; @@ -325,7 +325,7 @@ void cpu_change_pstate(CPUState *env, uint32_t new_pstate) env->pstate = new_pstate; } -void helper_wrpstate(CPUState *env, target_ulong new_state) +void helper_wrpstate(CPUSPARCState *env, target_ulong new_state) { cpu_change_pstate(env, new_state & 0xf3f); @@ -336,7 +336,7 @@ void helper_wrpstate(CPUState *env, target_ulong new_state) #endif } -void helper_wrpil(CPUState *env, target_ulong new_pil) +void helper_wrpil(CPUSPARCState *env, target_ulong new_pil) { #if !defined(CONFIG_USER_ONLY) trace_win_helper_wrpil(env->psrpil, (uint32_t)new_pil); @@ -349,7 +349,7 @@ void helper_wrpil(CPUState *env, target_ulong new_pil) #endif } -void helper_done(CPUState *env) +void helper_done(CPUSPARCState *env) { trap_state *tsptr = cpu_tsptr(env); @@ -370,7 +370,7 @@ void helper_done(CPUState *env) #endif } -void helper_retry(CPUState *env) +void helper_retry(CPUSPARCState *env) { trap_state *tsptr = cpu_tsptr(env); |