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-rw-r--r--cpu-exec.c6
-rw-r--r--target-xtensa/cpu-qom.h1
-rw-r--r--target-xtensa/cpu.c1
-rw-r--r--target-xtensa/helper.c10
4 files changed, 12 insertions, 6 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index fe313b48f3..304867d4bd 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -669,12 +669,6 @@ int cpu_exec(CPUArchState *env)
cc->do_interrupt(cpu);
next_tb = 0;
}
-#elif defined(TARGET_XTENSA)
- if (interrupt_request & CPU_INTERRUPT_HARD) {
- cpu->exception_index = EXC_IRQ;
- cc->do_interrupt(cpu);
- next_tb = 0;
- }
#endif
/* The target hook has 3 exit conditions:
False when the interrupt isn't processed,
diff --git a/target-xtensa/cpu-qom.h b/target-xtensa/cpu-qom.h
index f320486a68..9de5c6eb9f 100644
--- a/target-xtensa/cpu-qom.h
+++ b/target-xtensa/cpu-qom.h
@@ -84,6 +84,7 @@ static inline XtensaCPU *xtensa_env_get_cpu(const CPUXtensaState *env)
#define ENV_OFFSET offsetof(XtensaCPU, env)
void xtensa_cpu_do_interrupt(CPUState *cpu);
+bool xtensa_cpu_exec_interrupt(CPUState *cpu, int interrupt_request);
void xtensa_cpu_dump_state(CPUState *cpu, FILE *f,
fprintf_function cpu_fprintf, int flags);
hwaddr xtensa_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
diff --git a/target-xtensa/cpu.c b/target-xtensa/cpu.c
index 936d526d41..51c41d526d 100644
--- a/target-xtensa/cpu.c
+++ b/target-xtensa/cpu.c
@@ -142,6 +142,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
cc->class_by_name = xtensa_cpu_class_by_name;
cc->has_work = xtensa_cpu_has_work;
cc->do_interrupt = xtensa_cpu_do_interrupt;
+ cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
cc->dump_state = xtensa_cpu_dump_state;
cc->set_pc = xtensa_cpu_set_pc;
cc->gdb_read_register = xtensa_cpu_gdb_read_register;
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index 6671e40289..d84d259cf8 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -256,6 +256,16 @@ void xtensa_cpu_do_interrupt(CPUState *cs)
check_interrupts(env);
}
+bool xtensa_cpu_exec_interrupt(CPUState *cs, int interrupt_request)
+{
+ if (interrupt_request & CPU_INTERRUPT_HARD) {
+ cs->exception_index = EXC_IRQ;
+ xtensa_cpu_do_interrupt(cs);
+ return true;
+ }
+ return false;
+}
+
static void reset_tlb_mmu_all_ways(CPUXtensaState *env,
const xtensa_tlb *tlb, xtensa_tlb_entry entry[][MAX_TLB_WAY_SIZE])
{