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-rw-r--r--target-arm/translate.c2
-rw-r--r--target-arm/translate.h2
2 files changed, 3 insertions, 1 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 450a0b6d28..2605833685 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -61,7 +61,7 @@ static uint32_t gen_opc_condexec_bits[OPC_BUF_SIZE];
#define DISAS_WFI 4
#define DISAS_SWI 5
-static TCGv_ptr cpu_env;
+TCGv_ptr cpu_env;
/* We reuse the same 64-bit temporaries for efficiency. */
static TCGv_i64 cpu_V0, cpu_V1, cpu_M0;
static TCGv_i32 cpu_R[16];
diff --git a/target-arm/translate.h b/target-arm/translate.h
index e727bc66fe..8ba14339a9 100644
--- a/target-arm/translate.h
+++ b/target-arm/translate.h
@@ -24,4 +24,6 @@ typedef struct DisasContext {
int vec_stride;
} DisasContext;
+extern TCGv_ptr cpu_env;
+
#endif /* TARGET_ARM_TRANSLATE_H */