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-rw-r--r--target/hppa/gdbstub.c2
-rw-r--r--target/hppa/op_helper.c14
-rw-r--r--target/hppa/translate.c2
3 files changed, 11 insertions, 7 deletions
diff --git a/target/hppa/gdbstub.c b/target/hppa/gdbstub.c
index e2e9c4d77f..3157a690f2 100644
--- a/target/hppa/gdbstub.c
+++ b/target/hppa/gdbstub.c
@@ -266,7 +266,7 @@ int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
case 65 ... 127:
{
uint64_t *fr = &env->fr[(n - 64) / 2];
- *fr = deposit64(*fr, val, (n & 1 ? 0 : 32), 32);
+ *fr = deposit64(*fr, (n & 1 ? 0 : 32), 32, val);
}
break;
default:
diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c
index 912e8d5be4..6bf478e7b0 100644
--- a/target/hppa/op_helper.c
+++ b/target/hppa/op_helper.c
@@ -665,11 +665,15 @@ void HELPER(reset)(CPUHPPAState *env)
target_ureg HELPER(swap_system_mask)(CPUHPPAState *env, target_ureg nsm)
{
target_ulong psw = env->psw;
- /* ??? On second reading this condition simply seems
- to be undefined rather than a diagnosed trap. */
- if (nsm & ~psw & PSW_Q) {
- hppa_dynamic_excp(env, EXCP_ILL, GETPC());
- }
+ /*
+ * Setting the PSW Q bit to 1, if it was not already 1, is an
+ * undefined operation.
+ *
+ * However, HP-UX 10.20 does this with the SSM instruction.
+ * Tested this on HP9000/712 and HP9000/785/C3750 and both
+ * machines set the Q bit from 0 to 1 without an exception,
+ * so let this go without comment.
+ */
env->psw = (psw & ~PSW_SM) | (nsm & PSW_SM);
return psw & PSW_SM;
}
diff --git a/target/hppa/translate.c b/target/hppa/translate.c
index ce05d5619d..51bfd9849d 100644
--- a/target/hppa/translate.c
+++ b/target/hppa/translate.c
@@ -2059,7 +2059,7 @@ static DisasJumpType trans_mfctl(DisasContext *ctx, uint32_t insn,
/* FIXME: Respect PSW_S bit. */
nullify_over(ctx);
tmp = dest_gpr(ctx, rt);
- if (ctx->base.tb->cflags & CF_USE_ICOUNT) {
+ if (tb_cflags(ctx->base.tb) & CF_USE_ICOUNT) {
gen_io_start();
gen_helper_read_interval_timer(tmp);
gen_io_end();