diff options
| -rw-r--r-- | hw/apb_pci.c | 3 | ||||
| -rw-r--r-- | hw/pci_host.c | 12 | ||||
| -rw-r--r-- | hw/unin_pci.c | 6 | ||||
| -rw-r--r-- | rwhandler.c | 4 | ||||
| -rw-r--r-- | rwhandler.h | 2 |
5 files changed, 17 insertions, 10 deletions
diff --git a/hw/apb_pci.c b/hw/apb_pci.c index bf00c71d63..84e9af76a2 100644 --- a/hw/apb_pci.c +++ b/hw/apb_pci.c @@ -418,7 +418,8 @@ static int pci_pbm_init_device(SysBusDevice *dev) /* PCI configuration space */ s->pci_config_handler.read = apb_pci_config_read; s->pci_config_handler.write = apb_pci_config_write; - pci_config = cpu_register_io_memory_simple(&s->pci_config_handler); + pci_config = cpu_register_io_memory_simple(&s->pci_config_handler, + DEVICE_NATIVE_ENDIAN); assert(pci_config >= 0); /* at region 1 */ sysbus_init_mmio(dev, 0x1000000ULL, pci_config); diff --git a/hw/pci_host.c b/hw/pci_host.c index bc5b77193d..a6e39c915c 100644 --- a/hw/pci_host.c +++ b/hw/pci_host.c @@ -187,9 +187,11 @@ int pci_host_conf_register_mmio(PCIHostState *s, int swap) { pci_host_init(s); if (swap) { - return cpu_register_io_memory_simple(&s->conf_handler); + return cpu_register_io_memory_simple(&s->conf_handler, + DEVICE_NATIVE_ENDIAN); } else { - return cpu_register_io_memory_simple(&s->conf_noswap_handler); + return cpu_register_io_memory_simple(&s->conf_noswap_handler, + DEVICE_NATIVE_ENDIAN); } } @@ -203,9 +205,11 @@ int pci_host_data_register_mmio(PCIHostState *s, int swap) { pci_host_init(s); if (swap) { - return cpu_register_io_memory_simple(&s->data_handler); + return cpu_register_io_memory_simple(&s->data_handler, + DEVICE_NATIVE_ENDIAN); } else { - return cpu_register_io_memory_simple(&s->data_noswap_handler); + return cpu_register_io_memory_simple(&s->data_noswap_handler, + DEVICE_NATIVE_ENDIAN); } } diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 1310211aec..53791dd070 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -154,7 +154,8 @@ static int pci_unin_main_init_device(SysBusDevice *dev) pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1); s->data_handler.read = unin_data_read; s->data_handler.write = unin_data_write; - pci_mem_data = cpu_register_io_memory_simple(&s->data_handler); + pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, + DEVICE_NATIVE_ENDIAN); sysbus_init_mmio(dev, 0x1000, pci_mem_config); sysbus_init_mmio(dev, 0x1000, pci_mem_data); @@ -175,7 +176,8 @@ static int pci_u3_agp_init_device(SysBusDevice *dev) pci_mem_config = pci_host_conf_register_mmio(&s->host_state, 1); s->data_handler.read = unin_data_read; s->data_handler.write = unin_data_write; - pci_mem_data = cpu_register_io_memory_simple(&s->data_handler); + pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, + DEVICE_NATIVE_ENDIAN); sysbus_init_mmio(dev, 0x1000, pci_mem_config); sysbus_init_mmio(dev, 0x1000, pci_mem_data); diff --git a/rwhandler.c b/rwhandler.c index 88dfcc5c1a..bb2238ff1e 100644 --- a/rwhandler.c +++ b/rwhandler.c @@ -35,14 +35,14 @@ static CPUReadMemoryFunc * const cpu_io_memory_simple_read[] = { &cpu_io_memory_simple_readl, }; -int cpu_register_io_memory_simple(struct ReadWriteHandler *handler) +int cpu_register_io_memory_simple(struct ReadWriteHandler *handler, int endian) { if (!handler->read || !handler->write) { return -1; } return cpu_register_io_memory(cpu_io_memory_simple_read, cpu_io_memory_simple_write, - handler, DEVICE_NATIVE_ENDIAN); + handler, endian); } RWHANDLER_WRITE(ioport_simple_writeb, 1, uint32_t); diff --git a/rwhandler.h b/rwhandler.h index bc11849572..b2a5790548 100644 --- a/rwhandler.h +++ b/rwhandler.h @@ -19,7 +19,7 @@ struct ReadWriteHandler { /* Helpers for when we want to use a single routine with length. */ /* CPU memory handler: both read and write must be present. */ -int cpu_register_io_memory_simple(ReadWriteHandler *); +int cpu_register_io_memory_simple(ReadWriteHandler *, int endian); /* io port handler: can supply only read or write handlers. */ int register_ioport_simple(ReadWriteHandler *, pio_addr_t start, int length, int size); |