diff options
| -rw-r--r-- | disas.c | 5 | ||||
| -rw-r--r-- | target-alpha/cpu.c | 8 |
2 files changed, 8 insertions, 5 deletions
@@ -230,9 +230,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, } s.info.disassembler_options = (char *)"any"; s.info.print_insn = print_insn_ppc; -#elif defined(TARGET_ALPHA) - s.info.mach = bfd_mach_alpha_ev6; - s.info.print_insn = print_insn_alpha; #endif if (s.info.print_insn == NULL) { s.info.print_insn = print_insn_od_target; @@ -404,8 +401,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.mach = bfd_mach_i386_i386; } s.info.print_insn = print_insn_i386; -#elif defined(TARGET_ALPHA) - s.info.print_insn = print_insn_alpha; #elif defined(TARGET_PPC) if (flags & 0xFFFF) { /* If we have a precise definition of the instruction set, use it. */ diff --git a/target-alpha/cpu.c b/target-alpha/cpu.c index ff1926a5d0..e5bdfa8ca2 100644 --- a/target-alpha/cpu.c +++ b/target-alpha/cpu.c @@ -46,6 +46,12 @@ static bool alpha_cpu_has_work(CPUState *cs) | CPU_INTERRUPT_MCHK); } +static void alpha_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) +{ + info->mach = bfd_mach_alpha_ev6; + info->print_insn = print_insn_alpha; +} + static void alpha_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs = CPU(dev); @@ -297,6 +303,8 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data) cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug; dc->vmsd = &vmstate_alpha_cpu; #endif + cc->disas_set_info = alpha_cpu_disas_set_info; + cc->gdb_num_core_regs = 67; /* |