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-rw-r--r--target-xtensa/cpu.h4
-rw-r--r--target-xtensa/op_helper.c3
-rw-r--r--target-xtensa/translate.c3
3 files changed, 8 insertions, 2 deletions
diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h
index a8f02f6e4b..95103e9e87 100644
--- a/target-xtensa/cpu.h
+++ b/target-xtensa/cpu.h
@@ -484,6 +484,7 @@ static inline int cpu_mmu_index(CPUXtensaState *env)
#define XTENSA_TBFLAG_ICOUNT 0x20
#define XTENSA_TBFLAG_CPENABLE_MASK 0x3fc0
#define XTENSA_TBFLAG_CPENABLE_SHIFT 6
+#define XTENSA_TBFLAG_EXCEPTION 0x4000
static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
target_ulong *cs_base, int *flags)
@@ -510,6 +511,9 @@ static inline void cpu_get_tb_cpu_state(CPUXtensaState *env, target_ulong *pc,
if (xtensa_option_enabled(env->config, XTENSA_OPTION_COPROCESSOR)) {
*flags |= env->sregs[CPENABLE] << XTENSA_TBFLAG_CPENABLE_SHIFT;
}
+ if (ENV_GET_CPU(env)->singlestep_enabled && env->exception_taken) {
+ *flags |= XTENSA_TBFLAG_EXCEPTION;
+ }
}
#include "exec/cpu-all.h"
diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c
index 834fe9087d..6ca912c5bb 100644
--- a/target-xtensa/op_helper.c
+++ b/target-xtensa/op_helper.c
@@ -96,6 +96,9 @@ static void tb_invalidate_virtual_addr(CPUXtensaState *env, uint32_t vaddr)
void HELPER(exception)(CPUXtensaState *env, uint32_t excp)
{
env->exception_index = excp;
+ if (excp == EXCP_DEBUG) {
+ env->exception_taken = 0;
+ }
cpu_loop_exit(env);
}
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index e692329157..7ea5e2ae16 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -2918,8 +2918,7 @@ void gen_intermediate_code_internal(XtensaCPU *cpu,
gen_tb_start();
- if (cs->singlestep_enabled && env->exception_taken) {
- env->exception_taken = 0;
+ if (tb->flags & XTENSA_TBFLAG_EXCEPTION) {
tcg_gen_movi_i32(cpu_pc, dc.pc);
gen_exception(&dc, EXCP_DEBUG);
}