diff options
-rw-r--r-- | exec.c | 2 | ||||
-rw-r--r-- | hw/core/qdev-properties.c | 12 | ||||
-rw-r--r-- | hw/core/qdev.c | 10 | ||||
-rw-r--r-- | hw/dma/xilinx_axidma.c | 20 | ||||
-rw-r--r-- | hw/net/xilinx_axienet.c | 20 | ||||
-rw-r--r-- | hw/pci-host/prep.c | 182 | ||||
-rw-r--r-- | hw/pcmcia/pxa2xx.c | 4 | ||||
-rw-r--r-- | hw/ppc/prep.c | 103 | ||||
-rw-r--r-- | hw/s390x/s390-virtio-bus.c | 4 | ||||
-rw-r--r-- | hw/s390x/virtio-ccw.c | 4 | ||||
-rw-r--r-- | hw/virtio/virtio-pci.c | 4 | ||||
-rw-r--r-- | hw/virtio/virtio-rng.c | 7 | ||||
-rw-r--r-- | include/hw/boards.h | 1 | ||||
-rw-r--r-- | include/hw/qdev-properties.h | 11 | ||||
-rw-r--r-- | include/qom/cpu.h | 7 | ||||
-rw-r--r-- | include/qom/object.h | 29 | ||||
-rw-r--r-- | linux-user/syscall.c | 2 | ||||
-rw-r--r-- | qom/object.c | 131 | ||||
-rw-r--r-- | ui/console.c | 5 | ||||
-rw-r--r-- | vl.c | 6 |
20 files changed, 386 insertions, 178 deletions
@@ -420,7 +420,7 @@ static int cpu_common_post_load(void *opaque, int version_id) /* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the version_id is increased. */ cpu->interrupt_request &= ~0x01; - tlb_flush(cpu->env_ptr, 1); + tlb_flush(cpu, 1); return 0; } diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c index 77d0c66635..c67acf58b5 100644 --- a/hw/core/qdev-properties.c +++ b/hw/core/qdev-properties.c @@ -21,6 +21,18 @@ void qdev_prop_set_after_realize(DeviceState *dev, const char *name, } } +void qdev_prop_allow_set_link_before_realize(Object *obj, const char *name, + Object *val, Error **errp) +{ + DeviceState *dev = DEVICE(obj); + + if (dev->realized) { + error_setg(errp, "Attempt to set link property '%s' on device '%s' " + "(type '%s') after it was realized", + name, dev->id, object_get_typename(obj)); + } +} + void *qdev_get_prop_ptr(DeviceState *dev, Property *prop) { void *ptr = dev; diff --git a/hw/core/qdev.c b/hw/core/qdev.c index cd09cd4d95..60f9df1ed9 100644 --- a/hw/core/qdev.c +++ b/hw/core/qdev.c @@ -99,6 +99,8 @@ static void bus_add_child(BusState *bus, DeviceState *child) object_property_add_link(OBJECT(bus), name, object_get_typename(OBJECT(child)), (Object **)&kid->child, + NULL, /* read-only property */ + 0, /* return ownership on prop deletion */ NULL); } @@ -840,7 +842,8 @@ static void device_initfn(Object *obj) } while (class != object_class_by_name(TYPE_DEVICE)); object_property_add_link(OBJECT(dev), "parent_bus", TYPE_BUS, - (Object **)&dev->parent_bus, &error_abort); + (Object **)&dev->parent_bus, NULL, 0, + &error_abort); } static void device_post_init(Object *obj) @@ -960,7 +963,10 @@ static void qbus_initfn(Object *obj) QTAILQ_INIT(&bus->children); object_property_add_link(obj, QDEV_HOTPLUG_HANDLER_PROPERTY, TYPE_HOTPLUG_HANDLER, - (Object **)&bus->hotplug_handler, NULL); + (Object **)&bus->hotplug_handler, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + NULL); object_property_add_bool(obj, "realized", bus_get_realized, bus_set_realized, NULL); } diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c index 19f07b3b25..14b887bfa8 100644 --- a/hw/dma/xilinx_axidma.c +++ b/hw/dma/xilinx_axidma.c @@ -537,9 +537,15 @@ static void xilinx_axidma_realize(DeviceState *dev, Error **errp) Error *local_errp = NULL; object_property_add_link(OBJECT(ds), "dma", TYPE_XILINX_AXI_DMA, - (Object **)&ds->dma, &local_errp); + (Object **)&ds->dma, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &local_errp); object_property_add_link(OBJECT(cs), "dma", TYPE_XILINX_AXI_DMA, - (Object **)&cs->dma, &local_errp); + (Object **)&cs->dma, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &local_errp); if (local_errp) { goto xilinx_axidma_realize_fail; } @@ -571,10 +577,16 @@ static void xilinx_axidma_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); object_property_add_link(obj, "axistream-connected", TYPE_STREAM_SLAVE, - (Object **)&s->tx_data_dev, &error_abort); + (Object **)&s->tx_data_dev, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &error_abort); object_property_add_link(obj, "axistream-control-connected", TYPE_STREAM_SLAVE, - (Object **)&s->tx_control_dev, &error_abort); + (Object **)&s->tx_control_dev, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &error_abort); object_initialize(&s->rx_data_dev, sizeof(s->rx_data_dev), TYPE_XILINX_AXI_DMA_DATA_STREAM); diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c index 0bd5eda199..839d97ca86 100644 --- a/hw/net/xilinx_axienet.c +++ b/hw/net/xilinx_axienet.c @@ -945,9 +945,15 @@ static void xilinx_enet_realize(DeviceState *dev, Error **errp) Error *local_errp = NULL; object_property_add_link(OBJECT(ds), "enet", "xlnx.axi-ethernet", - (Object **) &ds->enet, &local_errp); + (Object **) &ds->enet, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &local_errp); object_property_add_link(OBJECT(cs), "enet", "xlnx.axi-ethernet", - (Object **) &cs->enet, &local_errp); + (Object **) &cs->enet, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &local_errp); if (local_errp) { goto xilinx_enet_realize_fail; } @@ -982,10 +988,16 @@ static void xilinx_enet_init(Object *obj) SysBusDevice *sbd = SYS_BUS_DEVICE(obj); object_property_add_link(obj, "axistream-connected", TYPE_STREAM_SLAVE, - (Object **) &s->tx_data_dev, &error_abort); + (Object **) &s->tx_data_dev, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &error_abort); object_property_add_link(obj, "axistream-control-connected", TYPE_STREAM_SLAVE, - (Object **) &s->tx_control_dev, &error_abort); + (Object **) &s->tx_control_dev, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &error_abort); object_initialize(&s->rx_data_dev, sizeof(s->rx_data_dev), TYPE_XILINX_AXI_ENET_DATA_STREAM); diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 94fdffa777..d3e746c0f8 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -52,15 +52,25 @@ typedef struct RavenPCIState { typedef struct PRePPCIState { PCIHostState parent_obj; - MemoryRegion intack; qemu_irq irq[PCI_NUM_PINS]; PCIBus pci_bus; + AddressSpace pci_io_as; + MemoryRegion pci_io; + MemoryRegion pci_io_non_contiguous; + MemoryRegion pci_memory; + MemoryRegion pci_intack; + MemoryRegion bm; + MemoryRegion bm_ram_alias; + MemoryRegion bm_pci_memory_alias; + AddressSpace bm_as; RavenPCIState pci_dev; + + int contiguous_map; } PREPPCIState; #define BIOS_SIZE (1024 * 1024) -static inline uint32_t PPC_PCIIO_config(hwaddr addr) +static inline uint32_t raven_pci_io_config(hwaddr addr) { int i; @@ -72,53 +82,133 @@ static inline uint32_t PPC_PCIIO_config(hwaddr addr) return (addr & 0x7ff) | (i << 11); } -static void ppc_pci_io_write(void *opaque, hwaddr addr, - uint64_t val, unsigned int size) +static void raven_pci_io_write(void *opaque, hwaddr addr, + uint64_t val, unsigned int size) { PREPPCIState *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); - pci_data_write(phb->bus, PPC_PCIIO_config(addr), val, size); + pci_data_write(phb->bus, raven_pci_io_config(addr), val, size); } -static uint64_t ppc_pci_io_read(void *opaque, hwaddr addr, - unsigned int size) +static uint64_t raven_pci_io_read(void *opaque, hwaddr addr, + unsigned int size) { PREPPCIState *s = opaque; PCIHostState *phb = PCI_HOST_BRIDGE(s); - return pci_data_read(phb->bus, PPC_PCIIO_config(addr), size); + return pci_data_read(phb->bus, raven_pci_io_config(addr), size); } -static const MemoryRegionOps PPC_PCIIO_ops = { - .read = ppc_pci_io_read, - .write = ppc_pci_io_write, +static const MemoryRegionOps raven_pci_io_ops = { + .read = raven_pci_io_read, + .write = raven_pci_io_write, .endianness = DEVICE_LITTLE_ENDIAN, }; -static uint64_t ppc_intack_read(void *opaque, hwaddr addr, - unsigned int size) +static uint64_t raven_intack_read(void *opaque, hwaddr addr, + unsigned int size) { return pic_read_irq(isa_pic); } -static const MemoryRegionOps PPC_intack_ops = { - .read = ppc_intack_read, +static const MemoryRegionOps raven_intack_ops = { + .read = raven_intack_read, .valid = { .max_access_size = 1, }, }; -static int prep_map_irq(PCIDevice *pci_dev, int irq_num) +static inline hwaddr raven_io_address(PREPPCIState *s, + hwaddr addr) +{ + if (s->contiguous_map == 0) { + /* 64 KB contiguous space for IOs */ + addr &= 0xFFFF; + } else { + /* 8 MB non-contiguous space for IOs */ + addr = (addr & 0x1F) | ((addr & 0x007FFF000) >> 7); + } + + /* FIXME: handle endianness switch */ + + return addr; +} + +static uint64_t raven_io_read(void *opaque, hwaddr addr, + unsigned int size) +{ + PREPPCIState *s = opaque; + uint8_t buf[4]; + + addr = raven_io_address(s, addr); + address_space_read(&s->pci_io_as, addr + 0x80000000, buf, size); + + if (size == 1) { + return buf[0]; + } else if (size == 2) { + return lduw_p(buf); + } else if (size == 4) { + return ldl_p(buf); + } else { + g_assert_not_reached(); + } +} + +static void raven_io_write(void *opaque, hwaddr addr, + uint64_t val, unsigned int size) +{ + PREPPCIState *s = opaque; + uint8_t buf[4]; + + addr = raven_io_address(s, addr); + + if (size == 1) { + buf[0] = val; + } else if (size == 2) { + stw_p(buf, val); + } else if (size == 4) { + stl_p(buf, val); + } else { + g_assert_not_reached(); + } + + address_space_write(&s->pci_io_as, addr + 0x80000000, buf, size); +} + +static const MemoryRegionOps raven_io_ops = { + .read = raven_io_read, + .write = raven_io_write, + .endianness = DEVICE_LITTLE_ENDIAN, + .impl.max_access_size = 4, + .valid.unaligned = true, +}; + +static int raven_map_irq(PCIDevice *pci_dev, int irq_num) { return (irq_num + (pci_dev->devfn >> 3)) & 1; } -static void prep_set_irq(void *opaque, int irq_num, int level) +static void raven_set_irq(void *opaque, int irq_num, int level) { qemu_irq *pic = opaque; qemu_set_irq(pic[irq_num] , level); } +static AddressSpace *raven_pcihost_set_iommu(PCIBus *bus, void *opaque, + int devfn) +{ + PREPPCIState *s = opaque; + + return &s->bm_as; +} + +static void raven_change_gpio(void *opaque, int n, int level) +{ + PREPPCIState *s = opaque; + + s->contiguous_map = level; +} + static void raven_pcihost_realizefn(DeviceState *d, Error **errp) { SysBusDevice *dev = SYS_BUS_DEVICE(d); @@ -127,29 +217,30 @@ static void raven_pcihost_realizefn(DeviceState *d, Error **errp) MemoryRegion *address_space_mem = get_system_memory(); int i; - isa_mem_base = 0xc0000000; - for (i = 0; i < PCI_NUM_PINS; i++) { sysbus_init_irq(dev, &s->irq[i]); } - pci_bus_irqs(&s->pci_bus, prep_set_irq, prep_map_irq, s->irq, PCI_NUM_PINS); + qdev_init_gpio_in(d, raven_change_gpio, 1); - memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_be_ops, s, - "pci-conf-idx", 1); - sysbus_add_io(dev, 0xcf8, &h->conf_mem); - sysbus_init_ioports(&h->busdev, 0xcf8, 1); + pci_bus_irqs(&s->pci_bus, raven_set_irq, raven_map_irq, s->irq, + PCI_NUM_PINS); - memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_be_ops, s, - "pci-conf-data", 1); - sysbus_add_io(dev, 0xcfc, &h->data_mem); - sysbus_init_ioports(&h->busdev, 0xcfc, 1); + memory_region_init_io(&h->conf_mem, OBJECT(h), &pci_host_conf_le_ops, s, + "pci-conf-idx", 4); + memory_region_add_subregion(&s->pci_io, 0xcf8, &h->conf_mem); - memory_region_init_io(&h->mmcfg, OBJECT(s), &PPC_PCIIO_ops, s, "pciio", 0x00400000); + memory_region_init_io(&h->data_mem, OBJECT(h), &pci_host_data_le_ops, s, + "pci-conf-data", 4); + memory_region_add_subregion(&s->pci_io, 0xcfc, &h->data_mem); + + memory_region_init_io(&h->mmcfg, OBJECT(s), &raven_pci_io_ops, s, + "pciio", 0x00400000); memory_region_add_subregion(address_space_mem, 0x80800000, &h->mmcfg); - memory_region_init_io(&s->intack, OBJECT(s), &PPC_intack_ops, s, "pci-intack", 1); - memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->intack); + memory_region_init_io(&s->pci_intack, OBJECT(s), &raven_intack_ops, s, + "pci-intack", 1); + memory_region_add_subregion(address_space_mem, 0xbffffff0, &s->pci_intack); /* TODO Remove once realize propagates to child devices. */ object_property_set_bool(OBJECT(&s->pci_dev), true, "realized", errp); @@ -160,11 +251,36 @@ static void raven_pcihost_initfn(Object *obj) PCIHostState *h = PCI_HOST_BRIDGE(obj); PREPPCIState *s = RAVEN_PCI_HOST_BRIDGE(obj); MemoryRegion *address_space_mem = get_system_memory(); - MemoryRegion *address_space_io = get_system_io(); DeviceState *pci_dev; + memory_region_init(&s->pci_io, obj, "pci-io", 0x3f800000); + memory_region_init_io(&s->pci_io_non_contiguous, obj, &raven_io_ops, s, + "pci-io-non-contiguous", 0x00800000); + /* Open Hack'Ware hack: real size should be only 0x3f000000 bytes */ + memory_region_init(&s->pci_memory, obj, "pci-memory", + 0x3f000000 + 0xc0000000ULL); + address_space_init(&s->pci_io_as, &s->pci_io, "raven-io"); + + /* CPU address space */ + memory_region_add_subregion(address_space_mem, 0x80000000, &s->pci_io); + memory_region_add_subregion_overlap(address_space_mem, 0x80000000, + &s->pci_io_non_contiguous, 1); + memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_memory); pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL, - address_space_mem, address_space_io, 0, TYPE_PCI_BUS); + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS); + + /* Bus master address space */ + memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX); + memory_region_init_alias(&s->bm_pci_memory_alias, obj, "bm-pci-memory", + &s->pci_memory, 0, + memory_region_size(&s->pci_memory)); + memory_region_init_alias(&s->bm_ram_alias, obj, "bm-system", + get_system_memory(), 0, 0x80000000); + memory_region_add_subregion(&s->bm, 0 , &s->bm_pci_memory_alias); + memory_region_add_subregion(&s->bm, 0x80000000, &s->bm_ram_alias); + address_space_init(&s->bm_as, &s->bm, "raven-bm"); + pci_setup_iommu(&s->pci_bus, raven_pcihost_set_iommu, s); + h->bus = &s->pci_bus; object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_RAVEN_PCI_DEVICE); diff --git a/hw/pcmcia/pxa2xx.c b/hw/pcmcia/pxa2xx.c index 8f17596cc3..96f377453d 100644 --- a/hw/pcmcia/pxa2xx.c +++ b/hw/pcmcia/pxa2xx.c @@ -198,7 +198,9 @@ static void pxa2xx_pcmcia_initfn(Object *obj) s->slot.irq = qemu_allocate_irqs(pxa2xx_pcmcia_set_irq, s, 1)[0]; object_property_add_link(obj, "card", TYPE_PCMCIA_CARD, - (Object **)&s->card, NULL); + (Object **)&s->card, + NULL, /* read-only property */ + 0, NULL); } /* Insert a new card into a slot */ diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 81e13cb4ac..e2436512f7 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -185,6 +185,7 @@ typedef struct sysctrl_t { uint8_t state; uint8_t syscontrol; int contiguous_map; + qemu_irq contiguous_map_irq; int endian; } sysctrl_t; @@ -253,6 +254,7 @@ static void PREP_io_800_writeb (void *opaque, uint32_t addr, uint32_t val) case 0x0850: /* I/O map type register */ sysctrl->contiguous_map = val & 0x01; + qemu_set_irq(sysctrl->contiguous_map_irq, sysctrl->contiguous_map); break; default: printf("ERROR: unaffected IO port write: %04" PRIx32 @@ -327,91 +329,6 @@ static uint32_t PREP_io_800_readb (void *opaque, uint32_t addr) return retval; } -static inline hwaddr prep_IO_address(sysctrl_t *sysctrl, - hwaddr addr) -{ - if (sysctrl->contiguous_map == 0) { - /* 64 KB contiguous space for IOs */ - addr &= 0xFFFF; - } else { - /* 8 MB non-contiguous space for IOs */ - addr = (addr & 0x1F) | ((addr & 0x007FFF000) >> 7); - } - - return addr; -} - -static void PPC_prep_io_writeb (void *opaque, hwaddr addr, - uint32_t value) -{ - sysctrl_t *sysctrl = opaque; - - addr = prep_IO_address(sysctrl, addr); - cpu_outb(addr, value); -} - -static uint32_t PPC_prep_io_readb (void *opaque, hwaddr addr) -{ - sysctrl_t *sysctrl = opaque; - uint32_t ret; - - addr = prep_IO_address(sysctrl, addr); - ret = cpu_inb(addr); - - return ret; -} - -static void PPC_prep_io_writew (void *opaque, hwaddr addr, - uint32_t value) -{ - sysctrl_t *sysctrl = opaque; - - addr = prep_IO_address(sysctrl, addr); - PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value); - cpu_outw(addr, value); -} - -static uint32_t PPC_prep_io_readw (void *opaque, hwaddr addr) -{ - sysctrl_t *sysctrl = opaque; - uint32_t ret; - - addr = prep_IO_address(sysctrl, addr); - ret = cpu_inw(addr); - PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret); - - return ret; -} - -static void PPC_prep_io_writel (void *opaque, hwaddr addr, - uint32_t value) -{ - sysctrl_t *sysctrl = opaque; - - addr = prep_IO_address(sysctrl, addr); - PPC_IO_DPRINTF("0x" TARGET_FMT_plx " => 0x%08" PRIx32 "\n", addr, value); - cpu_outl(addr, value); -} - -static uint32_t PPC_prep_io_readl (void *opaque, hwaddr addr) -{ - sysctrl_t *sysctrl = opaque; - uint32_t ret; - - addr = prep_IO_address(sysctrl, addr); - ret = cpu_inl(addr); - PPC_IO_DPRINTF("0x" TARGET_FMT_plx " <= 0x%08" PRIx32 "\n", addr, ret); - - return ret; -} - -static const MemoryRegionOps PPC_prep_io_ops = { - .old_mmio = { - .read = { PPC_prep_io_readb, PPC_prep_io_readw, PPC_prep_io_readl }, - .write = { PPC_prep_io_writeb, PPC_prep_io_writew, PPC_prep_io_writel }, - }, - .endianness = DEVICE_NATIVE_ENDIAN, -}; #define NVRAM_SIZE 0x2000 @@ -458,13 +375,13 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) CPUPPCState *env = NULL; nvram_t nvram; M48t59State *m48t59; - MemoryRegion *PPC_io_memory = g_new(MemoryRegion, 1); PortioList *port_list = g_new(PortioList, 1); #if 0 MemoryRegion *xcsr = g_new(MemoryRegion, 1); #endif int linux_boot, i, nb_nics1; MemoryRegion *ram = g_new(MemoryRegion, 1); + MemoryRegion *vga = g_new(MemoryRegion, 1); uint32_t kernel_base, initrd_base; long kernel_size, initrd_size; DeviceState *dev; @@ -567,6 +484,7 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) fprintf(stderr, "Couldn't create PCI host controller.\n"); exit(1); } + sysctrl->contiguous_map_irq = qdev_get_gpio_in(dev, 0); /* PCI -> ISA bridge */ pci = pci_create_simple(pci_bus, PCI_DEVFN(1, 0), "i82378"); @@ -587,13 +505,16 @@ static void ppc_prep_init(QEMUMachineInitArgs *args) qdev_prop_set_uint8(dev, "config", 13); /* fdc, ser0, ser1, par0 */ qdev_init_nofail(dev); - /* Register 8 MB of ISA IO space (needed for non-contiguous map) */ - memory_region_init_io(PPC_io_memory, NULL, &PPC_prep_io_ops, sysctrl, - "ppc-io", 0x00800000); - memory_region_add_subregion(sysmem, 0x80000000, PPC_io_memory); - /* init basic PC hardware */ pci_vga_init(pci_bus); + /* Open Hack'Ware hack: PCI BAR#0 is programmed to 0xf0000000. + * While bios will access framebuffer at 0xf0000000, real physical + * address is 0xf0000000 + 0xc0000000 (PCI memory base). + * Alias the wrong memory accesses to the right place. + */ + memory_region_init_alias(vga, NULL, "vga-alias", pci_address_space(pci), + 0xf0000000, 0x1000000); + memory_region_add_subregion_overlap(sysmem, 0xf0000000, vga, 10); nb_nics1 = nb_nics; if (nb_nics1 > NE2000_NB_MAX) diff --git a/hw/s390x/s390-virtio-bus.c b/hw/s390x/s390-virtio-bus.c index e4fc35366b..9c71afa031 100644 --- a/hw/s390x/s390-virtio-bus.c +++ b/hw/s390x/s390-virtio-bus.c @@ -313,7 +313,9 @@ static void s390_virtio_rng_instance_init(Object *obj) object_initialize(&dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_RNG); object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL); object_property_add_link(obj, "rng", TYPE_RNG_BACKEND, - (Object **)&dev->vdev.conf.rng, NULL); + (Object **)&dev->vdev.conf.rng, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, NULL); } static uint64_t s390_virtio_device_vq_token(VirtIOS390Device *dev, int vq) diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index a01801e342..2bf0af8f0a 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -1272,7 +1272,9 @@ static void virtio_ccw_rng_instance_init(Object *obj) object_initialize(&dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_RNG); object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL); object_property_add_link(obj, "rng", TYPE_RNG_BACKEND, - (Object **)&dev->vdev.conf.rng, NULL); + (Object **)&dev->vdev.conf.rng, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, NULL); } static Property virtio_ccw_rng_properties[] = { diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 7b91841a1d..ce97514b69 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1517,7 +1517,9 @@ static void virtio_rng_initfn(Object *obj) object_initialize(&dev->vdev, sizeof(dev->vdev), TYPE_VIRTIO_RNG); object_property_add_child(obj, "virtio-backend", OBJECT(&dev->vdev), NULL); object_property_add_link(obj, "rng", TYPE_RNG_BACKEND, - (Object **)&dev->vdev.conf.rng, NULL); + (Object **)&dev->vdev.conf.rng, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, NULL); } diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c index a16e3bc52e..b6ab3610cb 100644 --- a/hw/virtio/virtio-rng.c +++ b/hw/virtio/virtio-rng.c @@ -162,6 +162,9 @@ static void virtio_rng_device_realize(DeviceState *dev, Error **errp) OBJECT(vrng->conf.default_backend), NULL); + /* The child property took a reference, we can safely drop ours now */ + object_unref(OBJECT(vrng->conf.default_backend)); + object_property_set_link(OBJECT(dev), OBJECT(vrng->conf.default_backend), "rng", NULL); @@ -223,7 +226,9 @@ static void virtio_rng_initfn(Object *obj) VirtIORNG *vrng = VIRTIO_RNG(obj); object_property_add_link(obj, "rng", TYPE_RNG_BACKEND, - (Object **)&vrng->conf.rng, NULL); + (Object **)&vrng->conf.rng, + qdev_prop_allow_set_link_before_realize, + OBJ_PROP_LINK_UNREF_ON_RELEASE, NULL); } static const TypeInfo virtio_rng_info = { diff --git a/include/hw/boards.h b/include/hw/boards.h index 7bd2ea7736..dd2c70da36 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -54,6 +54,7 @@ struct QEMUMachine { int qemu_register_machine(QEMUMachine *m); #define TYPE_MACHINE "machine" +#undef MACHINE /* BSD defines it and QEMU does not use it */ #define MACHINE(obj) \ OBJECT_CHECK(MachineState, (obj), TYPE_MACHINE) #define MACHINE_GET_CLASS(obj) \ diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h index 3c000eea75..c46e908d71 100644 --- a/include/hw/qdev-properties.h +++ b/include/hw/qdev-properties.h @@ -204,4 +204,15 @@ void qdev_property_add_static(DeviceState *dev, Property *prop, Error **errp); */ void qdev_prop_set_after_realize(DeviceState *dev, const char *name, Error **errp); + +/** + * qdev_prop_allow_set_link_before_realize: + * + * Set the #Error object if an attempt is made to set the link after realize. + * This function should be used as the check() argument to + * object_property_add_link(). + */ +void qdev_prop_allow_set_link_before_realize(Object *obj, const char *name, + Object *val, Error **errp); + #endif diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 06ee2636c3..f99885a137 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -227,7 +227,6 @@ struct CPUState { bool stop; bool stopped; volatile sig_atomic_t exit_request; - volatile sig_atomic_t tcg_exit_req; uint32_t interrupt_request; int singlestep_enabled; int64_t icount_extra; @@ -272,6 +271,12 @@ struct CPUState { } icount_decr; uint32_t can_do_io; int32_t exception_index; /* used by m68k TCG */ + + /* Note that this is accessed at the start of every TB via a negative + offset from AREG0. Leave this field at the end so as to make the + (absolute value) offset as small as possible. This reduces code + size, especially for hosts without large memory offsets. */ + volatile sig_atomic_t tcg_exit_req; }; QTAILQ_HEAD(CPUTailQ, CPUState); diff --git a/include/qom/object.h b/include/qom/object.h index 4cd77049e4..a641dcde10 100644 --- a/include/qom/object.h +++ b/include/qom/object.h @@ -1067,12 +1067,29 @@ Object *object_resolve_path_component(Object *parent, const gchar *part); void object_property_add_child(Object *obj, const char *name, Object *child, Error **errp); +typedef enum { + /* Unref the link pointer when the property is deleted */ + OBJ_PROP_LINK_UNREF_ON_RELEASE = 0x1, +} ObjectPropertyLinkFlags; + +/** + * object_property_allow_set_link: + * + * The default implementation of the object_property_add_link() check() + * callback function. It allows the link property to be set and never returns + * an error. + */ +void object_property_allow_set_link(Object *, const char *, + Object *, Error **); + /** * object_property_add_link: * @obj: the object to add a property to * @name: the name of the property * @type: the qobj type of the link * @child: a pointer to where the link object reference is stored + * @check: callback to veto setting or NULL if the property is read-only + * @flags: additional options for the link * @errp: if an error occurs, a pointer to an area to store the area * * Links establish relationships between objects. Links are unidirectional @@ -1081,13 +1098,23 @@ void object_property_add_child(Object *obj, const char *name, * * Links form the graph in the object model. * + * The <code>@check()</code> callback is invoked when + * object_property_set_link() is called and can raise an error to prevent the + * link being set. If <code>@check</code> is NULL, the property is read-only + * and cannot be set. + * * Ownership of the pointer that @child points to is transferred to the * link property. The reference count for <code>*@child</code> is * managed by the property from after the function returns till the - * property is deleted with object_property_del(). + * property is deleted with object_property_del(). If the + * <code>@flags</code> <code>OBJ_PROP_LINK_UNREF_ON_RELEASE</code> bit is set, + * the reference count is decremented when the property is deleted. */ void object_property_add_link(Object *obj, const char *name, const char *type, Object **child, + void (*check)(Object *obj, const char *name, + Object *val, Error **errp), + ObjectPropertyLinkFlags flags, Error **errp); /** diff --git a/linux-user/syscall.c b/linux-user/syscall.c index 366b6951e9..2eac6d5aa9 100644 --- a/linux-user/syscall.c +++ b/linux-user/syscall.c @@ -7698,7 +7698,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1, header.version = tswap32(target_header->version); header.pid = tswap32(target_header->pid); - if (header.version != _LINUX_CAPABILITY_VERSION_1) { + if (header.version != _LINUX_CAPABILITY_VERSION) { /* Version 2 and up takes pointer to two user_data structs */ data_items = 2; } diff --git a/qom/object.c b/qom/object.c index a2a1ffa1b3..f4de619b7b 100644 --- a/qom/object.c +++ b/qom/object.c @@ -1023,10 +1023,23 @@ out: g_free(type); } +void object_property_allow_set_link(Object *obj, const char *name, + Object *val, Error **errp) +{ + /* Allow the link to be set, always */ +} + +typedef struct { + Object **child; + void (*check)(Object *, const char *, Object *, Error **); + ObjectPropertyLinkFlags flags; +} LinkProperty; + static void object_get_link_property(Object *obj, Visitor *v, void *opaque, const char *name, Error **errp) { - Object **child = opaque; + LinkProperty *lprop = opaque; + Object **child = lprop->child; gchar *path; if (*child) { @@ -1039,65 +1052,119 @@ static void object_get_link_property(Object *obj, Visitor *v, void *opaque, } } -static void object_set_link_property(Object *obj, Visitor *v, void *opaque, - const char *name, Error **errp) +/* + * object_resolve_link: + * + * Lookup an object and ensure its type matches the link property type. This + * is similar to object_resolve_path() except type verification against the + * link property is performed. + * + * Returns: The matched object or NULL on path lookup failures. + */ +static Object *object_resolve_link(Object *obj, const char *name, + const char *path, Error **errp) { - Object **child = opaque; - Object *old_target; - bool ambiguous = false; const char *type; - char *path; gchar *target_type; + bool ambiguous = false; + Object *target; + /* Go from link<FOO> to FOO. */ type = object_property_get_type(obj, name, NULL); + target_type = g_strndup(&type[5], strlen(type) - 6); + target = object_resolve_path_type(path, target_type, &ambiguous); + + if (ambiguous) { + error_set(errp, QERR_AMBIGUOUS_PATH, path); + } else if (!target) { + target = object_resolve_path(path, &ambiguous); + if (target || ambiguous) { + error_set(errp, QERR_INVALID_PARAMETER_TYPE, name, target_type); + } else { + error_set(errp, QERR_DEVICE_NOT_FOUND, path); + } + target = NULL; + } + g_free(target_type); - visit_type_str(v, &path, name, errp); - - old_target = *child; - *child = NULL; + return target; +} - if (strcmp(path, "") != 0) { - Object *target; +static void object_set_link_property(Object *obj, Visitor *v, void *opaque, + const char *name, Error **errp) +{ + Error *local_err = NULL; + LinkProperty *prop = opaque; + Object **child = prop->child; + Object *old_target = *child; + Object *new_target = NULL; + char *path = NULL; - /* Go from link<FOO> to FOO. */ - target_type = g_strndup(&type[5], strlen(type) - 6); - target = object_resolve_path_type(path, target_type, &ambiguous); + visit_type_str(v, &path, name, &local_err); - if (ambiguous) { - error_set(errp, QERR_AMBIGUOUS_PATH, path); - } else if (target) { - object_ref(target); - *child = target; - } else { - target = object_resolve_path(path, &ambiguous); - if (target || ambiguous) { - error_set(errp, QERR_INVALID_PARAMETER_TYPE, name, target_type); - } else { - error_set(errp, QERR_DEVICE_NOT_FOUND, path); - } - } - g_free(target_type); + if (!local_err && strcmp(path, "") != 0) { + new_target = object_resolve_link(obj, name, path, &local_err); } g_free(path); + if (local_err) { + error_propagate(errp, local_err); + return; + } + prop->check(obj, name, new_target, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (new_target) { + object_ref(new_target); + } + *child = new_target; if (old_target != NULL) { object_unref(old_target); } } +static void object_release_link_property(Object *obj, const char *name, + void *opaque) +{ + LinkProperty *prop = opaque; + + if ((prop->flags & OBJ_PROP_LINK_UNREF_ON_RELEASE) && *prop->child) { + object_unref(*prop->child); + } + g_free(prop); +} + void object_property_add_link(Object *obj, const char *name, const char *type, Object **child, + void (*check)(Object *, const char *, + Object *, Error **), + ObjectPropertyLinkFlags flags, Error **errp) { + Error *local_err = NULL; + LinkProperty *prop = g_malloc(sizeof(*prop)); gchar *full_type; + prop->child = child; + prop->check = check; + prop->flags = flags; + full_type = g_strdup_printf("link<%s>", type); object_property_add(obj, name, full_type, object_get_link_property, - object_set_link_property, - NULL, child, errp); + check ? object_set_link_property : NULL, + object_release_link_property, + prop, + &local_err); + if (local_err) { + error_propagate(errp, local_err); + g_free(prop); + } g_free(full_type); } diff --git a/ui/console.c b/ui/console.c index 4df251d579..e057755c04 100644 --- a/ui/console.c +++ b/ui/console.c @@ -1180,7 +1180,10 @@ static QemuConsole *new_console(DisplayState *ds, console_type_t console_type) obj = object_new(TYPE_QEMU_CONSOLE); s = QEMU_CONSOLE(obj); object_property_add_link(obj, "device", TYPE_DEVICE, - (Object **)&s->device, &local_err); + (Object **)&s->device, + object_property_allow_set_link, + OBJ_PROP_LINK_UNREF_ON_RELEASE, + &local_err); object_property_add_uint32_ptr(obj, "head", &s->head, &local_err); @@ -58,6 +58,7 @@ int main(int argc, char **argv) #include <glib.h> +#include "qemu/sockets.h" #include "hw/hw.h" #include "hw/boards.h" #include "hw/usb.h" @@ -103,7 +104,6 @@ int main(int argc, char **argv) #include "disas/disas.h" -#include "qemu/sockets.h" #include "slirp/libslirp.h" @@ -1589,14 +1589,16 @@ static void machine_class_init(ObjectClass *oc, void *data) int qemu_register_machine(QEMUMachine *m) { + char *name = g_strconcat(m->name, TYPE_MACHINE_SUFFIX, NULL); TypeInfo ti = { - .name = g_strconcat(m->name, TYPE_MACHINE_SUFFIX, NULL), + .name = name, .parent = TYPE_MACHINE, .class_init = machine_class_init, .class_data = (void *)m, }; type_register(&ti); + g_free(name); return 0; } |