diff options
| -rw-r--r-- | target/mips/translate.c | 8 | ||||
| -rw-r--r-- | target/mips/translate.h | 2 |
2 files changed, 3 insertions, 7 deletions
diff --git a/target/mips/translate.c b/target/mips/translate.c index d4d5d294f3..7e8afb363a 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -2971,18 +2971,16 @@ static inline void check_ps(DisasContext *ctx) check_cp1_64bitmode(ctx); } -#ifdef TARGET_MIPS64 /* - * This code generates a "reserved instruction" exception if 64-bit - * instructions are not enabled. + * This code generates a "reserved instruction" exception if cpu is not + * 64-bit or 64-bit instructions are not enabled. */ void check_mips_64(DisasContext *ctx) { - if (unlikely(!(ctx->hflags & MIPS_HFLAG_64))) { + if (unlikely((TARGET_LONG_BITS != 64) || !(ctx->hflags & MIPS_HFLAG_64))) { gen_reserved_instruction(ctx); } } -#endif #ifndef CONFIG_USER_ONLY static inline void check_mvh(DisasContext *ctx) diff --git a/target/mips/translate.h b/target/mips/translate.h index 1b918a439b..60e59675ef 100644 --- a/target/mips/translate.h +++ b/target/mips/translate.h @@ -129,9 +129,7 @@ void generate_exception_end(DisasContext *ctx, int excp); void gen_reserved_instruction(DisasContext *ctx); void check_insn(DisasContext *ctx, uint64_t flags); -#ifdef TARGET_MIPS64 void check_mips_64(DisasContext *ctx); -#endif void check_cp0_enabled(DisasContext *ctx); void check_cp1_enabled(DisasContext *ctx); void check_cp1_64bitmode(DisasContext *ctx); |