diff options
-rw-r--r-- | dma-helpers.c | 24 | ||||
-rw-r--r-- | exec.c | 3 | ||||
-rw-r--r-- | hw/block/nvme.c | 2 | ||||
-rw-r--r-- | hw/dma/pl330.c | 8 | ||||
-rw-r--r-- | hw/ide/ahci.c | 18 | ||||
-rw-r--r-- | hw/ide/ahci.h | 4 | ||||
-rw-r--r-- | hw/ide/ich.c | 2 | ||||
-rw-r--r-- | hw/ide/macio.c | 4 | ||||
-rw-r--r-- | hw/pci/pci.c | 4 | ||||
-rw-r--r-- | hw/ppc/spapr_vio.c | 1 | ||||
-rw-r--r-- | hw/scsi/megasas.c | 4 | ||||
-rw-r--r-- | hw/scsi/virtio-scsi.c | 2 | ||||
-rw-r--r-- | hw/scsi/vmw_pvscsi.c | 2 | ||||
-rw-r--r-- | hw/sd/sdhci.c | 22 | ||||
-rw-r--r-- | hw/usb/hcd-ehci-pci.c | 4 | ||||
-rw-r--r-- | hw/usb/hcd-ehci-sysbus.c | 2 | ||||
-rw-r--r-- | hw/usb/hcd-ehci.c | 12 | ||||
-rw-r--r-- | hw/usb/hcd-ehci.h | 2 | ||||
-rw-r--r-- | hw/usb/hcd-ohci.c | 30 | ||||
-rw-r--r-- | hw/usb/libhw.c | 4 | ||||
-rw-r--r-- | include/hw/pci/pci.h | 17 | ||||
-rw-r--r-- | include/hw/ppc/spapr_vio.h | 19 | ||||
-rw-r--r-- | include/sysemu/dma.h | 75 |
23 files changed, 117 insertions, 148 deletions
diff --git a/dma-helpers.c b/dma-helpers.c index c53705a63d..5afba47478 100644 --- a/dma-helpers.c +++ b/dma-helpers.c @@ -14,11 +14,9 @@ /* #define DEBUG_IOMMU */ -int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len) +int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len) { - AddressSpace *as = dma->as; - - dma_barrier(dma, DMA_DIRECTION_FROM_DEVICE); + dma_barrier(as, DMA_DIRECTION_FROM_DEVICE); #define FILLBUF_SIZE 512 uint8_t fillbuf[FILLBUF_SIZE]; @@ -36,13 +34,13 @@ int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len) return error; } -void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma) +void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as) { qsg->sg = g_malloc(alloc_hint * sizeof(ScatterGatherEntry)); qsg->nsg = 0; qsg->nalloc = alloc_hint; qsg->size = 0; - qsg->dma = dma; + qsg->as = as; } void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len) @@ -102,7 +100,7 @@ static void dma_bdrv_unmap(DMAAIOCB *dbs) int i; for (i = 0; i < dbs->iov.niov; ++i) { - dma_memory_unmap(dbs->sg->dma, dbs->iov.iov[i].iov_base, + dma_memory_unmap(dbs->sg->as, dbs->iov.iov[i].iov_base, dbs->iov.iov[i].iov_len, dbs->dir, dbs->iov.iov[i].iov_len); } @@ -150,7 +148,7 @@ static void dma_bdrv_cb(void *opaque, int ret) while (dbs->sg_cur_index < dbs->sg->nsg) { cur_addr = dbs->sg->sg[dbs->sg_cur_index].base + dbs->sg_cur_byte; cur_len = dbs->sg->sg[dbs->sg_cur_index].len - dbs->sg_cur_byte; - mem = dma_memory_map(dbs->sg->dma, cur_addr, &cur_len, dbs->dir); + mem = dma_memory_map(dbs->sg->as, cur_addr, &cur_len, dbs->dir); if (!mem) break; qemu_iovec_add(&dbs->iov, mem, cur_len); @@ -247,7 +245,7 @@ static uint64_t dma_buf_rw(uint8_t *ptr, int32_t len, QEMUSGList *sg, while (len > 0) { ScatterGatherEntry entry = sg->sg[sg_cur_index++]; int32_t xfer = MIN(len, entry.len); - dma_memory_rw(sg->dma, entry.base, ptr, xfer, dir); + dma_memory_rw(sg->as, entry.base, ptr, xfer, dir); ptr += xfer; len -= xfer; resid -= xfer; @@ -271,11 +269,3 @@ void dma_acct_start(BlockDriverState *bs, BlockAcctCookie *cookie, { bdrv_acct_start(bs, cookie, sg->size, type); } - -void dma_context_init(DMAContext *dma, AddressSpace *as) -{ -#ifdef DEBUG_IOMMU - fprintf(stderr, "dma_context_init(%p -> %p)\n", dma, as); -#endif - dma->as = as; -} @@ -63,7 +63,6 @@ static MemoryRegion *system_io; AddressSpace address_space_io; AddressSpace address_space_memory; -DMAContext dma_context_memory; MemoryRegion io_mem_rom, io_mem_notdirty; static MemoryRegion io_mem_unassigned; @@ -1839,8 +1838,6 @@ static void memory_map_init(void) memory_listener_register(&core_memory_listener, &address_space_memory); memory_listener_register(&io_memory_listener, &address_space_io); memory_listener_register(&tcg_memory_listener, &address_space_memory); - - dma_context_init(&dma_context_memory, &address_space_memory); } MemoryRegion *get_system_memory(void) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 5db941cc68..58b0d91d0a 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -85,7 +85,7 @@ static uint16_t nvme_map_prp(QEMUSGList *qsg, uint64_t prp1, uint64_t prp2, return NVME_INVALID_FIELD | NVME_DNR; } - qemu_sglist_init(qsg, num_prps, pci_dma_context(&n->parent_obj)); + pci_dma_sglist_init(qsg, &n->parent_obj, num_prps); qemu_sglist_add(qsg, prp1, trans_len); len -= trans_len; if (len) { diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c index 60f5299e10..044c0876ad 100644 --- a/hw/dma/pl330.c +++ b/hw/dma/pl330.c @@ -1074,7 +1074,7 @@ static inline const PL330InsnDesc *pl330_fetch_insn(PL330Chan *ch) uint8_t opcode; int i; - dma_memory_read(&dma_context_memory, ch->pc, &opcode, 1); + dma_memory_read(&address_space_memory, ch->pc, &opcode, 1); for (i = 0; insn_desc[i].size; i++) { if ((opcode & insn_desc[i].opmask) == insn_desc[i].opcode) { return &insn_desc[i]; @@ -1088,7 +1088,7 @@ static inline void pl330_exec_insn(PL330Chan *ch, const PL330InsnDesc *insn) uint8_t buf[PL330_INSN_MAXSIZE]; assert(insn->size <= PL330_INSN_MAXSIZE); - dma_memory_read(&dma_context_memory, ch->pc, buf, insn->size); + dma_memory_read(&address_space_memory, ch->pc, buf, insn->size); insn->exec(ch, buf[0], &buf[1], insn->size - 1); } @@ -1153,7 +1153,7 @@ static int pl330_exec_cycle(PL330Chan *channel) if (q != NULL && q->len <= pl330_fifo_num_free(&s->fifo)) { int len = q->len - (q->addr & (q->len - 1)); - dma_memory_read(&dma_context_memory, q->addr, buf, len); + dma_memory_read(&address_space_memory, q->addr, buf, len); if (PL330_ERR_DEBUG > 1) { DB_PRINT("PL330 read from memory @%08x (size = %08x):\n", q->addr, len); @@ -1185,7 +1185,7 @@ static int pl330_exec_cycle(PL330Chan *channel) fifo_res = pl330_fifo_get(&s->fifo, buf, len, q->tag); } if (fifo_res == PL330_FIFO_OK || q->z) { - dma_memory_write(&dma_context_memory, q->addr, buf, len); + dma_memory_write(&address_space_memory, q->addr, buf, len); if (PL330_ERR_DEBUG > 1) { DB_PRINT("PL330 read from memory @%08x (size = %08x):\n", q->addr, len); diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c index eab60961bd..1adfa0b260 100644 --- a/hw/ide/ahci.c +++ b/hw/ide/ahci.c @@ -597,7 +597,7 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis) if (!cmd_fis) { /* map cmd_fis */ uint64_t tbl_addr = le64_to_cpu(ad->cur_cmd->tbl_addr); - cmd_fis = dma_memory_map(ad->hba->dma, tbl_addr, &cmd_len, + cmd_fis = dma_memory_map(ad->hba->as, tbl_addr, &cmd_len, DMA_DIRECTION_TO_DEVICE); cmd_mapped = 1; } @@ -630,7 +630,7 @@ static void ahci_write_fis_d2h(AHCIDevice *ad, uint8_t *cmd_fis) ahci_trigger_irq(ad->hba, ad, PORT_IRQ_D2H_REG_FIS); if (cmd_mapped) { - dma_memory_unmap(ad->hba->dma, cmd_fis, cmd_len, + dma_memory_unmap(ad->hba->as, cmd_fis, cmd_len, DMA_DIRECTION_TO_DEVICE, cmd_len); } } @@ -657,7 +657,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) } /* map PRDT */ - if (!(prdt = dma_memory_map(ad->hba->dma, prdt_addr, &prdt_len, + if (!(prdt = dma_memory_map(ad->hba->as, prdt_addr, &prdt_len, DMA_DIRECTION_TO_DEVICE))){ DPRINTF(ad->port_no, "map failed\n"); return -1; @@ -691,7 +691,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) goto out; } - qemu_sglist_init(sglist, (sglist_alloc_hint - off_idx), ad->hba->dma); + qemu_sglist_init(sglist, (sglist_alloc_hint - off_idx), ad->hba->as); qemu_sglist_add(sglist, le64_to_cpu(tbl[off_idx].addr + off_pos), le32_to_cpu(tbl[off_idx].flags_size) + 1 - off_pos); @@ -703,7 +703,7 @@ static int ahci_populate_sglist(AHCIDevice *ad, QEMUSGList *sglist, int offset) } out: - dma_memory_unmap(ad->hba->dma, prdt, prdt_len, + dma_memory_unmap(ad->hba->as, prdt, prdt_len, DMA_DIRECTION_TO_DEVICE, prdt_len); return r; } @@ -836,7 +836,7 @@ static int handle_cmd(AHCIState *s, int port, int slot) tbl_addr = le64_to_cpu(cmd->tbl_addr); cmd_len = 0x80; - cmd_fis = dma_memory_map(s->dma, tbl_addr, &cmd_len, + cmd_fis = dma_memory_map(s->as, tbl_addr, &cmd_len, DMA_DIRECTION_FROM_DEVICE); if (!cmd_fis) { @@ -963,7 +963,7 @@ static int handle_cmd(AHCIState *s, int port, int slot) } out: - dma_memory_unmap(s->dma, cmd_fis, cmd_len, DMA_DIRECTION_FROM_DEVICE, + dma_memory_unmap(s->as, cmd_fis, cmd_len, DMA_DIRECTION_FROM_DEVICE, cmd_len); if (s->dev[port].port.ifs[0].status & (BUSY_STAT|DRQ_STAT)) { @@ -1145,12 +1145,12 @@ static const IDEDMAOps ahci_dma_ops = { .reset = ahci_dma_reset, }; -void ahci_init(AHCIState *s, DeviceState *qdev, DMAContext *dma, int ports) +void ahci_init(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports) { qemu_irq *irqs; int i; - s->dma = dma; + s->as = as; s->ports = ports; s->dev = g_malloc0(sizeof(AHCIDevice) * ports); ahci_reg_init(s); diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h index 85f37fe99d..341a5711ee 100644 --- a/hw/ide/ahci.h +++ b/hw/ide/ahci.h @@ -297,7 +297,7 @@ typedef struct AHCIState { uint32_t idp_index; /* Current IDP index */ int32_t ports; qemu_irq irq; - DMAContext *dma; + AddressSpace *as; } AHCIState; typedef struct AHCIPCIState { @@ -338,7 +338,7 @@ typedef struct NCQFrame { uint8_t reserved10; } QEMU_PACKED NCQFrame; -void ahci_init(AHCIState *s, DeviceState *qdev, DMAContext *dma, int ports); +void ahci_init(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports); void ahci_uninit(AHCIState *s); void ahci_reset(AHCIState *s); diff --git a/hw/ide/ich.c b/hw/ide/ich.c index ed1f1a287e..6c0c0c2935 100644 --- a/hw/ide/ich.c +++ b/hw/ide/ich.c @@ -104,7 +104,7 @@ static int pci_ich9_ahci_init(PCIDevice *dev) uint8_t *sata_cap; d = DO_UPCAST(struct AHCIPCIState, card, dev); - ahci_init(&d->ahci, &dev->qdev, pci_dma_context(dev), 6); + ahci_init(&d->ahci, &dev->qdev, pci_get_address_space(dev), 6); pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1); diff --git a/hw/ide/macio.c b/hw/ide/macio.c index e1e4f41597..a1952b077c 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -71,7 +71,7 @@ static void pmac_ide_atapi_transfer_cb(void *opaque, int ret) s->io_buffer_size = io->len; qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1, - &dma_context_memory); + &address_space_memory); qemu_sglist_add(&s->sg, io->addr, io->len); io->addr += io->len; io->len = 0; @@ -128,7 +128,7 @@ static void pmac_ide_transfer_cb(void *opaque, int ret) s->io_buffer_size = io->len; qemu_sglist_init(&s->sg, io->len / MACIO_PAGE_SIZE + 1, - &dma_context_memory); + &address_space_memory); qemu_sglist_add(&s->sg, io->addr, io->len); io->addr += io->len; io->len = 0; diff --git a/hw/pci/pci.c b/hw/pci/pci.c index ed9c8a1f91..104fe711b6 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -815,8 +815,6 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, dma_as->root, 0, memory_region_size(dma_as->root)); memory_region_set_enabled(&pci_dev->bus_master_enable_region, false); address_space_init(&pci_dev->bus_master_as, &pci_dev->bus_master_enable_region); - pci_dev->dma = g_new(DMAContext, 1); - dma_context_init(pci_dev->dma, &pci_dev->bus_master_as); pci_dev->devfn = devfn; pstrcpy(pci_dev->name, sizeof(pci_dev->name), name); @@ -873,8 +871,6 @@ static void do_pci_unregister_device(PCIDevice *pci_dev) address_space_destroy(&pci_dev->bus_master_as); memory_region_destroy(&pci_dev->bus_master_enable_region); - g_free(pci_dev->dma); - pci_dev->dma = NULL; } static void pci_unregister_io_regions(PCIDevice *pci_dev) diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 09cda646b0..459c9f2a35 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -455,7 +455,6 @@ static int spapr_vio_busdev_init(DeviceState *qdev) uint32_t liobn = SPAPR_VIO_BASE_LIOBN | dev->reg; dev->tcet = spapr_tce_new_table(liobn, pc->rtce_window_size); address_space_init(&dev->as, spapr_tce_get_iommu(dev->tcet)); - dma_context_init(&dev->dma, &dev->as); } return pc->init(dev); diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index fe6550ca54..65ccb09ba1 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -232,7 +232,7 @@ static int megasas_map_sgl(MegasasState *s, MegasasCmd *cmd, union mfi_sgl *sgl) MEGASAS_MAX_SGE); return iov_count; } - qemu_sglist_init(&cmd->qsg, iov_count, pci_dma_context(&s->dev)); + pci_dma_sglist_init(&cmd->qsg, &s->dev, iov_count); for (i = 0; i < iov_count; i++) { dma_addr_t iov_pa, iov_size_p; @@ -628,7 +628,7 @@ static int megasas_map_dcmd(MegasasState *s, MegasasCmd *cmd) } iov_pa = megasas_sgl_get_addr(cmd, &cmd->frame->dcmd.sgl); iov_size = megasas_sgl_get_len(cmd, &cmd->frame->dcmd.sgl); - qemu_sglist_init(&cmd->qsg, 1, pci_dma_context(&s->dev)); + pci_dma_sglist_init(&cmd->qsg, &s->dev, 1); qemu_sglist_add(&cmd->qsg, iov_pa, iov_size); cmd->iov_size = iov_size; return cmd->iov_size; diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c index 08dd3f34c3..b8a0abf0f0 100644 --- a/hw/scsi/virtio-scsi.c +++ b/hw/scsi/virtio-scsi.c @@ -80,7 +80,7 @@ static void virtio_scsi_bad_req(void) static void qemu_sgl_init_external(QEMUSGList *qsgl, struct iovec *sg, hwaddr *addr, int num) { - qemu_sglist_init(qsgl, num, &dma_context_memory); + qemu_sglist_init(qsgl, num, &address_space_memory); while (num--) { qemu_sglist_add(qsgl, *(addr++), (sg++)->iov_len); } diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index 446f72374b..7cf4044591 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -617,7 +617,7 @@ pvscsi_build_sglist(PVSCSIState *s, PVSCSIRequest *r) { PCIDevice *d = PCI_DEVICE(s); - qemu_sglist_init(&r->sgl, 1, pci_dma_context(d)); + pci_dma_sglist_init(&r->sgl, d, 1); if (r->req.flags & PVSCSI_FLAG_CMD_WITH_SG_LIST) { pvscsi_convert_sglist(r); } else { diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index e64899cafb..00650674bd 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -496,7 +496,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s) s->blkcnt--; } } - dma_memory_write(&dma_context_memory, s->sdmasysad, + dma_memory_write(&address_space_memory, s->sdmasysad, &s->fifo_buffer[begin], s->data_count - begin); s->sdmasysad += s->data_count - begin; if (s->data_count == block_size) { @@ -518,7 +518,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState *s) s->data_count = block_size; boundary_count -= block_size - begin; } - dma_memory_read(&dma_context_memory, s->sdmasysad, + dma_memory_read(&address_space_memory, s->sdmasysad, &s->fifo_buffer[begin], s->data_count); s->sdmasysad += s->data_count - begin; if (s->data_count == block_size) { @@ -557,10 +557,10 @@ static void sdhci_sdma_transfer_single_block(SDHCIState *s) for (n = 0; n < datacnt; n++) { s->fifo_buffer[n] = sd_read_data(s->card); } - dma_memory_write(&dma_context_memory, s->sdmasysad, s->fifo_buffer, + dma_memory_write(&address_space_memory, s->sdmasysad, s->fifo_buffer, datacnt); } else { - dma_memory_read(&dma_context_memory, s->sdmasysad, s->fifo_buffer, + dma_memory_read(&address_space_memory, s->sdmasysad, s->fifo_buffer, datacnt); for (n = 0; n < datacnt; n++) { sd_write_data(s->card, s->fifo_buffer[n]); @@ -588,7 +588,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) hwaddr entry_addr = (hwaddr)s->admasysaddr; switch (SDHC_DMA_TYPE(s->hostctl)) { case SDHC_CTRL_ADMA2_32: - dma_memory_read(&dma_context_memory, entry_addr, (uint8_t *)&adma2, + dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adma2, sizeof(adma2)); adma2 = le64_to_cpu(adma2); /* The spec does not specify endianness of descriptor table. @@ -600,7 +600,7 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) dscr->incr = 8; break; case SDHC_CTRL_ADMA1_32: - dma_memory_read(&dma_context_memory, entry_addr, (uint8_t *)&adma1, + dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adma1, sizeof(adma1)); adma1 = le32_to_cpu(adma1); dscr->addr = (hwaddr)(adma1 & 0xFFFFF000); @@ -613,12 +613,12 @@ static void get_adma_description(SDHCIState *s, ADMADescr *dscr) } break; case SDHC_CTRL_ADMA2_64: - dma_memory_read(&dma_context_memory, entry_addr, + dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)(&dscr->attr), 1); - dma_memory_read(&dma_context_memory, entry_addr + 2, + dma_memory_read(&address_space_memory, entry_addr + 2, (uint8_t *)(&dscr->length), 2); dscr->length = le16_to_cpu(dscr->length); - dma_memory_read(&dma_context_memory, entry_addr + 4, + dma_memory_read(&address_space_memory, entry_addr + 4, (uint8_t *)(&dscr->addr), 8); dscr->attr = le64_to_cpu(dscr->attr); dscr->attr &= 0xfffffff8; @@ -678,7 +678,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count = block_size; length -= block_size - begin; } - dma_memory_write(&dma_context_memory, dscr.addr, + dma_memory_write(&address_space_memory, dscr.addr, &s->fifo_buffer[begin], s->data_count - begin); dscr.addr += s->data_count - begin; @@ -702,7 +702,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count = block_size; length -= block_size - begin; } - dma_memory_read(&dma_context_memory, dscr.addr, + dma_memory_read(&address_space_memory, dscr.addr, &s->fifo_buffer[begin], s->data_count); dscr.addr += s->data_count - begin; if (s->data_count == block_size) { diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c index 0eb78269f7..f1b5f5d29c 100644 --- a/hw/usb/hcd-ehci-pci.c +++ b/hw/usb/hcd-ehci-pci.c @@ -63,7 +63,7 @@ static int usb_ehci_pci_initfn(PCIDevice *dev) s->caps[0x09] = 0x68; /* EECP */ s->irq = dev->irq[3]; - s->dma = pci_dma_context(dev); + s->as = pci_get_address_space(dev); s->capsbase = 0x00; s->opregbase = 0x20; @@ -86,7 +86,7 @@ static void usb_ehci_pci_write_config(PCIDevice *dev, uint32_t addr, return; } busmaster = pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_MASTER; - i->ehci.dma = busmaster ? pci_dma_context(dev) : NULL; + i->ehci.as = busmaster ? pci_get_address_space(dev) : &address_space_memory; } static Property ehci_pci_properties[] = { diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c index b68a66a63b..f9e4fd3474 100644 --- a/hw/usb/hcd-ehci-sysbus.c +++ b/hw/usb/hcd-ehci-sysbus.c @@ -40,7 +40,7 @@ static int usb_ehci_sysbus_initfn(SysBusDevice *dev) s->capsbase = sec->capsbase; s->opregbase = sec->opregbase; - s->dma = &dma_context_memory; + s->as = &address_space_memory; usb_ehci_initfn(s, DEVICE(dev)); sysbus_init_irq(dev, &s->irq); diff --git a/hw/usb/hcd-ehci.c b/hw/usb/hcd-ehci.c index 0d3799d443..1ad215931e 100644 --- a/hw/usb/hcd-ehci.c +++ b/hw/usb/hcd-ehci.c @@ -446,7 +446,7 @@ static inline int get_dwords(EHCIState *ehci, uint32_t addr, { int i; - if (!ehci->dma) { + if (!ehci->as) { ehci_raise_irq(ehci, USBSTS_HSE); ehci->usbcmd &= ~USBCMD_RUNSTOP; trace_usb_ehci_dma_error(); @@ -454,7 +454,7 @@ static inline int get_dwords(EHCIState *ehci, uint32_t addr, } for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { - dma_memory_read(ehci->dma, addr, buf, sizeof(*buf)); + dma_memory_read(ehci->as, addr, buf, sizeof(*buf)); *buf = le32_to_cpu(*buf); } @@ -467,7 +467,7 @@ static inline int put_dwords(EHCIState *ehci, uint32_t addr, { int i; - if (!ehci->dma) { + if (!ehci->as) { ehci_raise_irq(ehci, USBSTS_HSE); ehci->usbcmd &= ~USBCMD_RUNSTOP; trace_usb_ehci_dma_error(); @@ -476,7 +476,7 @@ static inline int put_dwords(EHCIState *ehci, uint32_t addr, for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { uint32_t tmp = cpu_to_le32(*buf); - dma_memory_write(ehci->dma, addr, &tmp, sizeof(tmp)); + dma_memory_write(ehci->as, addr, &tmp, sizeof(tmp)); } return num; @@ -1245,7 +1245,7 @@ static int ehci_init_transfer(EHCIPacket *p) cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE); bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES); offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK; - qemu_sglist_init(&p->sgl, 5, p->queue->ehci->dma); + qemu_sglist_init(&p->sgl, 5, p->queue->ehci->as); while (bytes > 0) { if (cpage > 4) { @@ -1484,7 +1484,7 @@ static int ehci_process_itd(EHCIState *ehci, return -1; } - qemu_sglist_init(&ehci->isgl, 2, ehci->dma); + qemu_sglist_init(&ehci->isgl, 2, ehci->as); if (off + len > 4096) { /* transfer crosses page border */ uint32_t len2 = off + len - 4096; diff --git a/hw/usb/hcd-ehci.h b/hw/usb/hcd-ehci.h index e95bb7ec46..2fcb92f12b 100644 --- a/hw/usb/hcd-ehci.h +++ b/hw/usb/hcd-ehci.h @@ -261,7 +261,7 @@ struct EHCIState { USBBus bus; qemu_irq irq; MemoryRegion mem; - DMAContext *dma; + AddressSpace *as; MemoryRegion mem_caps; MemoryRegion mem_opreg; MemoryRegion mem_ports; diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 51241cda78..5513924138 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -62,7 +62,7 @@ typedef struct { USBBus bus; qemu_irq irq; MemoryRegion mem; - DMAContext *dma; + AddressSpace *as; int num_ports; const char *name; @@ -508,7 +508,7 @@ static inline int get_dwords(OHCIState *ohci, addr += ohci->localmem_base; for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { - dma_memory_read(ohci->dma, addr, buf, sizeof(*buf)); + dma_memory_read(ohci->as, addr, buf, sizeof(*buf)); *buf = le32_to_cpu(*buf); } @@ -525,7 +525,7 @@ static inline int put_dwords(OHCIState *ohci, for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { uint32_t tmp = cpu_to_le32(*buf); - dma_memory_write(ohci->dma, addr, &tmp, sizeof(tmp)); + dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp)); } return 1; @@ -540,7 +540,7 @@ static inline int get_words(OHCIState *ohci, addr += ohci->localmem_base; for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { - dma_memory_read(ohci->dma, addr, buf, sizeof(*buf)); + dma_memory_read(ohci->as, addr, buf, sizeof(*buf)); *buf = le16_to_cpu(*buf); } @@ -557,7 +557,7 @@ static inline int put_words(OHCIState *ohci, for (i = 0; i < num; i++, buf++, addr += sizeof(*buf)) { uint16_t tmp = cpu_to_le16(*buf); - dma_memory_write(ohci->dma, addr, &tmp, sizeof(tmp)); + dma_memory_write(ohci->as, addr, &tmp, sizeof(tmp)); } return 1; @@ -585,7 +585,7 @@ static inline int ohci_read_iso_td(OHCIState *ohci, static inline int ohci_read_hcca(OHCIState *ohci, dma_addr_t addr, struct ohci_hcca *hcca) { - dma_memory_read(ohci->dma, addr + ohci->localmem_base, hcca, sizeof(*hcca)); + dma_memory_read(ohci->as, addr + ohci->localmem_base, hcca, sizeof(*hcca)); return 1; } @@ -617,7 +617,7 @@ static inline int ohci_put_iso_td(OHCIState *ohci, static inline int ohci_put_hcca(OHCIState *ohci, dma_addr_t addr, struct ohci_hcca *hcca) { - dma_memory_write(ohci->dma, + dma_memory_write(ohci->as, addr + ohci->localmem_base + HCCA_WRITEBACK_OFFSET, (char *)hcca + HCCA_WRITEBACK_OFFSET, HCCA_WRITEBACK_SIZE); @@ -634,12 +634,12 @@ static void ohci_copy_td(OHCIState *ohci, struct ohci_td *td, n = 0x1000 - (ptr & 0xfff); if (n > len) n = len; - dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, n, dir); + dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir); if (n == len) return; ptr = td->be & ~0xfffu; buf += n; - dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, len - n, dir); + dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, len - n, dir); } /* Read/Write the contents of an ISO TD from/to main memory. */ @@ -653,12 +653,12 @@ static void ohci_copy_iso_td(OHCIState *ohci, n = 0x1000 - (ptr & 0xfff); if (n > len) n = len; - dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, n, dir); + dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, n, dir); if (n == len) return; ptr = end_addr & ~0xfffu; buf += n; - dma_memory_rw(ohci->dma, ptr + ohci->localmem_base, buf, len - n, dir); + dma_memory_rw(ohci->as, ptr + ohci->localmem_base, buf, len - n, dir); } static void ohci_process_lists(OHCIState *ohci, int completion); @@ -1788,11 +1788,11 @@ static USBBusOps ohci_bus_ops = { static int usb_ohci_init(OHCIState *ohci, DeviceState *dev, int num_ports, dma_addr_t localmem_base, char *masterbus, uint32_t firstport, - DMAContext *dma) + AddressSpace *as) { int i; - ohci->dma = dma; + ohci->as = as; if (usb_frame_time == 0) { #ifdef OHCI_TIME_WARP @@ -1859,7 +1859,7 @@ static int usb_ohci_initfn_pci(struct PCIDevice *dev) if (usb_ohci_init(&ohci->state, &dev->qdev, ohci->num_ports, 0, ohci->masterbus, ohci->firstport, - pci_dma_context(dev)) != 0) { + pci_get_address_space(dev)) != 0) { return -1; } ohci->state.irq = ohci->pci_dev.irq[0]; @@ -1882,7 +1882,7 @@ static int ohci_init_pxa(SysBusDevice *dev) /* Cannot fail as we pass NULL for masterbus */ usb_ohci_init(&s->ohci, &dev->qdev, s->num_ports, s->dma_offset, NULL, 0, - &dma_context_memory); + &address_space_memory); sysbus_init_irq(dev, &s->ohci.irq); sysbus_init_mmio(dev, &s->ohci.mem); diff --git a/hw/usb/libhw.c b/hw/usb/libhw.c index d2d4b51b94..8df11c461f 100644 --- a/hw/usb/libhw.c +++ b/hw/usb/libhw.c @@ -37,7 +37,7 @@ int usb_packet_map(USBPacket *p, QEMUSGList *sgl) while (len) { dma_addr_t xlen = len; - mem = dma_memory_map(sgl->dma, base, &xlen, dir); + mem = dma_memory_map(sgl->as, base, &xlen, dir); if (!mem) { goto err; } @@ -63,7 +63,7 @@ void usb_packet_unmap(USBPacket *p, QEMUSGList *sgl) int i; for (i = 0; i < p->iov.niov; i++) { - dma_memory_unmap(sgl->dma, p->iov.iov[i].iov_base, + dma_memory_unmap(sgl->as, p->iov.iov[i].iov_base, p->iov.iov[i].iov_len, dir, p->iov.iov[i].iov_len); } diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 3a85bce2ec..6ef1f97393 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -242,7 +242,6 @@ struct PCIDevice { PCIIORegion io_regions[PCI_NUM_REGIONS]; AddressSpace bus_master_as; MemoryRegion bus_master_enable_region; - DMAContext *dma; /* do not access the following fields */ PCIConfigReadFunc *config_read; @@ -639,15 +638,15 @@ static inline uint32_t pci_config_size(const PCIDevice *d) } /* DMA access functions */ -static inline DMAContext *pci_dma_context(PCIDevice *dev) +static inline AddressSpace *pci_get_address_space(PCIDevice *dev) { - return dev->dma; + return &dev->bus_master_as; } static inline int pci_dma_rw(PCIDevice *dev, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { - dma_memory_rw(pci_dma_context(dev), addr, buf, len, dir); + dma_memory_rw(pci_get_address_space(dev), addr, buf, len, dir); return 0; } @@ -667,12 +666,12 @@ static inline int pci_dma_write(PCIDevice *dev, dma_addr_t addr, static inline uint##_bits##_t ld##_l##_pci_dma(PCIDevice *dev, \ dma_addr_t addr) \ { \ - return ld##_l##_dma(pci_dma_context(dev), addr); \ + return ld##_l##_dma(pci_get_address_space(dev), addr); \ } \ static inline void st##_s##_pci_dma(PCIDevice *dev, \ dma_addr_t addr, uint##_bits##_t val) \ { \ - st##_s##_dma(pci_dma_context(dev), addr, val); \ + st##_s##_dma(pci_get_address_space(dev), addr, val); \ } PCI_DMA_DEFINE_LDST(ub, b, 8); @@ -690,20 +689,20 @@ static inline void *pci_dma_map(PCIDevice *dev, dma_addr_t addr, { void *buf; - buf = dma_memory_map(pci_dma_context(dev), addr, plen, dir); + buf = dma_memory_map(pci_get_address_space(dev), addr, plen, dir); return buf; } static inline void pci_dma_unmap(PCIDevice *dev, void *buffer, dma_addr_t len, DMADirection dir, dma_addr_t access_len) { - dma_memory_unmap(pci_dma_context(dev), buffer, len, dir, access_len); + dma_memory_unmap(pci_get_address_space(dev), buffer, len, dir, access_len); } static inline void pci_dma_sglist_init(QEMUSGList *qsg, PCIDevice *dev, int alloc_hint) { - qemu_sglist_init(qsg, alloc_hint, pci_dma_context(dev)); + qemu_sglist_init(qsg, alloc_hint, pci_get_address_space(dev)); } extern const VMStateDescription vmstate_pci_device; diff --git a/include/hw/ppc/spapr_vio.h b/include/hw/ppc/spapr_vio.h index 2de58f1753..36093270e6 100644 --- a/include/hw/ppc/spapr_vio.h +++ b/include/hw/ppc/spapr_vio.h @@ -64,7 +64,6 @@ struct VIOsPAPRDevice { target_ulong signal_state; VIOsPAPR_CRQ crq; AddressSpace as; - DMAContext dma; sPAPRTCETable *tcet; }; @@ -93,35 +92,35 @@ static inline qemu_irq spapr_vio_qirq(VIOsPAPRDevice *dev) static inline bool spapr_vio_dma_valid(VIOsPAPRDevice *dev, uint64_t taddr, uint32_t size, DMADirection dir) { - return dma_memory_valid(&dev->dma, taddr, size, dir); + return dma_memory_valid(&dev->as, taddr, size, dir); } static inline int spapr_vio_dma_read(VIOsPAPRDevice *dev, uint64_t taddr, void *buf, uint32_t size) { - return (dma_memory_read(&dev->dma, taddr, buf, size) != 0) ? + return (dma_memory_read(&dev->as, taddr, buf, size) != 0) ? H_DEST_PARM : H_SUCCESS; } static inline int spapr_vio_dma_write(VIOsPAPRDevice *dev, uint64_t taddr, const void *buf, uint32_t size) { - return (dma_memory_write(&dev->dma, taddr, buf, size) != 0) ? + return (dma_memory_write(&dev->as, taddr, buf, size) != 0) ? H_DEST_PARM : H_SUCCESS; } static inline int spapr_vio_dma_set(VIOsPAPRDevice *dev, uint64_t taddr, uint8_t c, uint32_t size) { - return (dma_memory_set(&dev->dma, taddr, c, size) != 0) ? + return (dma_memory_set(&dev->as, taddr, c, size) != 0) ? H_DEST_PARM : H_SUCCESS; } -#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->dma, (_addr), (_val))) -#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->dma, (_addr), (_val))) -#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->dma, (_addr), (_val))) -#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->dma, (_addr), (_val))) -#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->dma, (_addr))) +#define vio_stb(_dev, _addr, _val) (stb_dma(&(_dev)->as, (_addr), (_val))) +#define vio_sth(_dev, _addr, _val) (stw_be_dma(&(_dev)->as, (_addr), (_val))) +#define vio_stl(_dev, _addr, _val) (stl_be_dma(&(_dev)->as, (_addr), (_val))) +#define vio_stq(_dev, _addr, _val) (stq_be_dma(&(_dev)->as, (_addr), (_val))) +#define vio_ldq(_dev, _addr) (ldq_be_dma(&(_dev)->as, (_addr))) int spapr_vio_send_crq(VIOsPAPRDevice *dev, uint8_t *crq); diff --git a/include/sysemu/dma.h b/include/sysemu/dma.h index 3317dcfd06..031d1f5fb3 100644 --- a/include/sysemu/dma.h +++ b/include/sysemu/dma.h @@ -12,11 +12,11 @@ #include <stdio.h> #include "exec/memory.h" +#include "exec/address-spaces.h" #include "hw/hw.h" #include "block/block.h" #include "sysemu/kvm.h" -typedef struct DMAContext DMAContext; typedef struct ScatterGatherEntry ScatterGatherEntry; typedef enum { @@ -29,7 +29,7 @@ struct QEMUSGList { int nsg; int nalloc; size_t size; - DMAContext *dma; + AddressSpace *as; }; #ifndef CONFIG_USER_ONLY @@ -46,16 +46,7 @@ typedef uint64_t dma_addr_t; #define DMA_ADDR_BITS 64 #define DMA_ADDR_FMT "%" PRIx64 -struct DMAContext { - AddressSpace *as; -}; - -/* A global DMA context corresponding to the address_space_memory - * AddressSpace, for sysbus devices which do DMA. - */ -extern DMAContext dma_context_memory; - -static inline void dma_barrier(DMAContext *dma, DMADirection dir) +static inline void dma_barrier(AddressSpace *as, DMADirection dir) { /* * This is called before DMA read and write operations @@ -83,105 +74,105 @@ static inline void dma_barrier(DMAContext *dma, DMADirection dir) /* Checks that the given range of addresses is valid for DMA. This is * useful for certain cases, but usually you should just use * dma_memory_{read,write}() and check for errors */ -static inline bool dma_memory_valid(DMAContext *dma, +static inline bool dma_memory_valid(AddressSpace *as, dma_addr_t addr, dma_addr_t len, DMADirection dir) { - return address_space_access_valid(dma->as, addr, len, + return address_space_access_valid(as, addr, len, dir == DMA_DIRECTION_FROM_DEVICE); } -static inline int dma_memory_rw_relaxed(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_rw_relaxed(AddressSpace *as, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { - return address_space_rw(dma->as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE); + return address_space_rw(as, addr, buf, len, dir == DMA_DIRECTION_FROM_DEVICE); } -static inline int dma_memory_read_relaxed(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_read_relaxed(AddressSpace *as, dma_addr_t addr, void *buf, dma_addr_t len) { - return dma_memory_rw_relaxed(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE); + return dma_memory_rw_relaxed(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE); } -static inline int dma_memory_write_relaxed(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_write_relaxed(AddressSpace *as, dma_addr_t addr, const void *buf, dma_addr_t len) { - return dma_memory_rw_relaxed(dma, addr, (void *)buf, len, + return dma_memory_rw_relaxed(as, addr, (void *)buf, len, DMA_DIRECTION_FROM_DEVICE); } -static inline int dma_memory_rw(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_rw(AddressSpace *as, dma_addr_t addr, void *buf, dma_addr_t len, DMADirection dir) { - dma_barrier(dma, dir); + dma_barrier(as, dir); - return dma_memory_rw_relaxed(dma, addr, buf, len, dir); + return dma_memory_rw_relaxed(as, addr, buf, len, dir); } -static inline int dma_memory_read(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_read(AddressSpace *as, dma_addr_t addr, void *buf, dma_addr_t len) { - return dma_memory_rw(dma, addr, buf, len, DMA_DIRECTION_TO_DEVICE); + return dma_memory_rw(as, addr, buf, len, DMA_DIRECTION_TO_DEVICE); } -static inline int dma_memory_write(DMAContext *dma, dma_addr_t addr, +static inline int dma_memory_write(AddressSpace *as, dma_addr_t addr, const void *buf, dma_addr_t len) { - return dma_memory_rw(dma, addr, (void *)buf, len, + return dma_memory_rw(as, addr, (void *)buf, len, DMA_DIRECTION_FROM_DEVICE); } -int dma_memory_set(DMAContext *dma, dma_addr_t addr, uint8_t c, dma_addr_t len); +int dma_memory_set(AddressSpace *as, dma_addr_t addr, uint8_t c, dma_addr_t len); -static inline void *dma_memory_map(DMAContext *dma, +static inline void *dma_memory_map(AddressSpace *as, dma_addr_t addr, dma_addr_t *len, DMADirection dir) { hwaddr xlen = *len; void *p; - p = address_space_map(dma->as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE); + p = address_space_map(as, addr, &xlen, dir == DMA_DIRECTION_FROM_DEVICE); *len = xlen; return p; } -static inline void dma_memory_unmap(DMAContext *dma, +static inline void dma_memory_unmap(AddressSpace *as, void *buffer, dma_addr_t len, DMADirection dir, dma_addr_t access_len) { - address_space_unmap(dma->as, buffer, (hwaddr)len, + address_space_unmap(as, buffer, (hwaddr)len, dir == DMA_DIRECTION_FROM_DEVICE, access_len); } #define DEFINE_LDST_DMA(_lname, _sname, _bits, _end) \ - static inline uint##_bits##_t ld##_lname##_##_end##_dma(DMAContext *dma, \ + static inline uint##_bits##_t ld##_lname##_##_end##_dma(AddressSpace *as, \ dma_addr_t addr) \ { \ uint##_bits##_t val; \ - dma_memory_read(dma, addr, &val, (_bits) / 8); \ + dma_memory_read(as, addr, &val, (_bits) / 8); \ return _end##_bits##_to_cpu(val); \ } \ - static inline void st##_sname##_##_end##_dma(DMAContext *dma, \ + static inline void st##_sname##_##_end##_dma(AddressSpace *as, \ dma_addr_t addr, \ uint##_bits##_t val) \ { \ val = cpu_to_##_end##_bits(val); \ - dma_memory_write(dma, addr, &val, (_bits) / 8); \ + dma_memory_write(as, addr, &val, (_bits) / 8); \ } -static inline uint8_t ldub_dma(DMAContext *dma, dma_addr_t addr) +static inline uint8_t ldub_dma(AddressSpace *as, dma_addr_t addr) { uint8_t val; - dma_memory_read(dma, addr, &val, 1); + dma_memory_read(as, addr, &val, 1); return val; } -static inline void stb_dma(DMAContext *dma, dma_addr_t addr, uint8_t val) +static inline void stb_dma(AddressSpace *as, dma_addr_t addr, uint8_t val) { - dma_memory_write(dma, addr, &val, 1); + dma_memory_write(as, addr, &val, 1); } DEFINE_LDST_DMA(uw, w, 16, le); @@ -193,14 +184,12 @@ DEFINE_LDST_DMA(q, q, 64, be); #undef DEFINE_LDST_DMA -void dma_context_init(DMAContext *dma, AddressSpace *as); - struct ScatterGatherEntry { dma_addr_t base; dma_addr_t len; }; -void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, DMAContext *dma); +void qemu_sglist_init(QEMUSGList *qsg, int alloc_hint, AddressSpace *as); void qemu_sglist_add(QEMUSGList *qsg, dma_addr_t base, dma_addr_t len); void qemu_sglist_destroy(QEMUSGList *qsg); #endif |