diff options
-rw-r--r-- | cpu-all.h | 10 | ||||
-rw-r--r-- | target-alpha/helper.c | 5 | ||||
-rw-r--r-- | target-arm/helper.c | 5 | ||||
-rw-r--r-- | target-cris/helper.c | 5 | ||||
-rw-r--r-- | target-i386/helper.c | 5 | ||||
-rw-r--r-- | target-m68k/helper.c | 16 | ||||
-rw-r--r-- | target-microblaze/helper.c | 5 | ||||
-rw-r--r-- | target-mips/helper.c | 6 | ||||
-rw-r--r-- | target-ppc/helper.c | 5 | ||||
-rw-r--r-- | target-s390x/helper.c | 5 | ||||
-rw-r--r-- | target-sh4/helper.c | 5 | ||||
-rw-r--r-- | target-sparc/helper.c | 8 |
12 files changed, 16 insertions, 64 deletions
@@ -820,11 +820,6 @@ void cpu_watchpoint_remove_all(CPUState *env, int mask); void cpu_single_step(CPUState *env, int enabled); void cpu_reset(CPUState *s); -/* Return the physical page corresponding to a virtual one. Use it - only for debugging because no protection checks are done. Return -1 - if no page found. */ -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr); - #define CPU_LOG_TB_OUT_ASM (1 << 0) #define CPU_LOG_TB_IN_ASM (1 << 1) #define CPU_LOG_TB_OP (1 << 2) @@ -851,6 +846,11 @@ int cpu_str_to_log_mask(const char *str); #if !defined(CONFIG_USER_ONLY) +/* Return the physical page corresponding to a virtual one. Use it + only for debugging because no protection checks are done. Return -1 + if no page found. */ +target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr); + /* memory API */ extern int phys_ram_fd; diff --git a/target-alpha/helper.c b/target-alpha/helper.c index f35ca9ac54..46335cdf9c 100644 --- a/target-alpha/helper.c +++ b/target-alpha/helper.c @@ -173,11 +173,6 @@ int cpu_alpha_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) -{ - return addr; -} - void do_interrupt (CPUState *env) { env->exception_index = -1; diff --git a/target-arm/helper.c b/target-arm/helper.c index 6f40084b23..1a181acce3 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -483,11 +483,6 @@ int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) -{ - return addr; -} - /* These should probably raise undefined insn exceptions. */ void HELPER(set_cp)(CPUState *env, uint32_t insn, uint32_t val) { diff --git a/target-cris/helper.c b/target-cris/helper.c index a17a9f0cb5..b101dc5ad0 100644 --- a/target-cris/helper.c +++ b/target-cris/helper.c @@ -56,11 +56,6 @@ int cpu_cris_handle_mmu_fault(CPUState * env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) -{ - return addr; -} - #else /* !CONFIG_USER_ONLY */ diff --git a/target-i386/helper.c b/target-i386/helper.c index ce2b5eb346..f109d5a97e 100644 --- a/target-i386/helper.c +++ b/target-i386/helper.c @@ -1386,11 +1386,6 @@ int cpu_x86_handle_mmu_fault(CPUX86State *env, target_ulong addr, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) -{ - return addr; -} - #else /* XXX: This value should match the one returned by CPUID diff --git a/target-m68k/helper.c b/target-m68k/helper.c index 9f30a7479d..5d52bd34ea 100644 --- a/target-m68k/helper.c +++ b/target-m68k/helper.c @@ -342,14 +342,6 @@ void m68k_switch_sp(CPUM68KState *env) env->current_sp = new_sp; } -/* MMU */ - -/* TODO: This will need fixing once the MMU is implemented. */ -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) -{ - return addr; -} - #if defined(CONFIG_USER_ONLY) int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, @@ -362,6 +354,14 @@ int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #else +/* MMU */ + +/* TODO: This will need fixing once the MMU is implemented. */ +target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) +{ + return addr; +} + int cpu_m68k_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) { diff --git a/target-microblaze/helper.c b/target-microblaze/helper.c index 40d27b956e..d99840c735 100644 --- a/target-microblaze/helper.c +++ b/target-microblaze/helper.c @@ -45,11 +45,6 @@ int cpu_mb_handle_mmu_fault(CPUState * env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) -{ - return addr; -} - #else /* !CONFIG_USER_ONLY */ int cpu_mb_handle_mmu_fault (CPUState *env, target_ulong address, int rw, diff --git a/target-mips/helper.c b/target-mips/helper.c index a3f099f04b..43d11b351d 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -253,19 +253,17 @@ static void raise_mmu_exception(CPUState *env, target_ulong address, env->error_code = error_code; } +#if !defined(CONFIG_USER_ONLY) target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { -#if defined(CONFIG_USER_ONLY) - return addr; -#else target_phys_addr_t phys_addr; int prot; if (get_physical_address(env, &phys_addr, &prot, addr, 0, ACCESS_INT) != 0) return -1; return phys_addr; -#endif } +#endif int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int mmu_idx, int is_softmmu) diff --git a/target-ppc/helper.c b/target-ppc/helper.c index cd1c9fea0e..fc54d71802 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -97,11 +97,6 @@ int cpu_ppc_handle_mmu_fault (CPUState *env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug (CPUState *env, target_ulong addr) -{ - return addr; -} - #else /* Common routines used by software and hardware TLBs emulation */ static inline int pte_is_valid(target_ulong pte0) diff --git a/target-s390x/helper.c b/target-s390x/helper.c index 1322ffce03..b97d1ff8a4 100644 --- a/target-s390x/helper.c +++ b/target-s390x/helper.c @@ -46,11 +46,6 @@ CPUS390XState *cpu_s390x_init(const char *cpu_model) return env; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) -{ - return addr; -} - void cpu_reset(CPUS390XState *env) { if (qemu_loglevel_mask(CPU_LOG_RESET)) { diff --git a/target-sh4/helper.c b/target-sh4/helper.c index d2ff6691e0..486be5d511 100644 --- a/target-sh4/helper.c +++ b/target-sh4/helper.c @@ -53,11 +53,6 @@ int cpu_sh4_handle_mmu_fault(CPUState * env, target_ulong address, int rw, return 1; } -target_phys_addr_t cpu_get_phys_page_debug(CPUState * env, target_ulong addr) -{ - return addr; -} - int cpu_sh4_is_cached(CPUSH4State * env, target_ulong addr) { /* For user mode, only U0 area is cachable. */ diff --git a/target-sparc/helper.c b/target-sparc/helper.c index ffe93e3d44..976eb43d33 100644 --- a/target-sparc/helper.c +++ b/target-sparc/helper.c @@ -652,13 +652,7 @@ void dump_mmu(CPUState *env) #endif /* !CONFIG_USER_ONLY */ -#if defined(CONFIG_USER_ONLY) -target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) -{ - return addr; -} - -#else +#if !defined(CONFIG_USER_ONLY) target_phys_addr_t cpu_get_phys_page_debug(CPUState *env, target_ulong addr) { target_phys_addr_t phys_addr; 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