diff options
| -rw-r--r-- | hw/unin_pci.c | 221 |
1 files changed, 166 insertions, 55 deletions
diff --git a/hw/unin_pci.c b/hw/unin_pci.c index 0ad0cd3911..73944af66c 100644 --- a/hw/unin_pci.c +++ b/hw/unin_pci.c @@ -38,7 +38,10 @@ typedef target_phys_addr_t pci_addr_t; #include "pci_host.h" -typedef PCIHostState UNINState; +typedef struct UNINState { + SysBusDevice busdev; + PCIHostState host_state; +} UNINState; static void pci_unin_main_config_writel (void *opaque, target_phys_addr_t addr, uint32_t val) @@ -50,7 +53,7 @@ static void pci_unin_main_config_writel (void *opaque, target_phys_addr_t addr, val = bswap32(val); #endif - s->config_reg = val; + s->host_state.config_reg = val; } static uint32_t pci_unin_main_config_readl (void *opaque, @@ -59,7 +62,7 @@ static uint32_t pci_unin_main_config_readl (void *opaque, UNINState *s = opaque; uint32_t val; - val = s->config_reg; + val = s->host_state.config_reg; #ifdef TARGET_WORDS_BIGENDIAN val = bswap32(val); #endif @@ -97,7 +100,7 @@ static void pci_unin_config_writel (void *opaque, target_phys_addr_t addr, { UNINState *s = opaque; - s->config_reg = val; + s->host_state.config_reg = val; } static uint32_t pci_unin_config_readl (void *opaque, @@ -105,7 +108,7 @@ static uint32_t pci_unin_config_readl (void *opaque, { UNINState *s = opaque; - return s->config_reg; + return s->host_state.config_reg; } static CPUWriteMemoryFunc *pci_unin_config_write[] = { @@ -120,19 +123,17 @@ static CPUReadMemoryFunc *pci_unin_config_read[] = { &pci_unin_config_readl, }; -#if 0 static CPUWriteMemoryFunc *pci_unin_write[] = { - &pci_host_pci_writeb, - &pci_host_pci_writew, - &pci_host_pci_writel, + &pci_host_data_writeb, + &pci_host_data_writew, + &pci_host_data_writel, }; static CPUReadMemoryFunc *pci_unin_read[] = { - &pci_host_pci_readb, - &pci_host_pci_readw, - &pci_host_pci_readl, + &pci_host_data_readb, + &pci_host_data_readw, + &pci_host_data_readl, }; -#endif /* Don't know if this matches real hardware, but it agrees with OHW. */ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) @@ -166,27 +167,118 @@ static void pci_unin_reset(void *opaque) { } -PCIBus *pci_pmac_init(qemu_irq *pic) +static void pci_unin_main_init_device(SysBusDevice *dev) { UNINState *s; - PCIDevice *d; int pci_mem_config, pci_mem_data; /* Use values found on a real PowerMac */ /* Uninorth main bus */ - s = qemu_mallocz(sizeof(UNINState)); - s->bus = pci_register_bus(NULL, "pci", - pci_unin_set_irq, pci_unin_map_irq, - pic, 11 << 3, 4); + s = FROM_SYSBUS(UNINState, dev); pci_mem_config = cpu_register_io_memory(pci_unin_main_config_read, pci_unin_main_config_write, s); pci_mem_data = cpu_register_io_memory(pci_unin_main_read, - pci_unin_main_write, s); - cpu_register_physical_memory(0xf2800000, 0x1000, pci_mem_config); - cpu_register_physical_memory(0xf2c00000, 0x1000, pci_mem_data); - d = pci_register_device(s->bus, "Uni-north main", sizeof(PCIDevice), - 11 << 3, NULL, NULL); + pci_unin_main_write, &s->host_state); + + sysbus_init_mmio(dev, 0x1000, pci_mem_config); + sysbus_init_mmio(dev, 0x1000, pci_mem_data); + + register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, &s->host_state); + qemu_register_reset(pci_unin_reset, &s->host_state); + pci_unin_reset(&s->host_state); +} + +static void pci_dec_21154_init_device(SysBusDevice *dev) +{ + UNINState *s; + int pci_mem_config, pci_mem_data; + + /* Uninorth bridge */ + s = FROM_SYSBUS(UNINState, dev); + + // XXX: s = &pci_bridge[2]; + pci_mem_config = cpu_register_io_memory(pci_unin_config_read, + pci_unin_config_write, s); + pci_mem_data = cpu_register_io_memory(pci_unin_main_read, + pci_unin_main_write, &s->host_state); + sysbus_init_mmio(dev, 0x1000, pci_mem_config); + sysbus_init_mmio(dev, 0x1000, pci_mem_data); +} + +static void pci_unin_agp_init_device(SysBusDevice *dev) +{ + UNINState *s; + int pci_mem_config, pci_mem_data; + + /* Uninorth AGP bus */ + s = FROM_SYSBUS(UNINState, dev); + + pci_mem_config = cpu_register_io_memory(pci_unin_config_read, + pci_unin_config_write, s); + pci_mem_data = cpu_register_io_memory(pci_unin_main_read, + pci_unin_main_write, &s->host_state); + sysbus_init_mmio(dev, 0x1000, pci_mem_config); + sysbus_init_mmio(dev, 0x1000, pci_mem_data); +} + +static void pci_unin_internal_init_device(SysBusDevice *dev) +{ + UNINState *s; + int pci_mem_config, pci_mem_data; + + /* Uninorth internal bus */ + s = FROM_SYSBUS(UNINState, dev); + + pci_mem_config = cpu_register_io_memory(pci_unin_config_read, + pci_unin_config_write, s); + pci_mem_data = cpu_register_io_memory(pci_unin_read, + pci_unin_write, s); + sysbus_init_mmio(dev, 0x1000, pci_mem_config); + sysbus_init_mmio(dev, 0x1000, pci_mem_data); +} + +PCIBus *pci_pmac_init(qemu_irq *pic) +{ + DeviceState *dev; + SysBusDevice *s; + UNINState *d; + + /* Use values found on a real PowerMac */ + /* Uninorth main bus */ + dev = qdev_create(NULL, "Uni-north main"); + qdev_init(dev); + s = sysbus_from_qdev(dev); + d = FROM_SYSBUS(UNINState, s); + d->host_state.bus = pci_register_bus(NULL, "pci", + pci_unin_set_irq, pci_unin_map_irq, + pic, 11 << 3, 4); + + pci_create_simple(d->host_state.bus, 11 << 3, "Uni-north main"); + + sysbus_mmio_map(s, 0, 0xf2800000); + sysbus_mmio_map(s, 1, 0xf2c00000); + + /* DEC 21154 bridge */ +#if 0 + /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */ + pci_create_simple(d->host_state.bus, 12 << 3, "DEC 21154"); +#endif + + /* Uninorth AGP bus */ + pci_create_simple(d->host_state.bus, 13 << 3, "Uni-north AGP"); + + /* Uninorth internal bus */ +#if 0 + /* XXX: not needed for now */ + pci_create_simple(d->host_state.bus, 14 << 3, "Uni-north internal"); +#endif + + return d->host_state.bus; +} + +static void unin_main_pci_host_init(PCIDevice *d) +{ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI); d->config[0x08] = 0x00; // revision @@ -195,11 +287,11 @@ PCIBus *pci_pmac_init(qemu_irq *pic) d->config[0x0D] = 0x10; // latency_timer d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type d->config[0x34] = 0x00; // capabilities_pointer +} -#if 0 // XXX: not activated as PPC BIOS doesn't handle multiple buses properly +static void dec_21154_pci_host_init(PCIDevice *d) +{ /* pci-to-pci bridge */ - d = pci_register_device("Uni-north bridge", sizeof(PCIDevice), 0, 13 << 3, - NULL, NULL); pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_DEC); pci_config_set_device_id(d->config, PCI_DEVICE_ID_DEC_21154); d->config[0x08] = 0x05; // revision @@ -223,18 +315,10 @@ PCIBus *pci_pmac_init(qemu_irq *pic) d->config[0x26] = 0xF1; // prefectchable_memory_limit d->config[0x27] = 0x7F; // d->config[0x34] = 0xdc // capabilities_pointer -#endif - - /* Uninorth AGP bus */ - pci_mem_config = cpu_register_io_memory(pci_unin_config_read, - pci_unin_config_write, s); - pci_mem_data = cpu_register_io_memory(pci_unin_main_read, - pci_unin_main_write, s); - cpu_register_physical_memory(0xf0800000, 0x1000, pci_mem_config); - cpu_register_physical_memory(0xf0c00000, 0x1000, pci_mem_data); +} - d = pci_register_device(s->bus, "Uni-north AGP", sizeof(PCIDevice), - 11 << 3, NULL, NULL); +static void unin_agp_pci_host_init(PCIDevice *d) +{ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP); d->config[0x08] = 0x00; // revision @@ -243,19 +327,10 @@ PCIBus *pci_pmac_init(qemu_irq *pic) d->config[0x0D] = 0x10; // latency_timer d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type // d->config[0x34] = 0x80; // capabilities_pointer +} -#if 0 // XXX: not needed for now - /* Uninorth internal bus */ - s = &pci_bridge[2]; - pci_mem_config = cpu_register_io_memory(pci_unin_config_read, - pci_unin_config_write, s); - pci_mem_data = cpu_register_io_memory(pci_unin_read, - pci_unin_write, s); - cpu_register_physical_memory(0xf4800000, 0x1000, pci_mem_config); - cpu_register_physical_memory(0xf4c00000, 0x1000, pci_mem_data); - - d = pci_register_device("Uni-north internal", sizeof(PCIDevice), - 3, 11 << 3, NULL, NULL); +static void unin_internal_pci_host_init(PCIDevice *d) +{ pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI); d->config[0x08] = 0x00; // revision @@ -264,10 +339,46 @@ PCIBus *pci_pmac_init(qemu_irq *pic) d->config[0x0D] = 0x10; // latency_timer d->config[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; // header_type d->config[0x34] = 0x00; // capabilities_pointer -#endif - register_savevm("uninorth", 0, 1, pci_unin_save, pci_unin_load, d); - qemu_register_reset(pci_unin_reset, d); - pci_unin_reset(d); +} + +static PCIDeviceInfo unin_main_pci_host_info = { + .qdev.name = "Uni-north main", + .qdev.size = sizeof(PCIDevice), + .init = unin_main_pci_host_init, +}; + +static PCIDeviceInfo dec_21154_pci_host_info = { + .qdev.name = "DEC 21154", + .qdev.size = sizeof(PCIDevice), + .init = dec_21154_pci_host_init, +}; - return s->bus; +static PCIDeviceInfo unin_agp_pci_host_info = { + .qdev.name = "Uni-north AGP", + .qdev.size = sizeof(PCIDevice), + .init = unin_agp_pci_host_init, +}; + +static PCIDeviceInfo unin_internal_pci_host_info = { + .qdev.name = "Uni-north internal", + .qdev.size = sizeof(PCIDevice), + .init = unin_internal_pci_host_init, +}; + +static void unin_register_devices(void) +{ + sysbus_register_dev("Uni-north main", sizeof(UNINState), + pci_unin_main_init_device); + pci_qdev_register(&unin_main_pci_host_info); + sysbus_register_dev("DEC 21154", sizeof(UNINState), + pci_dec_21154_init_device); + pci_qdev_register(&dec_21154_pci_host_info); + sysbus_register_dev("Uni-north AGP", sizeof(UNINState), + pci_unin_agp_init_device); + pci_qdev_register(&unin_agp_pci_host_info); + sysbus_register_dev("Uni-north internal", sizeof(UNINState), + pci_unin_internal_init_device); + pci_qdev_register(&unin_internal_pci_host_info); } + +device_init(unin_register_devices) |