diff options
| -rw-r--r-- | hw/arm-misc.h | 15 | ||||
| -rw-r--r-- | hw/arm_boot.c | 118 | ||||
| -rw-r--r-- | hw/integratorcp.c | 12 | ||||
| -rw-r--r-- | hw/mainstone.c | 16 | ||||
| -rw-r--r-- | hw/palm.c | 16 | ||||
| -rw-r--r-- | hw/realview.c | 13 | ||||
| -rw-r--r-- | hw/spitz.c | 16 | ||||
| -rw-r--r-- | hw/versatilepb.c | 10 | ||||
| -rw-r--r-- | target-arm/cpu.h | 9 |
9 files changed, 142 insertions, 83 deletions
diff --git a/hw/arm-misc.h b/hw/arm-misc.h index 7914ff1177..3660772dbc 100644 --- a/hw/arm-misc.h +++ b/hw/arm-misc.h @@ -21,10 +21,17 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, const char *kernel_filename, const char *cpu_model); /* arm_boot.c */ - -void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, - const char *kernel_cmdline, const char *initrd_filename, - int board_id, target_phys_addr_t loader_start); +struct arm_boot_info { + int ram_size; + const char *kernel_filename; + const char *kernel_cmdline; + const char *initrd_filename; + target_phys_addr_t loader_start; + int nb_cpus; + int board_id; + int (*atag_board)(struct arm_boot_info *info, void *p); +}; +void arm_load_kernel(CPUState *env, struct arm_boot_info *info); /* armv7m_nvic.c */ int system_clock_scale; diff --git a/hw/arm_boot.c b/hw/arm_boot.c index 8335e69a7f..5990961781 100644 --- a/hw/arm_boot.c +++ b/hw/arm_boot.c @@ -47,21 +47,18 @@ static void main_cpu_reset(void *opaque) CPUState *env = opaque; cpu_reset(env); - if (env->kernel_filename) - arm_load_kernel(env, env->ram_size, env->kernel_filename, - env->kernel_cmdline, env->initrd_filename, - env->board_id, env->loader_start); + if (env->boot_info) + arm_load_kernel(env, env->boot_info); /* TODO: Reset secondary CPUs. */ } -static void set_kernel_args(uint32_t ram_size, int initrd_size, - const char *kernel_cmdline, - target_phys_addr_t loader_start) +static void set_kernel_args(struct arm_boot_info *info, + int initrd_size, void *base) { uint32_t *p; - p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR); + p = (uint32_t *)(base + KERNEL_ARGS_ADDR); /* ATAG_CORE */ stl_raw(p++, 5); stl_raw(p++, 0x54410001); @@ -69,46 +66,55 @@ static void set_kernel_args(uint32_t ram_size, int initrd_size, stl_raw(p++, 0x1000); stl_raw(p++, 0); /* ATAG_MEM */ + /* TODO: handle multiple chips on one ATAG list */ stl_raw(p++, 4); stl_raw(p++, 0x54410002); - stl_raw(p++, ram_size); - stl_raw(p++, loader_start); + stl_raw(p++, info->ram_size); + stl_raw(p++, info->loader_start); if (initrd_size) { /* ATAG_INITRD2 */ stl_raw(p++, 4); stl_raw(p++, 0x54420005); - stl_raw(p++, loader_start + INITRD_LOAD_ADDR); + stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR); stl_raw(p++, initrd_size); } - if (kernel_cmdline && *kernel_cmdline) { + if (info->kernel_cmdline && *info->kernel_cmdline) { /* ATAG_CMDLINE */ int cmdline_size; - cmdline_size = strlen(kernel_cmdline); - memcpy (p + 2, kernel_cmdline, cmdline_size + 1); + cmdline_size = strlen(info->kernel_cmdline); + memcpy(p + 2, info->kernel_cmdline, cmdline_size + 1); cmdline_size = (cmdline_size >> 2) + 1; stl_raw(p++, cmdline_size + 2); stl_raw(p++, 0x54410009); p += cmdline_size; } + if (info->atag_board) { + /* ATAG_BOARD */ + int atag_board_len; + + atag_board_len = (info->atag_board(info, p + 2) + 3) >> 2; + stl_raw(p++, 2 + atag_board_len); + stl_raw(p++, 0x414f4d50); + p += atag_board_len; + } /* ATAG_END */ stl_raw(p++, 0); stl_raw(p++, 0); } -static void set_kernel_args_old(uint32_t ram_size, int initrd_size, - const char *kernel_cmdline, - target_phys_addr_t loader_start) +static void set_kernel_args_old(struct arm_boot_info *info, + int initrd_size, void *base) { uint32_t *p; unsigned char *s; /* see linux/include/asm-arm/setup.h */ - p = (uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR); + p = (uint32_t *)(base + KERNEL_ARGS_ADDR); /* page_size */ stl_raw(p++, 4096); /* nr_pages */ - stl_raw(p++, ram_size / 4096); + stl_raw(p++, info->ram_size / 4096); /* ramdisk_size */ stl_raw(p++, 0); #define FLAG_READONLY 1 @@ -142,7 +148,7 @@ static void set_kernel_args_old(uint32_t ram_size, int initrd_size, stl_raw(p++, 0); /* initrd_start */ if (initrd_size) - stl_raw(p++, loader_start + INITRD_LOAD_ADDR); + stl_raw(p++, info->loader_start + INITRD_LOAD_ADDR); else stl_raw(p++, 0); /* initrd_size */ @@ -159,17 +165,15 @@ static void set_kernel_args_old(uint32_t ram_size, int initrd_size, stl_raw(p++, 0); /* zero unused fields */ memset(p, 0, 256 + 1024 - - (p - ((uint32_t *)(phys_ram_base + KERNEL_ARGS_ADDR)))); - s = phys_ram_base + KERNEL_ARGS_ADDR + 256 + 1024; - if (kernel_cmdline) - strcpy (s, kernel_cmdline); + (p - ((uint32_t *)(base + KERNEL_ARGS_ADDR)))); + s = base + KERNEL_ARGS_ADDR + 256 + 1024; + if (info->kernel_cmdline) + strcpy (s, info->kernel_cmdline); else stb_raw(s, 0); } -void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, - const char *kernel_cmdline, const char *initrd_filename, - int board_id, target_phys_addr_t loader_start) +void arm_load_kernel(CPUState *env, struct arm_boot_info *info) { int kernel_size; int initrd_size; @@ -177,36 +181,41 @@ void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, int is_linux = 0; uint64_t elf_entry; target_ulong entry; + uint32_t pd; + void *loader_phys; /* Load the kernel. */ - if (!kernel_filename) { + if (!info->kernel_filename) { fprintf(stderr, "Kernel image must be specified\n"); exit(1); } - if (!env->kernel_filename) { - env->ram_size = ram_size; - env->kernel_filename = kernel_filename; - env->kernel_cmdline = kernel_cmdline; - env->initrd_filename = initrd_filename; - env->board_id = board_id; - env->loader_start = loader_start; + if (!env->boot_info) { + if (info->nb_cpus == 0) + info->nb_cpus = 1; + env->boot_info = info; qemu_register_reset(main_cpu_reset, env); } + + pd = cpu_get_physical_page_desc(info->loader_start); + loader_phys = phys_ram_base + (pd & TARGET_PAGE_MASK) + + (info->loader_start & ~TARGET_PAGE_MASK); + /* Assume that raw images are linux kernels, and ELF images are not. */ - kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL); + kernel_size = load_elf(info->kernel_filename, 0, &elf_entry, NULL, NULL); entry = elf_entry; if (kernel_size < 0) { - kernel_size = load_uboot(kernel_filename, &entry, &is_linux); + kernel_size = load_uboot(info->kernel_filename, &entry, &is_linux); } if (kernel_size < 0) { - kernel_size = load_image(kernel_filename, - phys_ram_base + KERNEL_LOAD_ADDR); - entry = loader_start + KERNEL_LOAD_ADDR; + kernel_size = load_image(info->kernel_filename, + loader_phys + KERNEL_LOAD_ADDR); + entry = info->loader_start + KERNEL_LOAD_ADDR; is_linux = 1; } if (kernel_size < 0) { - fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename); + fprintf(stderr, "qemu: could not load kernel '%s'\n", + info->kernel_filename); exit(1); } if (!is_linux) { @@ -214,30 +223,29 @@ void arm_load_kernel(CPUState *env, int ram_size, const char *kernel_filename, env->regs[15] = entry & 0xfffffffe; env->thumb = entry & 1; } else { - if (initrd_filename) { - initrd_size = load_image(initrd_filename, - phys_ram_base + INITRD_LOAD_ADDR); + if (info->initrd_filename) { + initrd_size = load_image(info->initrd_filename, + loader_phys + INITRD_LOAD_ADDR); if (initrd_size < 0) { fprintf(stderr, "qemu: could not load initrd '%s'\n", - initrd_filename); + info->initrd_filename); exit(1); } } else { initrd_size = 0; } - bootloader[1] |= board_id & 0xff; - bootloader[2] |= (board_id >> 8) & 0xff; - bootloader[5] = loader_start + KERNEL_ARGS_ADDR; + bootloader[1] |= info->board_id & 0xff; + bootloader[2] |= (info->board_id >> 8) & 0xff; + bootloader[5] = info->loader_start + KERNEL_ARGS_ADDR; bootloader[6] = entry; for (n = 0; n < sizeof(bootloader) / 4; n++) - stl_raw(phys_ram_base + (n * 4), bootloader[n]); - for (n = 0; n < sizeof(smpboot) / 4; n++) - stl_raw(phys_ram_base + ram_size + (n * 4), smpboot[n]); + stl_raw(loader_phys + (n * 4), bootloader[n]); + if (info->nb_cpus > 1) + for (n = 0; n < sizeof(smpboot) / 4; n++) + stl_raw(loader_phys + info->ram_size + (n * 4), smpboot[n]); if (old_param) - set_kernel_args_old(ram_size, initrd_size, - kernel_cmdline, loader_start); + set_kernel_args_old(info, initrd_size, loader_phys); else - set_kernel_args(ram_size, initrd_size, - kernel_cmdline, loader_start); + set_kernel_args(info, initrd_size, loader_phys); } } diff --git a/hw/integratorcp.c b/hw/integratorcp.c index 549cc25df8..f6e636441a 100644 --- a/hw/integratorcp.c +++ b/hw/integratorcp.c @@ -469,6 +469,11 @@ static void icp_control_init(uint32_t base) /* Board init. */ +static struct arm_boot_info integrator_binfo = { + .loader_start = 0x0, + .board_id = 0x113, +}; + static void integratorcp_init(int ram_size, int vga_ram_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, @@ -527,8 +532,11 @@ static void integratorcp_init(int ram_size, int vga_ram_size, } pl110_init(ds, 0xc0000000, pic[22], 0); - arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, - initrd_filename, 0x113, 0x0); + integrator_binfo.ram_size = ram_size; + integrator_binfo.kernel_filename = kernel_filename; + integrator_binfo.kernel_cmdline = kernel_cmdline; + integrator_binfo.initrd_filename = initrd_filename; + arm_load_kernel(env, &integrator_binfo); } QEMUMachine integratorcp_machine = { diff --git a/hw/mainstone.c b/hw/mainstone.c index 5856791a45..9564fc37fa 100644 --- a/hw/mainstone.c +++ b/hw/mainstone.c @@ -59,12 +59,17 @@ static struct keymap map[0xE0] = { enum mainstone_model_e { mainstone }; +static struct arm_boot_info mainstone_binfo = { + .loader_start = PXA2XX_SDRAM_BASE, + .ram_size = 0x04000000, +}; + static void mainstone_common_init(int ram_size, int vga_ram_size, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum mainstone_model_e model, int arm_id) { - uint32_t mainstone_ram = 0x04000000; + uint32_t mainstone_ram = mainstone_binfo.ram_size; uint32_t mainstone_rom = 0x00800000; uint32_t mainstone_flash = 0x02000000; uint32_t sector_len = 256 * 1024; @@ -90,7 +95,7 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, qemu_ram_alloc(mainstone_rom) | IO_MEM_ROM); /* Setup initial (reset) machine state */ - cpu->env->regs[15] = PXA2XX_SDRAM_BASE; + cpu->env->regs[15] = mainstone_binfo.loader_start; /* There are two 32MiB flash devices on the board */ for (i = 0; i < 2; i ++) { @@ -121,8 +126,11 @@ static void mainstone_common_init(int ram_size, int vga_ram_size, smc91c111_init(&nd_table[0], MST_ETH_PHYS, mst_irq[ETHERNET_IRQ]); - arm_load_kernel(cpu->env, mainstone_ram, kernel_filename, kernel_cmdline, - initrd_filename, arm_id, PXA2XX_SDRAM_BASE); + mainstone_binfo.kernel_filename = kernel_filename; + mainstone_binfo.kernel_cmdline = kernel_cmdline; + mainstone_binfo.initrd_filename = initrd_filename; + mainstone_binfo.board_id = arm_id; + arm_load_kernel(cpu->env, &mainstone_binfo); } static void mainstone_init(int ram_size, int vga_ram_size, @@ -183,6 +183,12 @@ static void palmte_gpio_setup(struct omap_mpu_state_s *cpu) qemu_irq_raise(omap_mpuio_in_get(cpu->mpuio)[11]); } +static struct arm_boot_info palmte_binfo = { + .loader_start = OMAP_EMIFF_BASE, + .ram_size = 0x02000000, + .board_id = 0x331, +}; + static void palmte_init(int ram_size, int vga_ram_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, @@ -190,7 +196,7 @@ static void palmte_init(int ram_size, int vga_ram_size, { struct omap_mpu_state_s *cpu; int flash_size = 0x00800000; - int sdram_size = 0x02000000; + int sdram_size = palmte_binfo.ram_size; int io; static uint32_t cs0val = 0xffffffff; static uint32_t cs1val = 0x0000e1a0; @@ -250,10 +256,12 @@ static void palmte_init(int ram_size, int vga_ram_size, /* Load the kernel. */ if (kernel_filename) { /* Start at bootloader. */ - cpu->env->regs[15] = OMAP_EMIFF_BASE; + cpu->env->regs[15] = palmte_binfo.loader_start; - arm_load_kernel(cpu->env, sdram_size, kernel_filename, kernel_cmdline, - initrd_filename, 0x331, OMAP_EMIFF_BASE); + palmte_binfo.kernel_filename = kernel_filename; + palmte_binfo.kernel_cmdline = kernel_cmdline; + palmte_binfo.initrd_filename = initrd_filename; + arm_load_kernel(cpu->env, &palmte_binfo); } dpy_resize(ds, 320, 320); diff --git a/hw/realview.c b/hw/realview.c index 29579d87b0..acf3b9ee0a 100644 --- a/hw/realview.c +++ b/hw/realview.c @@ -18,6 +18,11 @@ /* Board init. */ +static struct arm_boot_info realview_binfo = { + .loader_start = 0x0, + .board_id = 0x33b, +}; + static void realview_init(int ram_size, int vga_ram_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, @@ -177,8 +182,12 @@ static void realview_init(int ram_size, int vga_ram_size, /* 0x68000000 PCI mem 1. */ /* 0x6c000000 PCI mem 2. */ - arm_load_kernel(first_cpu, ram_size, kernel_filename, kernel_cmdline, - initrd_filename, 0x33b, 0x0); + realview_binfo.ram_size = ram_size; + realview_binfo.kernel_filename = kernel_filename; + realview_binfo.kernel_cmdline = kernel_cmdline; + realview_binfo.initrd_filename = initrd_filename; + realview_binfo.nb_cpus = ncpu; + arm_load_kernel(first_cpu, &realview_binfo); /* ??? Hack to map an additional page of ram for the secondary CPU startup code. I guess this works on real hardware because the diff --git a/hw/spitz.c b/hw/spitz.c index 159c633789..b059f9a9f6 100644 --- a/hw/spitz.c +++ b/hw/spitz.c @@ -1180,12 +1180,17 @@ static void sl_bootparam_write(uint32_t ptr) /* Board init. */ enum spitz_model_e { spitz, akita, borzoi, terrier }; +static struct arm_boot_info spitz_binfo = { + .loader_start = PXA2XX_SDRAM_BASE, + .ram_size = 0x04000000, +}; + static void spitz_common_init(int ram_size, int vga_ram_size, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, const char *initrd_filename, const char *cpu_model, enum spitz_model_e model, int arm_id) { - uint32_t spitz_ram = 0x04000000; + uint32_t spitz_ram = spitz_binfo.ram_size; uint32_t spitz_rom = 0x00800000; struct pxa2xx_state_s *cpu; struct scoop_info_s *scp; @@ -1230,10 +1235,13 @@ static void spitz_common_init(int ram_size, int vga_ram_size, spitz_microdrive_attach(cpu); /* Setup initial (reset) machine state */ - cpu->env->regs[15] = PXA2XX_SDRAM_BASE; + cpu->env->regs[15] = spitz_binfo.loader_start; - arm_load_kernel(cpu->env, spitz_ram, kernel_filename, kernel_cmdline, - initrd_filename, arm_id, PXA2XX_SDRAM_BASE); + spitz_binfo.kernel_filename = kernel_filename; + spitz_binfo.kernel_cmdline = kernel_cmdline; + spitz_binfo.initrd_filename = initrd_filename; + spitz_binfo.board_id = arm_id; + arm_load_kernel(cpu->env, &spitz_binfo); sl_bootparam_write(SL_PXA_PARAM_BASE - PXA2XX_SDRAM_BASE); } diff --git a/hw/versatilepb.c b/hw/versatilepb.c index da6e4ec330..ecc0037af8 100644 --- a/hw/versatilepb.c +++ b/hw/versatilepb.c @@ -157,6 +157,8 @@ static qemu_irq *vpb_sic_init(uint32_t base, qemu_irq *parent, int irq) peripherans and expansion busses. For now we emulate a subset of the PB peripherals and just change the board ID. */ +static struct arm_boot_info versatile_binfo; + static void versatile_init(int ram_size, int vga_ram_size, const char *boot_device, DisplayState *ds, const char *kernel_filename, const char *kernel_cmdline, @@ -283,8 +285,12 @@ static void versatile_init(int ram_size, int vga_ram_size, /* 0x101f3000 UART2. */ /* 0x101f4000 SSPI. */ - arm_load_kernel(env, ram_size, kernel_filename, kernel_cmdline, - initrd_filename, board_id, 0x0); + versatile_binfo.ram_size = ram_size; + versatile_binfo.kernel_filename = kernel_filename; + versatile_binfo.kernel_cmdline = kernel_cmdline; + versatile_binfo.initrd_filename = initrd_filename; + versatile_binfo.board_id = board_id; + arm_load_kernel(env, &versatile_binfo); } static void vpb_init(int ram_size, int vga_ram_size, diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 9e93c24a9a..8bf0fcdce2 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -55,6 +55,8 @@ typedef void ARMWriteCPFunc(void *opaque, int cp_info, typedef uint32_t ARMReadCPFunc(void *opaque, int cp_info, int dstreg, int operand); +struct arm_boot_info; + #define NB_MMU_MODES 2 /* We currently assume float and double are IEEE single and double @@ -196,12 +198,7 @@ typedef struct CPUARMState { CPU_COMMON /* These fields after the common ones so they are preserved on reset. */ - int ram_size; - const char *kernel_filename; - const char *kernel_cmdline; - const char *initrd_filename; - int board_id; - target_phys_addr_t loader_start; + struct arm_boot_info *boot_info; } CPUARMState; CPUARMState *cpu_arm_init(const char *cpu_model); |