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-rw-r--r--target-arm/translate.c54
-rw-r--r--target-cris/translate.c18
-rw-r--r--target-i386/translate.c53
-rw-r--r--target-mips/translate.c48
-rw-r--r--target-sparc/translate.c61
-rw-r--r--tcg/tcg-op.h18
6 files changed, 131 insertions, 121 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index f149713717..29755de90b 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -662,94 +662,92 @@ static void gen_test_cc(int cc, int label)
{
TCGv tmp;
TCGv tmp2;
- TCGv zero;
int inv;
- zero = tcg_const_i32(0);
switch (cc) {
case 0: /* eq: Z */
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
break;
case 1: /* ne: !Z */
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
break;
case 2: /* cs: C */
tmp = load_cpu_field(CF);
- tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
break;
case 3: /* cc: !C */
tmp = load_cpu_field(CF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
break;
case 4: /* mi: N */
tmp = load_cpu_field(NF);
- tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
break;
case 5: /* pl: !N */
tmp = load_cpu_field(NF);
- tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
break;
case 6: /* vs: V */
tmp = load_cpu_field(VF);
- tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
break;
case 7: /* vc: !V */
tmp = load_cpu_field(VF);
- tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
break;
case 8: /* hi: C && !Z */
inv = gen_new_label();
tmp = load_cpu_field(CF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, inv);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv);
dead_tmp(tmp);
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_NE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, label);
gen_set_label(inv);
break;
case 9: /* ls: !C || Z */
tmp = load_cpu_field(CF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
dead_tmp(tmp);
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
break;
case 10: /* ge: N == V -> N ^ V == 0 */
tmp = load_cpu_field(VF);
tmp2 = load_cpu_field(NF);
tcg_gen_xor_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
- tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
break;
case 11: /* lt: N != V -> N ^ V != 0 */
tmp = load_cpu_field(VF);
tmp2 = load_cpu_field(NF);
tcg_gen_xor_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
- tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
break;
case 12: /* gt: !Z && N == V */
inv = gen_new_label();
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, inv);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, inv);
dead_tmp(tmp);
tmp = load_cpu_field(VF);
tmp2 = load_cpu_field(NF);
tcg_gen_xor_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
- tcg_gen_brcond_i32(TCG_COND_GE, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_GE, tmp, 0, label);
gen_set_label(inv);
break;
case 13: /* le: Z || N != V */
tmp = load_cpu_field(ZF);
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, label);
dead_tmp(tmp);
tmp = load_cpu_field(VF);
tmp2 = load_cpu_field(NF);
tcg_gen_xor_i32(tmp, tmp, tmp2);
dead_tmp(tmp2);
- tcg_gen_brcond_i32(TCG_COND_LT, tmp, zero, label);
+ tcg_gen_brcondi_i32(TCG_COND_LT, tmp, 0, label);
break;
default:
fprintf(stderr, "Bad condition code 0x%x\n", cc);
@@ -6233,8 +6231,8 @@ static void disas_arm_insn(CPUState * env, DisasContext *s)
int label = gen_new_label();
rm = insn & 0xf;
gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
- tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0],
- tcg_const_i32(0), label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0],
+ 0, label);
tmp = load_reg(s,rm);
gen_st32(tmp, cpu_T[1], IS_USER(s));
gen_set_label(label);
@@ -6984,8 +6982,8 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
} else {
int label = gen_new_label();
gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
- tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0],
- tcg_const_i32(0), label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0],
+ 0, label);
tmp = load_reg(s, rs);
gen_st32(tmp, cpu_T[1], IS_USER(s));
gen_set_label(label);
@@ -7047,8 +7045,7 @@ static int disas_thumb2_insn(CPUState *env, DisasContext *s, uint16_t insn_hw1)
int label = gen_new_label();
/* Must use a global that is not killed by the branch. */
gen_helper_test_exclusive(cpu_T[0], cpu_env, addr);
- tcg_gen_brcond_i32(TCG_COND_NE, cpu_T[0], tcg_const_i32(0),
- label);
+ tcg_gen_brcondi_i32(TCG_COND_NE, cpu_T[0], 0, label);
tmp = load_reg(s, rs);
switch (op) {
case 0:
@@ -8364,13 +8361,12 @@ static void disas_thumb_insn(CPUState *env, DisasContext *s)
case 1: case 3: case 9: case 11: /* czb */
rm = insn & 7;
tmp = load_reg(s, rm);
- tmp2 = tcg_const_i32(0);
s->condlabel = gen_new_label();
s->condjmp = 1;
if (insn & (1 << 11))
- tcg_gen_brcond_i32(TCG_COND_EQ, tmp, tmp2, s->condlabel);
+ tcg_gen_brcondi_i32(TCG_COND_EQ, tmp, 0, s->condlabel);
else
- tcg_gen_brcond_i32(TCG_COND_NE, tmp, tmp2, s->condlabel);
+ tcg_gen_brcondi_i32(TCG_COND_NE, tmp, 0, s->condlabel);
dead_tmp(tmp);
offset = ((insn & 0xf8) >> 2) | (insn & 0x200) >> 3;
val = (uint32_t)s->pc + 2;
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 691904be8e..1c7b73f90c 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -219,7 +219,7 @@ static void t_gen_lsl(TCGv d, TCGv a, TCGv b)
l1 = gen_new_label();
/* Speculative shift. */
tcg_gen_shl_tl(d, a, b);
- tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
+ tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
/* Clear dst if shift operands were to large. */
tcg_gen_movi_tl(d, 0);
gen_set_label(l1);
@@ -232,7 +232,7 @@ static void t_gen_lsr(TCGv d, TCGv a, TCGv b)
l1 = gen_new_label();
/* Speculative shift. */
tcg_gen_shr_tl(d, a, b);
- tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
+ tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
/* Clear dst if shift operands were to large. */
tcg_gen_movi_tl(d, 0);
gen_set_label(l1);
@@ -245,7 +245,7 @@ static void t_gen_asr(TCGv d, TCGv a, TCGv b)
l1 = gen_new_label();
/* Speculative shift. */
tcg_gen_sar_tl(d, a, b);
- tcg_gen_brcond_tl(TCG_COND_LEU, b, tcg_const_tl(31), l1);
+ tcg_gen_brcondi_tl(TCG_COND_LEU, b, 31, l1);
/* Clear dst if shift operands were to large. */
tcg_gen_sar_tl(d, a, tcg_const_tl(30));
gen_set_label(l1);
@@ -406,7 +406,7 @@ static void t_gen_btst(TCGv d, TCGv s)
tcg_gen_andi_tl(d, cpu_PR[PR_CCS], ~(X_FLAG | N_FLAG | Z_FLAG));
/* or in the N_FLAG. */
tcg_gen_or_tl(d, d, bset);
- tcg_gen_brcond_tl(TCG_COND_NE, sbit, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, sbit, 0, l1);
/* or in the Z_FLAG. */
tcg_gen_ori_tl(d, d, Z_FLAG);
gen_set_label(l1);
@@ -591,7 +591,7 @@ static void t_gen_cc_jmp(TCGv pc_true, TCGv pc_false)
/* Conditional jmp. */
t_gen_mov_TN_env(btaken, btaken);
tcg_gen_mov_tl(env_pc, pc_false);
- tcg_gen_brcond_tl(TCG_COND_EQ, btaken, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, btaken, 0, l1);
tcg_gen_mov_tl(env_pc, pc_true);
gen_set_label(l1);
@@ -902,8 +902,8 @@ static void gen_tst_cc (DisasContext *dc, int cond)
int l1;
l1 = gen_new_label();
tcg_gen_movi_tl(cpu_T[0], 0);
- tcg_gen_brcond_tl(TCG_COND_NE, cc_result,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cc_result,
+ 0, l1);
tcg_gen_movi_tl(cpu_T[0], 1);
gen_set_label(l1);
}
@@ -1461,7 +1461,7 @@ static unsigned int dec_scc_r(DisasContext *dc)
l1 = gen_new_label();
tcg_gen_movi_tl(cpu_R[dc->op1], 0);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
tcg_gen_movi_tl(cpu_R[dc->op1], 1);
gen_set_label(l1);
}
@@ -1618,7 +1618,7 @@ static unsigned int dec_abs_r(DisasContext *dc)
/* TODO: consider a branch free approach. */
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_GE, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_GE, cpu_T[1], 0, l1);
tcg_gen_neg_tl(cpu_T[1], cpu_T[1]);
gen_set_label(l1);
crisv32_alu_op(dc, CC_OP_MOVE, dc->op2, 4);
diff --git a/target-i386/translate.c b/target-i386/translate.c
index 5bb603477d..a24fe60903 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -703,14 +703,14 @@ static inline void gen_op_jnz_ecx(int size, int label1)
{
tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
gen_extu(size + 1, cpu_tmp0);
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_tmp0, tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, label1);
}
static inline void gen_op_jz_ecx(int size, int label1)
{
tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUState, regs[R_ECX]));
gen_extu(size + 1, cpu_tmp0);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
}
static void *helper_in_func[3] = {
@@ -1000,32 +1000,31 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1)
t0 = cpu_cc_dst;
break;
}
- tcg_gen_brcond_tl(inv ? TCG_COND_NE : TCG_COND_EQ, t0,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_NE : TCG_COND_EQ, t0, 0, l1);
break;
case JCC_S:
fast_jcc_s:
switch(size) {
case 0:
tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80);
- tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
+ 0, l1);
break;
case 1:
tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x8000);
- tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
+ 0, l1);
break;
#ifdef TARGET_X86_64
case 2:
tcg_gen_andi_tl(cpu_tmp0, cpu_cc_dst, 0x80000000);
- tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE, cpu_tmp0,
+ 0, l1);
break;
#endif
default:
- tcg_gen_brcond_tl(inv ? TCG_COND_GE : TCG_COND_LT, cpu_cc_dst,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_GE : TCG_COND_LT, cpu_cc_dst,
+ 0, l1);
break;
}
break;
@@ -1153,8 +1152,8 @@ static inline void gen_jcc1(DisasContext *s, int cc_op, int b, int l1)
default:
slow_jcc:
gen_setcc_slow_T0(jcc_op);
- tcg_gen_brcond_tl(inv ? TCG_COND_EQ : TCG_COND_NE,
- cpu_T[0], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(inv ? TCG_COND_EQ : TCG_COND_NE,
+ cpu_T[0], 0, l1);
break;
}
}
@@ -1479,7 +1478,7 @@ static void gen_shift_rm_T1(DisasContext *s, int ot, int op1,
gen_op_set_cc_op(s->cc_op);
shift_label = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), shift_label);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, shift_label);
tcg_gen_mov_tl(cpu_cc_src, cpu_T3);
tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]);
@@ -1574,7 +1573,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
/* Must test zero case to avoid using undefined behaviour in TCG
shifts. */
label1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, label1);
if (ot <= OT_WORD)
tcg_gen_andi_tl(cpu_tmp0, cpu_T[1], (1 << (3 + ot)) - 1);
@@ -1610,7 +1609,7 @@ static void gen_rot_rm_T1(DisasContext *s, int ot, int op1,
gen_op_set_cc_op(s->cc_op);
label2 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), label2);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, label2);
gen_compute_eflags(cpu_cc_src);
tcg_gen_andi_tl(cpu_cc_src, cpu_cc_src, ~(CC_O | CC_C));
@@ -1667,7 +1666,7 @@ static void gen_rotc_rm_T1(DisasContext *s, int ot, int op1,
/* update eflags */
label1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(-1), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, -1, label1);
tcg_gen_mov_tl(cpu_cc_src, cpu_T3);
tcg_gen_discard_tl(cpu_cc_dst);
@@ -1699,7 +1698,7 @@ static void gen_shiftd_rm_T1_T3(DisasContext *s, int ot, int op1,
/* Must test zero case to avoid using undefined behaviour in TCG
shifts. */
label1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label1);
tcg_gen_addi_tl(cpu_tmp5, cpu_T3, -1);
if (ot == OT_WORD) {
@@ -1775,7 +1774,7 @@ static void gen_shiftd_rm_T1_T3(DisasContext *s, int ot, int op1,
gen_op_set_cc_op(s->cc_op);
label2 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label2);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label2);
tcg_gen_mov_tl(cpu_cc_src, cpu_T[1]);
tcg_gen_mov_tl(cpu_cc_dst, cpu_T[0]);
@@ -4375,7 +4374,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
tcg_gen_ld_tl(cpu_T3, cpu_env, offsetof(CPUState, regs[R_EAX]));
tcg_gen_sub_tl(cpu_T3, cpu_T3, cpu_T[0]);
gen_extu(ot, cpu_T3);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T3, tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T3, 0, label1);
if (mod == 3) {
label2 = gen_new_label();
gen_op_mov_reg_T0(ot, R_EAX);
@@ -5461,7 +5460,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
op1 = fcmov_cc[op & 3] | ((op >> 3) & 1);
gen_setcc(s, op1);
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
tcg_gen_helper_0_1(helper_fmov_ST0_STN, tcg_const_i32(opreg));
gen_set_label(l1);
}
@@ -6047,7 +6046,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_extu(ot, cpu_T[0]);
label1 = gen_new_label();
tcg_gen_movi_tl(cpu_cc_dst, 0);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, label1);
if (b & 1) {
tcg_gen_helper_1_1(helper_bsr, cpu_T[0], cpu_T[0]);
} else {
@@ -6289,11 +6288,9 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
gen_compute_eflags(cpu_tmp0);
tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, CC_Z);
if (b == 0) {
- tcg_gen_brcond_tl(TCG_COND_EQ,
- cpu_tmp0, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
} else {
- tcg_gen_brcond_tl(TCG_COND_NE,
- cpu_tmp0, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_tmp0, 0, l1);
}
break;
case 2: /* loop */
@@ -6782,7 +6779,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
tcg_gen_helper_1_1(helper_lsl, cpu_T[0], cpu_T[0]);
tcg_gen_andi_tl(cpu_tmp0, cpu_cc_src, CC_Z);
label1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), label1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, label1);
gen_op_mov_reg_T0(ot, reg);
gen_set_label(label1);
s->cc_op = CC_OP_EFLAGS;
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 561d528c0a..0773f4067c 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -679,7 +679,7 @@ void glue(gen_op_, name) (target_ulong val) \
int l1 = gen_new_label(); \
int l2 = gen_new_label(); \
\
- tcg_gen_brcond_tl(cond, cpu_T[0], tcg_const_tl(val), l1); \
+ tcg_gen_brcondi_tl(cond, cpu_T[0], val, l1); \
tcg_gen_movi_tl(cpu_T[0], 0); \
tcg_gen_br(l2); \
gen_set_label(l1); \
@@ -696,7 +696,7 @@ void glue(gen_op_, name) (void) \
int l1 = gen_new_label(); \
int l2 = gen_new_label(); \
\
- tcg_gen_brcond_tl(cond, cpu_T[0], tcg_const_tl(0), l1); \
+ tcg_gen_brcondi_tl(cond, cpu_T[0], 0, l1); \
tcg_gen_movi_tl(cpu_T[0], 0); \
tcg_gen_br(l2); \
gen_set_label(l1); \
@@ -831,10 +831,10 @@ static inline void gen_op_addr_add (void)
tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, hflags));
tcg_gen_andi_i32(r_tmp, r_tmp, MIPS_HFLAG_KSU);
- tcg_gen_brcond_i32(TCG_COND_NE, r_tmp, tcg_const_i32(MIPS_HFLAG_UM), l1);
+ tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, MIPS_HFLAG_UM, l1);
tcg_gen_ld_i32(r_tmp, cpu_env, offsetof(CPUState, CP0_Status));
tcg_gen_andi_i32(r_tmp, r_tmp, (1 << CP0St_UX));
- tcg_gen_brcond_i32(TCG_COND_NE, r_tmp, tcg_const_i32(0), l1);
+ tcg_gen_brcondi_i32(TCG_COND_NE, r_tmp, 0, l1);
tcg_gen_ext32s_i64(cpu_T[0], cpu_T[0]);
gen_set_label(l1);
dead_tmp(r_tmp);
@@ -995,7 +995,7 @@ void inline op_ldst_##insn(DisasContext *ctx) \
int l3 = gen_new_label(); \
\
tcg_gen_andi_tl(r_tmp, cpu_T[0], almask); \
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp, tcg_const_tl(0), l1); \
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp, 0, l1); \
tcg_gen_st_tl(cpu_T[0], cpu_env, offsetof(CPUState, CP0_BadVAddr)); \
generate_exception(ctx, EXCP_AdES); \
gen_set_label(l1); \
@@ -1296,7 +1296,7 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xori_tl(r_tmp2, cpu_T[0], uimm);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of same sign, result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1327,7 +1327,7 @@ static void gen_arith_imm (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xori_tl(r_tmp2, cpu_T[0], uimm);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of same sign, result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1539,7 +1539,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xor_tl(r_tmp2, cpu_T[0], cpu_T[1]);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of same sign, result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1570,7 +1570,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xor_tl(r_tmp1, r_tmp1, cpu_T[0]);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 31);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1602,7 +1602,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xor_tl(r_tmp2, cpu_T[0], cpu_T[1]);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of same sign, result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1627,7 +1627,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
tcg_gen_xor_tl(r_tmp1, r_tmp1, cpu_T[0]);
tcg_gen_and_tl(r_tmp1, r_tmp1, r_tmp2);
tcg_gen_shri_tl(r_tmp1, r_tmp1, 63);
- tcg_gen_brcond_tl(TCG_COND_EQ, r_tmp1, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_tmp1, 0, l1);
/* operands of different sign, first operand and result different sign */
generate_exception(ctx, EXCP_OVERFLOW);
gen_set_label(l1);
@@ -1675,7 +1675,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
gen_store_gpr(cpu_T[0], rd);
gen_set_label(l1);
}
@@ -1685,7 +1685,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], 0, l1);
gen_store_gpr(cpu_T[0], rd);
gen_set_label(l1);
}
@@ -1722,7 +1722,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
int l2 = gen_new_label();
tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0x1f);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
{
TCGv r_tmp1 = new_tmp();
TCGv r_tmp2 = new_tmp();
@@ -1784,7 +1784,7 @@ static void gen_arith (CPUState *env, DisasContext *ctx, uint32_t opc,
int l2 = gen_new_label();
tcg_gen_andi_tl(cpu_T[0], cpu_T[0], 0x3f);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[0], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[0], 0, l1);
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_TL);
@@ -1873,7 +1873,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
{
TCGv r_tmp1 = new_tmp();
TCGv r_tmp2 = new_tmp();
@@ -1907,7 +1907,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
{
TCGv r_tmp1 = new_tmp();
TCGv r_tmp2 = new_tmp();
@@ -1950,7 +1950,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
{
TCGv r_tc_off = new_tmp();
TCGv r_tc_off_tl = tcg_temp_new(TCG_TYPE_TL);
@@ -1958,8 +1958,8 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
int l2 = gen_new_label();
int l3 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[0], tcg_const_tl(1ULL << 63), l2);
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_T[1], tcg_const_tl(-1ULL), l2);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[0], 1ULL << 63, l2);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_T[1], -1ULL, l2);
tcg_gen_div_i64(cpu_T[0], cpu_T[0], cpu_T[1]);
tcg_gen_movi_tl(cpu_T[1], 0);
tcg_gen_br(l3);
@@ -1984,7 +1984,7 @@ static void gen_muldiv (DisasContext *ctx, uint32_t opc,
{
int l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_T[1], tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_T[1], 0, l1);
{
TCGv r_tmp1 = tcg_temp_new(TCG_TYPE_I64);
TCGv r_tmp2 = tcg_temp_new(TCG_TYPE_I64);
@@ -5569,7 +5569,7 @@ static void gen_movci (DisasContext *ctx, int rd, int rs, int cc, int tf)
tcg_gen_ld_ptr(r_ptr, cpu_env, offsetof(CPUState, fpu));
tcg_gen_ld_i32(r_tmp, r_ptr, offsetof(CPUMIPSFPUContext, fcr31));
tcg_gen_andi_i32(r_tmp, r_tmp, ccbit);
- tcg_gen_brcond_i32(cond, r_tmp, tcg_const_i32(0), l1);
+ tcg_gen_brcondi_i32(cond, r_tmp, 0, l1);
tcg_gen_mov_tl(t0, t1);
gen_set_label(l1);
dead_tmp(r_tmp);
@@ -6656,7 +6656,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
MIPS_DEBUG("blikely condition (" TARGET_FMT_lx ")", ctx->pc + 4);
tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
- tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
gen_op_save_state(ctx->hflags & ~MIPS_HFLAG_BMASK);
gen_goto_tb(ctx, 1, ctx->pc + 4);
gen_set_label(l1);
@@ -7214,7 +7214,7 @@ static void decode_opc (CPUState *env, DisasContext *ctx)
int l1 = gen_new_label();
tcg_gen_ld_tl(r_tmp, cpu_env, offsetof(CPUState, bcond));
- tcg_gen_brcond_tl(TCG_COND_NE, r_tmp, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, r_tmp, 0, l1);
gen_goto_tb(ctx, 1, ctx->pc + 4);
gen_set_label(l1);
gen_goto_tb(ctx, 0, ctx->btarget);
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index ffc881e0d2..0f9cda9260 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -304,11 +304,11 @@ static inline void gen_cc_NZ_icc(TCGv dst)
l2 = gen_new_label();
r_temp = tcg_temp_new(TCG_TYPE_TL);
tcg_gen_andi_tl(r_temp, dst, 0xffffffffULL);
- tcg_gen_brcond_tl(TCG_COND_NE, r_temp, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, r_temp, 0, l1);
tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_ZERO);
gen_set_label(l1);
tcg_gen_ext_i32_tl(r_temp, dst);
- tcg_gen_brcond_tl(TCG_COND_GE, r_temp, tcg_const_tl(0), l2);
+ tcg_gen_brcondi_tl(TCG_COND_GE, r_temp, 0, l2);
tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_NEG);
gen_set_label(l2);
}
@@ -320,10 +320,10 @@ static inline void gen_cc_NZ_xcc(TCGv dst)
l1 = gen_new_label();
l2 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_NE, dst, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, dst, 0, l1);
tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_ZERO);
gen_set_label(l1);
- tcg_gen_brcond_tl(TCG_COND_GE, dst, tcg_const_tl(0), l2);
+ tcg_gen_brcondi_tl(TCG_COND_GE, dst, 0, l2);
tcg_gen_ori_i32(cpu_xcc, cpu_xcc, PSR_NEG);
gen_set_label(l2);
}
@@ -407,7 +407,7 @@ static inline void gen_add_tv(TCGv dst, TCGv src1, TCGv src2)
tcg_gen_xor_tl(cpu_tmp0, src1, dst);
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
- tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1);
tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
gen_set_label(l1);
}
@@ -419,7 +419,7 @@ static inline void gen_cc_V_tag(TCGv src1, TCGv src2)
l1 = gen_new_label();
tcg_gen_or_tl(cpu_tmp0, src1, src2);
tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
gen_set_label(l1);
}
@@ -431,7 +431,7 @@ static inline void gen_tag_tv(TCGv src1, TCGv src2)
l1 = gen_new_label();
tcg_gen_or_tl(cpu_tmp0, src1, src2);
tcg_gen_andi_tl(cpu_tmp0, cpu_tmp0, 0x3);
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
gen_set_label(l1);
}
@@ -593,7 +593,7 @@ static inline void gen_sub_tv(TCGv dst, TCGv src1, TCGv src2)
tcg_gen_xor_tl(cpu_tmp0, src1, dst);
tcg_gen_and_tl(r_temp, r_temp, cpu_tmp0);
tcg_gen_andi_tl(r_temp, r_temp, (1 << 31));
- tcg_gen_brcond_tl(TCG_COND_EQ, r_temp, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_temp, 0, l1);
tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_TOVF));
gen_set_label(l1);
}
@@ -696,7 +696,7 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1, TCGv src2)
tcg_gen_trunc_tl_i32(r_temp2, r_temp);
tcg_gen_andi_i32(r_temp2, r_temp2, 0x1);
tcg_gen_mov_tl(cpu_cc_src2, src2);
- tcg_gen_brcond_i32(TCG_COND_NE, r_temp2, tcg_const_i32(0), l1);
+ tcg_gen_brcondi_i32(TCG_COND_NE, r_temp2, 0, l1);
tcg_gen_movi_tl(cpu_cc_src2, 0);
gen_set_label(l1);
@@ -779,7 +779,7 @@ static inline void gen_trap_ifdivzero_tl(TCGv divisor)
int l1;
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_NE, divisor, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, divisor, 0, l1);
tcg_gen_helper_0_1(raise_exception, tcg_const_i32(TT_DIV_ZERO));
gen_set_label(l1);
}
@@ -793,8 +793,8 @@ static inline void gen_op_sdivx(TCGv dst, TCGv src1, TCGv src2)
tcg_gen_mov_tl(cpu_cc_src, src1);
tcg_gen_mov_tl(cpu_cc_src2, src2);
gen_trap_ifdivzero_tl(src2);
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_cc_src, tcg_const_tl(INT64_MIN), l1);
- tcg_gen_brcond_tl(TCG_COND_NE, cpu_cc_src2, tcg_const_tl(-1), l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src, INT64_MIN, l1);
+ tcg_gen_brcondi_tl(TCG_COND_NE, cpu_cc_src2, -1, l1);
tcg_gen_movi_i64(dst, INT64_MIN);
tcg_gen_br(l2);
gen_set_label(l1);
@@ -812,7 +812,7 @@ static inline void gen_op_div_cc(TCGv dst)
gen_cc_NZ_icc(cpu_cc_dst);
l1 = gen_new_label();
tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, cc_src2));
- tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_tmp0, 0, l1);
tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF);
gen_set_label(l1);
}
@@ -1107,7 +1107,7 @@ static inline void gen_branch2(DisasContext *dc, target_ulong pc1,
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
gen_goto_tb(dc, 0, pc1, pc1 + 4);
@@ -1122,7 +1122,7 @@ static inline void gen_branch_a(DisasContext *dc, target_ulong pc1,
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
gen_goto_tb(dc, 0, pc2, pc1);
@@ -1138,7 +1138,7 @@ static inline void gen_generic_branch(target_ulong npc1, target_ulong npc2,
l1 = gen_new_label();
l2 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
tcg_gen_movi_tl(cpu_npc, npc1);
tcg_gen_br(l2);
@@ -1349,7 +1349,7 @@ static inline void gen_cond_reg(TCGv r_dst, int cond, TCGv r_src)
l1 = gen_new_label();
tcg_gen_movi_tl(r_dst, 0);
- tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], r_src, tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], r_src, 0, l1);
tcg_gen_movi_tl(r_dst, 1);
gen_set_label(l1);
}
@@ -2603,8 +2603,8 @@ static void disas_sparc_insn(DisasContext * dc)
l1 = gen_new_label();
cond = GET_FIELD_SP(insn, 14, 17);
cpu_src1 = get_src1(insn, cpu_src1);
- tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
+ 0, l1);
gen_op_load_fpr_FT0(rs2);
gen_op_store_FT0_fpr(rd);
gen_set_label(l1);
@@ -2615,8 +2615,8 @@ static void disas_sparc_insn(DisasContext * dc)
l1 = gen_new_label();
cond = GET_FIELD_SP(insn, 14, 17);
cpu_src1 = get_src1(insn, cpu_src1);
- tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
+ 0, l1);
gen_op_load_fpr_DT0(DFPREG(rs2));
gen_op_store_DT0_fpr(DFPREG(rd));
gen_set_label(l1);
@@ -2628,8 +2628,8 @@ static void disas_sparc_insn(DisasContext * dc)
l1 = gen_new_label();
cond = GET_FIELD_SP(insn, 14, 17);
cpu_src1 = get_src1(insn, cpu_src1);
- tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond], cpu_src1,
+ 0, l1);
gen_op_load_fpr_QT0(QFPREG(rs2));
gen_op_store_QT0_fpr(QFPREG(rd));
gen_set_label(l1);
@@ -2647,8 +2647,8 @@ static void disas_sparc_insn(DisasContext * dc)
r_cond = tcg_temp_new(TCG_TYPE_TL); \
cond = GET_FIELD_SP(insn, 14, 17); \
gen_fcond(r_cond, fcc, cond); \
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
- tcg_const_tl(0), l1); \
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
+ 0, l1); \
glue(glue(gen_op_load_fpr_, size_FDQ), T0) \
(glue(size_FDQ, FPREG(rs2))); \
glue(glue(gen_op_store_, size_FDQ), T0_fpr) \
@@ -2705,8 +2705,8 @@ static void disas_sparc_insn(DisasContext * dc)
r_cond = tcg_temp_new(TCG_TYPE_TL); \
cond = GET_FIELD_SP(insn, 14, 17); \
gen_cond(r_cond, icc, cond); \
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond, \
- tcg_const_tl(0), l1); \
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, \
+ 0, l1); \
glue(glue(gen_op_load_fpr_, size_FDQ), T0) \
(glue(size_FDQ, FPREG(rs2))); \
glue(glue(gen_op_store_, size_FDQ), T0_fpr) \
@@ -3411,8 +3411,7 @@ static void disas_sparc_insn(DisasContext * dc)
l1 = gen_new_label();
- tcg_gen_brcond_tl(TCG_COND_EQ, r_cond,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(TCG_COND_EQ, r_cond, 0, l1);
if (IS_IMM) { /* immediate */
rs2 = GET_FIELD_SPs(insn, 0, 10);
gen_movl_TN_reg(rd, tcg_const_tl((int)rs2));
@@ -3444,8 +3443,8 @@ static void disas_sparc_insn(DisasContext * dc)
l1 = gen_new_label();
- tcg_gen_brcond_tl(gen_tcg_cond_reg[cond], cpu_src1,
- tcg_const_tl(0), l1);
+ tcg_gen_brcondi_tl(gen_tcg_cond_reg[cond],
+ cpu_src1, 0, l1);
if (IS_IMM) { /* immediate */
rs2 = GET_FIELD_SPs(insn, 0, 9);
gen_movl_TN_reg(rd, tcg_const_tl((int)rs2));
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 469e444d5c..6c9dd76aa4 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -491,6 +491,14 @@ static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2,
tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
}
+static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i32(arg2);
+ tcg_gen_brcond_i32(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+
static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
{
tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
@@ -1063,6 +1071,14 @@ static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2)
#endif
+static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_brcond_i64(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+
/***************************************/
/* optional operations */
@@ -1614,6 +1630,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_sar_tl tcg_gen_sar_i64
#define tcg_gen_sari_tl tcg_gen_sari_i64
#define tcg_gen_brcond_tl tcg_gen_brcond_i64
+#define tcg_gen_brcondi_tl tcg_gen_brcondi_i64
#define tcg_gen_mul_tl tcg_gen_mul_i64
#define tcg_gen_muli_tl tcg_gen_muli_i64
#define tcg_gen_discard_tl tcg_gen_discard_i64
@@ -1664,6 +1681,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_sar_tl tcg_gen_sar_i32
#define tcg_gen_sari_tl tcg_gen_sari_i32
#define tcg_gen_brcond_tl tcg_gen_brcond_i32
+#define tcg_gen_brcondi_tl tcg_gen_brcondi_i32
#define tcg_gen_mul_tl tcg_gen_mul_i32
#define tcg_gen_muli_tl tcg_gen_muli_i32
#define tcg_gen_discard_tl tcg_gen_discard_i32
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-20 17:57:38 +0000