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-rw-r--r--hw/etraxfs.c25
-rw-r--r--target-cris/helper.c6
2 files changed, 13 insertions, 18 deletions
diff --git a/hw/etraxfs.c b/hw/etraxfs.c
index 276f1fd091..1ec0fa006a 100644
--- a/hw/etraxfs.c
+++ b/hw/etraxfs.c
@@ -72,41 +72,32 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
/* allocate RAM */
phys_ram = qemu_ram_alloc(ram_size);
cpu_register_physical_memory(0x40000000, ram_size, phys_ram | IO_MEM_RAM);
- /* Unached mapping. */
- cpu_register_physical_memory(0xc0000000, ram_size, phys_ram | IO_MEM_RAM);
/* The ETRAX-FS has 128Kb on chip ram, the docs refer to it as the
- internal memory. Cached and uncached mappings. */
+ internal memory. */
phys_intmem = qemu_ram_alloc(INTMEM_SIZE);
- cpu_register_physical_memory(0xb8000000, INTMEM_SIZE,
- phys_intmem | IO_MEM_RAM);
cpu_register_physical_memory(0x38000000, INTMEM_SIZE,
phys_intmem | IO_MEM_RAM);
phys_flash = qemu_ram_alloc(FLASH_SIZE);
i = drive_get_index(IF_PFLASH, 0, 0);
- pflash_cfi02_register(0x80000000, phys_flash,
- drives_table[i].bdrv, (64 * 1024),
- FLASH_SIZE >> 16,
- 1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
- 0x555, 0x2aa);
pflash_cfi02_register(0x0, phys_flash,
drives_table[i].bdrv, (64 * 1024),
FLASH_SIZE >> 16,
1, 2, 0x0000, 0x0000, 0x0000, 0x0000,
0x555, 0x2aa);
- pic = etraxfs_pic_init(env, 0xb001c000);
- etraxfs_dmac = etraxfs_dmac_init(env, 0xb0000000, 10);
+ pic = etraxfs_pic_init(env, 0x3001c000);
+ etraxfs_dmac = etraxfs_dmac_init(env, 0x30000000, 10);
for (i = 0; i < 10; i++) {
/* On ETRAX, odd numbered channels are inputs. */
etraxfs_dmac_connect(etraxfs_dmac, i, pic->irq + 7 + i, i & 1);
}
/* Add the two ethernet blocks. */
- eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0xb0034000);
+ eth[0] = etraxfs_eth_init(&nd_table[0], env, pic->irq + 25, 0x30034000);
if (nb_nics > 1)
- eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0xb0036000);
+ eth[1] = etraxfs_eth_init(&nd_table[1], env, pic->irq + 26, 0x30036000);
/* The DMA Connector block is missing, hardwire things for now. */
etraxfs_dmac_connect_client(etraxfs_dmac, 0, eth[0]);
@@ -117,13 +108,13 @@ void bareetraxfs_init (ram_addr_t ram_size, int vga_ram_size,
}
/* 2 timers. */
- etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb001e000);
- etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0xb005e000);
+ etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3001e000);
+ etraxfs_timer_init(env, pic->irq + 0x1b, pic->nmi + 1, 0x3005e000);
for (i = 0; i < 4; i++) {
if (serial_hds[i]) {
etraxfs_ser_init(env, pic->irq + 0x14 + i,
- serial_hds[i], 0xb0026000 + i * 0x2000);
+ serial_hds[i], 0x30026000 + i * 0x2000);
}
}
diff --git a/target-cris/helper.c b/target-cris/helper.c
index a869ee154e..4f5ffba1ec 100644
--- a/target-cris/helper.c
+++ b/target-cris/helper.c
@@ -89,7 +89,11 @@ int cpu_cris_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
}
else
{
- phy = res.phy;
+ /*
+ * Mask off the cache selection bit. The ETRAX busses do not
+ * see the top bit.
+ */
+ phy = res.phy & ~0x80000000;
prot = res.prot;
r = tlb_set_page(env, address, phy, prot, mmu_idx, is_softmmu);
}